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Tue, 6 Jan 2026 06:08:56 -0800 From: "Sheetal ." To: Mark Brown CC: Sander Vanheule , Greg Kroah-Hartman , "Rafael J . Wysocki" , Danilo Krummrich , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , "Thierry Reding" , Jonathan Hunter , , , , Sheetal Subject: [RFC PATCH 2/2] ASoC: tegra: Enable cache_default_is_zero for audio drivers Date: Tue, 6 Jan 2026 19:38:27 +0530 Message-ID: <20260106140827.3771375-3-sheetal@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260106140827.3771375-1-sheetal@nvidia.com> References: <20260106140827.3771375-1-sheetal@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636E:EE_|SN7PR12MB8131:EE_ X-MS-Office365-Filtering-Correlation-Id: efd531ff-9ee3-4856-1c73-08de4d2d2cd3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|7416014|376014|1800799024|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?U5vkPjlmS3wSgBk8s4blIsLUKsIoJmuZXRiFSUAeNBPLxunNV/kPiNgp18U5?= =?us-ascii?Q?q5S2rxelpJinlZtfdQRr83l/4F8XpaxijcHltAkDGpAla11aHQEbUSJj3Su5?= =?us-ascii?Q?AgiJcFAXijrjSl5ah6hCBCeCZZmKALGP7AgnRdtsxevt49N6ABSG4POwhj41?= =?us-ascii?Q?ZwTAzpfu/RIs6xjPZUn3J2bupQRLcW8QQqCrYWNb3f3BJA282zUS0f2rTb2k?= =?us-ascii?Q?QGIAZ/wMVzwNuwrjibhtCDNnOEPLKUEs032t4g5Yb7QVvu65Ug0z0yBEslnO?= =?us-ascii?Q?tNNCI7CoDISv2RmwpJyoIzXY+QIc9qik1dRLSbCcyzriv68aAAV/uAKaQzfa?= =?us-ascii?Q?LSaHo7BoKOXu58PNA8VESUKe5OaLtM+7ba84DOFzPZVhlpWBNa4YSegsHsDm?= =?us-ascii?Q?HyeQ5jzVC6V07+h1TwVFeYGxcqwwQ6lFQ1dlvuorarll7TNpftGuG08GLev5?= =?us-ascii?Q?FzWOoR89KeezYJro1YDk8HBaHtHzkqaG/VAumsvaR2UhrPOWLbKw1s5j3pRi?= =?us-ascii?Q?H2o2ZJpM66ZXRxcxyUMGWctKUwWLw42vtn6J13C0n+E5g6Cy061gf/ZdAJq6?= =?us-ascii?Q?cYjfrHea7tsaFgbi1GL44k0KaZL6mJDfbs8aDAb0SznljMftP6bN5pCMRoKK?= =?us-ascii?Q?4Da0W0CyEWh9bjOfwFom34FWzZsJ3LEJ9Xk2PtDssQI0rFFdw+uOp6xwHTFy?= =?us-ascii?Q?8Wsvgn6YgtynL7aGcxbkosGkMvnNVoZVSKtJow2GLiyizl3MNOeQmHUxG+3Q?= =?us-ascii?Q?ZaVpKJAtpL9leC/aenpGgY0LFn+aPcWza/uj/igfI2R4CwVCvwQd+Lcd2B07?= =?us-ascii?Q?2CYRN0VE0Y6Gj1gUEEB/j7hKixidEfdvtpQt4Gm3VH2Fl0K21mSgSkYY1ayX?= =?us-ascii?Q?KUa9uFQnzcQK/5pA2APJOpAZ5waekHZO8o4aCYdjndL+jeyLgbgktcOO28Q2?= =?us-ascii?Q?UpYQmRi3tMwB9KRA1OR55B2diLppmjxb4CZrzaFAMQcYkQKsvaUVrJUQNrnT?= =?us-ascii?Q?OXgEzJeLnqKag7aNw8caQ0pPtPZGS7cKXR8k/Y4JJ528gp7Yh69dwvMKZzD9?= =?us-ascii?Q?pG7iP+iQAVhktwXeP+cT7zt7zPcw8Q3vLmjqlgLpDKK8x2ofIMAjbQEGF4Vj?= =?us-ascii?Q?MxknOy5ECXGwRo60nZC2YRPefRUPt+kOqcz/EEFmiy5O+4zZwDj+WDOPp0Ic?= =?us-ascii?Q?8ATExMiIkYTtXFH7n0biS4SadD+S0ConH5U8P90vnSqDUb9PoCs4Jke9bv0j?= =?us-ascii?Q?uSoNpVie1wFPZEQgn7aya8361piS5SXIPuKyUamAm867eCfqH0fKu2YH3nD7?= =?us-ascii?Q?ia/TJAEYUZmXGsY/VpJPOu9d7xmN2Kd4FLyFOgTzMAS6KWsKHDG3gzRZz/UT?= =?us-ascii?Q?ghyyGdApr5obe5ADjehb/cWhtinBZ5BT5/ezqcY1+EE0FJ47v37thKW5y14b?= =?us-ascii?Q?OmD/QnHATLNQo3qZnb3E4CeU4jpULSi/3RpghPCK7XpfjjIk0hMsmLhnsMDd?= =?us-ascii?Q?y77CIH1dWJzY7JwvcRK+4LMa56LBP0hAt+6v2aoe850IsiPAvlP31YykObjh?= =?us-ascii?Q?3IDK7zLlkKZHy+YnGq0=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(376014)(1800799024)(13003099007);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jan 2026 14:09:15.3133 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: efd531ff-9ee3-4856-1c73-08de4d2d2cd3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8131 Content-Type: text/plain; charset="utf-8" From: Sheetal Set cache_default_is_zero flag in Tegra audio driver regmap configurations. Tegra APE hardware has numerous registers with zero power-on-reset values. Use cache_default_is_zero to mark cache entries as valid instead of adding all these registers to reg_defaults arrays. This patch depends on: https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.28444= 99-1-sheetal@nvidia.com/ Signed-off-by: Sheetal --- sound/soc/tegra/tegra186_asrc.c | 1 + sound/soc/tegra/tegra186_dspk.c | 1 + sound/soc/tegra/tegra210_admaif.c | 3 +++ sound/soc/tegra/tegra210_adx.c | 2 ++ sound/soc/tegra/tegra210_ahub.c | 3 +++ sound/soc/tegra/tegra210_amx.c | 3 +++ sound/soc/tegra/tegra210_dmic.c | 1 + sound/soc/tegra/tegra210_i2s.c | 2 ++ sound/soc/tegra/tegra210_mbdrc.c | 1 + sound/soc/tegra/tegra210_mixer.c | 1 + sound/soc/tegra/tegra210_mvc.c | 1 + sound/soc/tegra/tegra210_ope.c | 1 + sound/soc/tegra/tegra210_peq.c | 1 + sound/soc/tegra/tegra210_sfc.c | 1 + 14 files changed, 22 insertions(+) diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asr= c.c index 2c0220e14a57..2f3382a674e7 100644 --- a/sound/soc/tegra/tegra186_asrc.c +++ b/sound/soc/tegra/tegra186_asrc.c @@ -951,6 +951,7 @@ static const struct regmap_config tegra186_asrc_regmap_= config =3D { .reg_defaults =3D tegra186_asrc_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra186_asrc_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct tegra_asrc_soc_data soc_data_tegra186 =3D { diff --git a/sound/soc/tegra/tegra186_dspk.c b/sound/soc/tegra/tegra186_dsp= k.c index a762150db802..84c54e710cff 100644 --- a/sound/soc/tegra/tegra186_dspk.c +++ b/sound/soc/tegra/tegra186_dspk.c @@ -468,6 +468,7 @@ static const struct regmap_config tegra186_dspk_regmap = =3D { .reg_defaults =3D tegra186_dspk_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra186_dspk_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct of_device_id tegra186_dspk_of_match[] =3D { diff --git a/sound/soc/tegra/tegra210_admaif.c b/sound/soc/tegra/tegra210_a= dmaif.c index f9f6040c4e34..bb2f42560065 100644 --- a/sound/soc/tegra/tegra210_admaif.c +++ b/sound/soc/tegra/tegra210_admaif.c @@ -242,6 +242,7 @@ static const struct regmap_config tegra210_admaif_regma= p_config =3D { .reg_defaults =3D tegra210_admaif_reg_defaults, .num_reg_defaults =3D TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra186_admaif_regmap_config =3D { @@ -255,6 +256,7 @@ static const struct regmap_config tegra186_admaif_regma= p_config =3D { .reg_defaults =3D tegra186_admaif_reg_defaults, .num_reg_defaults =3D TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra264_admaif_regmap_config =3D { @@ -268,6 +270,7 @@ static const struct regmap_config tegra264_admaif_regma= p_config =3D { .reg_defaults =3D tegra264_admaif_reg_defaults, .num_reg_defaults =3D TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static int tegra_admaif_runtime_suspend(struct device *dev) diff --git a/sound/soc/tegra/tegra210_adx.c b/sound/soc/tegra/tegra210_adx.c index 6c9a410085bc..dd6261a0442c 100644 --- a/sound/soc/tegra/tegra210_adx.c +++ b/sound/soc/tegra/tegra210_adx.c @@ -626,6 +626,7 @@ static const struct regmap_config tegra210_adx_regmap_c= onfig =3D { .reg_defaults =3D tegra210_adx_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_adx_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra264_adx_regmap_config =3D { @@ -639,6 +640,7 @@ static const struct regmap_config tegra264_adx_regmap_c= onfig =3D { .reg_defaults =3D tegra264_adx_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra264_adx_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct tegra210_adx_soc_data soc_data_tegra210 =3D { diff --git a/sound/soc/tegra/tegra210_ahub.c b/sound/soc/tegra/tegra210_ahu= b.c index e795907a3963..4cf21a9aca32 100644 --- a/sound/soc/tegra/tegra210_ahub.c +++ b/sound/soc/tegra/tegra210_ahub.c @@ -2078,6 +2078,7 @@ static const struct regmap_config tegra210_ahub_regma= p_config =3D { .reg_stride =3D 4, .max_register =3D TEGRA210_MAX_REGISTER_ADDR, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra186_ahub_regmap_config =3D { @@ -2086,6 +2087,7 @@ static const struct regmap_config tegra186_ahub_regma= p_config =3D { .reg_stride =3D 4, .max_register =3D TEGRA186_MAX_REGISTER_ADDR, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra264_ahub_regmap_config =3D { @@ -2095,6 +2097,7 @@ static const struct regmap_config tegra264_ahub_regma= p_config =3D { .writeable_reg =3D tegra264_ahub_wr_reg, .max_register =3D TEGRA264_MAX_REGISTER_ADDR, .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct tegra_ahub_soc_data soc_data_tegra210 =3D { diff --git a/sound/soc/tegra/tegra210_amx.c b/sound/soc/tegra/tegra210_amx.c index c94f8c84e04f..0a9402102ba1 100644 --- a/sound/soc/tegra/tegra210_amx.c +++ b/sound/soc/tegra/tegra210_amx.c @@ -655,6 +655,7 @@ static const struct regmap_config tegra210_amx_regmap_c= onfig =3D { .reg_defaults =3D tegra210_amx_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_amx_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra194_amx_regmap_config =3D { @@ -668,6 +669,7 @@ static const struct regmap_config tegra194_amx_regmap_c= onfig =3D { .reg_defaults =3D tegra210_amx_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_amx_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct regmap_config tegra264_amx_regmap_config =3D { @@ -681,6 +683,7 @@ static const struct regmap_config tegra264_amx_regmap_c= onfig =3D { .reg_defaults =3D tegra264_amx_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra264_amx_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct tegra210_amx_soc_data soc_data_tegra210 =3D { diff --git a/sound/soc/tegra/tegra210_dmic.c b/sound/soc/tegra/tegra210_dmi= c.c index 66fff53aeaa6..d87f29ce1daa 100644 --- a/sound/soc/tegra/tegra210_dmic.c +++ b/sound/soc/tegra/tegra210_dmic.c @@ -484,6 +484,7 @@ static const struct regmap_config tegra210_dmic_regmap_= config =3D { .reg_defaults =3D tegra210_dmic_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_dmic_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static int tegra210_dmic_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra210_i2s.c b/sound/soc/tegra/tegra210_i2s.c index b91e0e6cd7fe..0dc853645905 100644 --- a/sound/soc/tegra/tegra210_i2s.c +++ b/sound/soc/tegra/tegra210_i2s.c @@ -998,6 +998,7 @@ static const struct regmap_config tegra210_regmap_conf = =3D { .reg_defaults =3D tegra210_i2s_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_i2s_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 /* @@ -1045,6 +1046,7 @@ static const struct regmap_config tegra264_regmap_con= f =3D { .reg_defaults =3D tegra264_i2s_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra264_i2s_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static int tegra210_i2s_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra210_mbdrc.c b/sound/soc/tegra/tegra210_mb= drc.c index 09fe3c5cf540..83906e484343 100644 --- a/sound/soc/tegra/tegra210_mbdrc.c +++ b/sound/soc/tegra/tegra210_mbdrc.c @@ -764,6 +764,7 @@ static const struct regmap_config tegra210_mbdrc_regmap= _cfg =3D { .reg_defaults =3D tegra210_mbdrc_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_mbdrc_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 int tegra210_mbdrc_hw_params(struct snd_soc_component *cmpnt) diff --git a/sound/soc/tegra/tegra210_mixer.c b/sound/soc/tegra/tegra210_mi= xer.c index ff8e9f2d7abf..c8157388ad70 100644 --- a/sound/soc/tegra/tegra210_mixer.c +++ b/sound/soc/tegra/tegra210_mixer.c @@ -609,6 +609,7 @@ static const struct regmap_config tegra210_mixer_regmap= _config =3D { .reg_defaults =3D tegra210_mixer_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_mixer_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct of_device_id tegra210_mixer_of_match[] =3D { diff --git a/sound/soc/tegra/tegra210_mvc.c b/sound/soc/tegra/tegra210_mvc.c index 779d4c199da9..f3a5048dcf7a 100644 --- a/sound/soc/tegra/tegra210_mvc.c +++ b/sound/soc/tegra/tegra210_mvc.c @@ -700,6 +700,7 @@ static const struct regmap_config tegra210_mvc_regmap_c= onfig =3D { .reg_defaults =3D tegra210_mvc_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_mvc_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct of_device_id tegra210_mvc_of_match[] =3D { diff --git a/sound/soc/tegra/tegra210_ope.c b/sound/soc/tegra/tegra210_ope.c index 27db70af2746..c7ac94f0a711 100644 --- a/sound/soc/tegra/tegra210_ope.c +++ b/sound/soc/tegra/tegra210_ope.c @@ -298,6 +298,7 @@ static const struct regmap_config tegra210_ope_regmap_c= onfig =3D { .reg_defaults =3D tegra210_ope_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_ope_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static int tegra210_ope_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra210_peq.c b/sound/soc/tegra/tegra210_peq.c index 9a05e6913276..8d4821a4cc58 100644 --- a/sound/soc/tegra/tegra210_peq.c +++ b/sound/soc/tegra/tegra210_peq.c @@ -307,6 +307,7 @@ static const struct regmap_config tegra210_peq_regmap_c= onfig =3D { .reg_defaults =3D tegra210_peq_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_peq_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 void tegra210_peq_restore(struct regmap *regmap, u32 *biquad_gains, diff --git a/sound/soc/tegra/tegra210_sfc.c b/sound/soc/tegra/tegra210_sfc.c index d6341968bebe..89208820d451 100644 --- a/sound/soc/tegra/tegra210_sfc.c +++ b/sound/soc/tegra/tegra210_sfc.c @@ -3570,6 +3570,7 @@ static const struct regmap_config tegra210_sfc_regmap= _config =3D { .reg_defaults =3D tegra210_sfc_reg_defaults, .num_reg_defaults =3D ARRAY_SIZE(tegra210_sfc_reg_defaults), .cache_type =3D REGCACHE_FLAT, + .cache_default_is_zero =3D true, }; =20 static const struct of_device_id tegra210_sfc_of_match[] =3D { --=20 2.34.1