From nobody Sat Feb 7 14:39:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E796230D1E; Tue, 6 Jan 2026 05:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676513; cv=none; b=B8z6rg1HfgIGfHJZzh8RaXF6XeztVXLRQpXs5kG9jUt8WmvE7CbyiHmnHMUdevbdJzSwPuZe7NQGR/2T9tz1h0cnkW+MP6sZJJH3PJYADMxdLD41wRoYJJ2KU4X2r5Lr0Iq/yjB75zpJNBz41LbiySYAU+stBeyOUgPam7r4Nkw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676513; c=relaxed/simple; bh=w0YET8J59m1UzZjWfTIg24pWJK2AYz2msVE4FhZqQKg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=arixnqJWLDPLHxMv8hu8yoMF2lEadOQu4auSERJ1gdOfgPUwhWnxjNhwwBxciRcd0LIHPWRi1Rby+SXVRhFlmqLciO6UMsJodPIQahiNOmRHadLKxb5qI0PQPVCt70FwpxVGNP7+STpyjZaWOcJ8lZBo+Mq1m16p05PvKhEZs4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TCMO6QFH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TCMO6QFH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 476A7C19423; Tue, 6 Jan 2026 05:15:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767676512; bh=w0YET8J59m1UzZjWfTIg24pWJK2AYz2msVE4FhZqQKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TCMO6QFHthNKkx3ZyOlzWQuHyj7+U/IjmQqnCqM8j17FrnXena9Oz2vAhUXNsII6K zimA/vuYtXKlSZQlJw0/aSMFyqtGEfG1DGRstOEmsOn8DPAQ9IWAJJPXulMhxOoyy0 9aiRjsP7ngz1jIs9c0Xha7vd0ndwfQh0BaiEJYV50cODYm9Cj+9/TPLRoFDn5jmJPX 866Uofr6VjsAIn8g5Co5jAHFZVyz1drt6YHKergIXcUc8Td/w2xPp6bstlIrGEbXOE eKaR8MoegICchqgfNmq7VVryNGtMQSKlRuWJ7/9SI2cAFPdFjLiW2YrMnmBt2hLtkx ZaxxKzXKssDcA== From: "Mario Limonciello (AMD)" To: "Gautham R . Shenoy" Cc: Perry Yuan , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v5 1/5] cpufreq/amd-pstate: Add dynamic energy performance preference Date: Mon, 5 Jan 2026 23:14:37 -0600 Message-ID: <20260106051441.60093-2-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106051441.60093-1-superm1@kernel.org> References: <20260106051441.60093-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mario Limonciello Dynamic energy performance preference will change the EPP profile based on whether the machine is running on AC or DC power. A notification chain from the power supply core is used to adjust EPP values on plug in or plug out events. For non-server systems: * the default EPP for AC mode is `performance`. * the default EPP for DC mode is `balance_performance`. Signed-off-by: Mario Limonciello --- v4->v5: * Rebase on 6.19-rc1 * Fix initialization for static variable * Whitespace on if/else fix v3->v4: * Handle Kconfig not being set * Fix dynamic epp default on server v2-v3: * Fix typo in Kconfig v1->v2: * Change defaults to performance (AC) and balance_performance (DC) * Default Kconfig to disabled for now * Rebase on latest branch --- Documentation/admin-guide/pm/amd-pstate.rst | 18 ++- drivers/cpufreq/Kconfig.x86 | 12 ++ drivers/cpufreq/amd-pstate.c | 133 ++++++++++++++++++-- drivers/cpufreq/amd-pstate.h | 5 +- 4 files changed, 159 insertions(+), 9 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index e1771f2225d5f..5aa9fb77a078c 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -289,7 +289,7 @@ and user can change current preference according to ene= rgy or performance needs Please get all support profiles list from ``energy_performance_available_preferences`` attribute, all the profiles a= re integer values defined between 0 to 255 when EPP feature is enabled by pla= tform -firmware, if EPP feature is disabled, driver will ignore the written value +firmware, but if the dynamic EPP feature is enabled, driver will block wri= tes. This attribute is read-write. =20 ``boost`` @@ -311,6 +311,22 @@ boost or `1` to enable it, for the respective CPU usin= g the sysfs path Other performance and frequency values can be read back from ``/sys/devices/system/cpu/cpuX/acpi_cppc/``, see :ref:`cppc_sysfs`. =20 +Dynamic energy performance profile +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +The amd-pstate driver supports dynamically selecting the energy performance +profile based on whether the machine is running on AC or DC power. + +Whether this behavior is enabled by default with the kernel config option +`CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`. This behavior can also be overridden +at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dyn= amic_epp``. + +When set to enabled, the driver will select a different energy performance +profile when the machine is running on battery or AC power. +When set to disabled, the driver will not change the energy performance pr= ofile +based on the power source and will not react to user desired power state. + +Attempting to manually write to the ``energy_performance_preference`` sysfs +file will fail when ``dynamic_epp`` is enabled. =20 ``amd-pstate`` vs ``acpi-cpufreq`` =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 index 2c5c228408bf2..cdaa8d858045a 100644 --- a/drivers/cpufreq/Kconfig.x86 +++ b/drivers/cpufreq/Kconfig.x86 @@ -68,6 +68,18 @@ config X86_AMD_PSTATE_DEFAULT_MODE For details, take a look at: . =20 +config X86_AMD_PSTATE_DYNAMIC_EPP + bool "AMD Processor P-State dynamic EPP support" + depends on X86_AMD_PSTATE + default n + help + Allow the kernel to dynamically change the energy performance + value from events like ACPI platform profile and AC adapter plug + events. + + This feature can also be changed at runtime, this configuration + option only sets the kernel default value behavior. + config X86_AMD_PSTATE_UT tristate "selftest for AMD Processor P-State driver" depends on X86 && ACPI_PROCESSOR diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index c45bc98721d24..26a8552581c57 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include =20 @@ -86,6 +87,11 @@ static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state =3D AMD_PSTATE_UNDEFINED; static bool amd_pstate_prefcore =3D true; +#ifdef CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP +static bool dynamic_epp =3D CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP; +#else +static bool dynamic_epp; +#endif static struct quirk_entry *quirks; =20 /* @@ -1067,6 +1073,73 @@ static void amd_pstate_cpu_exit(struct cpufreq_polic= y *policy) kfree(cpudata); } =20 +static int amd_pstate_get_balanced_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + + if (power_supply_is_system_supplied()) + return cpudata->epp_default_ac; + else + return cpudata->epp_default_dc; +} + +static int amd_pstate_power_supply_notifier(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct amd_cpudata *cpudata =3D container_of(nb, struct amd_cpudata, powe= r_nb); + struct cpufreq_policy *policy __free(put_cpufreq_policy) =3D cpufreq_cpu_= get(cpudata->cpu); + u8 epp; + int ret; + + if (event !=3D PSY_EVENT_PROP_CHANGED) + return NOTIFY_OK; + + epp =3D amd_pstate_get_balanced_epp(policy); + + ret =3D amd_pstate_set_epp(policy, epp); + if (ret) + pr_warn("Failed to set CPU %d EPP %u: %d\n", cpudata->cpu, epp, ret); + + return NOTIFY_OK; +} +static void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + + if (cpudata->power_nb.notifier_call) + power_supply_unreg_notifier(&cpudata->power_nb); + cpudata->dynamic_epp =3D false; +} + +static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + int ret; + u8 epp; + + epp =3D amd_pstate_get_balanced_epp(policy); + ret =3D amd_pstate_set_epp(policy, epp); + if (ret) + return ret; + + /* only enable notifier if things will actually change */ + if (cpudata->epp_default_ac !=3D cpudata->epp_default_dc) { + ret =3D power_supply_reg_notifier(&cpudata->power_nb); + if (ret) + goto cleanup; + cpudata->power_nb.notifier_call =3D amd_pstate_power_supply_notifier; + } + + cpudata->dynamic_epp =3D true; + + return 0; + +cleanup: + amd_pstate_clear_dynamic_epp(policy); + + return ret; +} + /* Sysfs attributes */ =20 /* @@ -1161,14 +1234,19 @@ static ssize_t store_energy_performance_preference( ssize_t ret; u8 epp; =20 + if (cpudata->dynamic_epp) { + pr_debug("EPP cannot be set when dynamic EPP is enabled\n"); + return -EBUSY; + } + ret =3D sysfs_match_string(energy_perf_strings, buf); if (ret < 0) return -EINVAL; =20 - if (!ret) - epp =3D cpudata->epp_default; - else + if (ret) epp =3D epp_values[ret]; + else + epp =3D amd_pstate_get_balanced_epp(policy); =20 if (epp > 0 && policy->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) { pr_debug("EPP cannot be set under performance policy\n"); @@ -1176,6 +1254,8 @@ static ssize_t store_energy_performance_preference( } =20 ret =3D amd_pstate_set_epp(policy, epp); + if (ret) + return ret; =20 return ret ? ret : count; } @@ -1387,6 +1467,32 @@ static ssize_t prefcore_show(struct device *dev, return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore)); } =20 +static ssize_t dynamic_epp_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sysfs_emit(buf, "%s\n", str_enabled_disabled(dynamic_epp)); +} + +static ssize_t dynamic_epp_store(struct device *a, struct device_attribute= *b, + const char *buf, size_t count) +{ + bool enabled; + int ret; + + ret =3D kstrtobool(buf, &enabled); + if (ret) + return ret; + + if (dynamic_epp =3D=3D enabled) + return -EINVAL; + + /* reinitialize with desired dynamic EPP value */ + dynamic_epp =3D enabled; + ret =3D amd_pstate_change_driver_mode(cppc_state); + + return ret ? ret : count; +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); =20 @@ -1397,6 +1503,7 @@ cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); static DEVICE_ATTR_RW(status); static DEVICE_ATTR_RO(prefcore); +static DEVICE_ATTR_RW(dynamic_epp); =20 static struct freq_attr *amd_pstate_attr[] =3D { &amd_pstate_max_freq, @@ -1421,6 +1528,7 @@ static struct freq_attr *amd_pstate_epp_attr[] =3D { static struct attribute *pstate_global_attributes[] =3D { &dev_attr_status.attr, &dev_attr_prefcore.attr, + &dev_attr_dynamic_epp.attr, NULL }; =20 @@ -1512,15 +1620,20 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_p= olicy *policy) if (amd_pstate_acpi_pm_profile_server() || amd_pstate_acpi_pm_profile_undefined()) { policy->policy =3D CPUFREQ_POLICY_PERFORMANCE; - cpudata->epp_default =3D amd_pstate_get_epp(cpudata); + cpudata->epp_default_ac =3D cpudata->epp_default_dc =3D amd_pstate_get_e= pp(cpudata); } else { policy->policy =3D CPUFREQ_POLICY_POWERSAVE; - cpudata->epp_default =3D AMD_CPPC_EPP_BALANCE_PERFORMANCE; + cpudata->epp_default_ac =3D AMD_CPPC_EPP_PERFORMANCE; + cpudata->epp_default_dc =3D AMD_CPPC_EPP_BALANCE_PERFORMANCE; } =20 - ret =3D amd_pstate_set_epp(policy, cpudata->epp_default); + if (dynamic_epp) { + policy->policy =3D CPUFREQ_POLICY_PERFORMANCE; + ret =3D amd_pstate_set_dynamic_epp(policy); + } else + ret =3D amd_pstate_set_epp(policy, amd_pstate_get_balanced_epp(policy)); if (ret) - return ret; + goto free_cpudata1; =20 current_pstate_driver->adjust_perf =3D NULL; =20 @@ -1542,6 +1655,8 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_po= licy *policy) /* Reset CPPC_REQ MSR to the BIOS value */ amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false); =20 + if (cpudata->dynamic_epp) + amd_pstate_clear_dynamic_epp(policy); kfree(cpudata); policy->driver_data =3D NULL; } @@ -1579,6 +1694,10 @@ static int amd_pstate_epp_set_policy(struct cpufreq_= policy *policy) if (!policy->cpuinfo.max_freq) return -ENODEV; =20 + /* policy can't be changed to powersave policy while dynamic epp is enabl= ed */ + if (policy->policy =3D=3D CPUFREQ_POLICY_POWERSAVE && cpudata->dynamic_ep= p) + return -EBUSY; + cpudata->policy =3D policy->policy; =20 ret =3D amd_pstate_epp_update_limit(policy, true); diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index cb45fdca27a6c..7bfe5f8115623 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -106,7 +106,10 @@ struct amd_cpudata { /* EPP feature related attributes*/ u32 policy; bool suspended; - u8 epp_default; + u8 epp_default_ac; + u8 epp_default_dc; + bool dynamic_epp; + struct notifier_block power_nb; }; =20 /* --=20 2.43.0 From nobody Sat Feb 7 14:39:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D45FA2F6931; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pJZYzgFU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 182C9C19421; Tue, 6 Jan 2026 05:15:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767676513; bh=Y/AjsLq+32sMPVqzYF2M2p7J3XWlM6ewKZ1fE+wvH+c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pJZYzgFUiuPvcqZMuNcZ+A3g1lrahCaBKRupvomINRifLNUjDCKvD/PlTfz/Y3y3w TriTGybexEhBXm+vaA32x7fRxoBqpDAaFpXefwgFpr/ZS2CymLgcspqT2iElH88hnP s34RAHO6F8cL8kmlJcJ+CntwrsAkxgNDjdzY2BSFoShRMd+WpY5iJLrelDb5GaWoiK 02vS+3AFIq5F8ujrie9aHsGLL6ZdWmsxo7i7eezqMcJRqKC9NH+n2CM17IyU3ICdOy Vt8HIdgCW+M7X+nBLiqS2pp0hNN8NWa0BRfqxA2mFAtk3cAkF6bMy0QMT27isg6KX6 7MyuRumN/jh0Q== From: "Mario Limonciello (AMD)" To: "Gautham R . Shenoy" Cc: Perry Yuan , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v5 2/5] cpufreq/amd-pstate: add kernel command line to override dynamic epp Date: Mon, 5 Jan 2026 23:14:38 -0600 Message-ID: <20260106051441.60093-3-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106051441.60093-1-superm1@kernel.org> References: <20260106051441.60093-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mario Limonciello Add `amd_dynamic_epp=3Denable` and `amd_dynamic_epp=3Ddisable` to override the kernel configuration option `CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP` locally. Signed-off-by: Mario Limonciello --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ Documentation/admin-guide/pm/amd-pstate.rst | 7 +++++++ drivers/cpufreq/amd-pstate.c | 11 +++++++++++ 3 files changed, 25 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index a8d0afde7f85a..d7d547bbda430 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -490,6 +490,13 @@ Kernel parameters disable Disable amd-pstate preferred core. =20 + amd_dynamic_epp=3D + [X86] + disable + Disable amd-pstate dynamic EPP. + enable + Enable amd-pstate dynamic EPP. + amijoy.map=3D [HW,JOY] Amiga joystick support Map of devices attached to JOY0DAT and JOY1DAT Format: , diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index 5aa9fb77a078c..df4607b6a5f62 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -438,6 +438,13 @@ For systems that support ``amd-pstate`` preferred core= , the core rankings will always be advertised by the platform. But OS can choose to ignore that via= the kernel parameter ``amd_prefcore=3Ddisable``. =20 +``amd_dynamic_epp`` + +When AMD pstate is in auto mode, dynamic EPP will control whether the kern= el +autonomously changes the EPP mode. The default is configured by +``CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`` but can be explicitly enabled with +``amd_pstate_epp=3Denable`` or disabled with ``amd_pstate_epp=3Ddisable``. + User Space Interface in ``sysfs`` - General =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 26a8552581c57..7dd50b5825d78 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1992,8 +1992,19 @@ static int __init amd_prefcore_param(char *str) return 0; } =20 +static int __init amd_dynamic_epp_param(char *str) +{ + if (!strcmp(str, "disable")) + dynamic_epp =3D false; + if (!strcmp(str, "enable")) + dynamic_epp =3D true; + + return 0; +} + early_param("amd_pstate", amd_pstate_param); early_param("amd_prefcore", amd_prefcore_param); +early_param("amd_dynamic_epp", amd_dynamic_epp_param); =20 MODULE_AUTHOR("Huang Rui "); MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); --=20 2.43.0 From nobody Sat Feb 7 14:39:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BCA72F83AC; Tue, 6 Jan 2026 05:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676514; cv=none; b=S2/kSvxqHmsUhzK1Eb0+vXEZdau0FgIQbIqWH1aN2aeBzSM5LnDlR0MMpiyRXrhgNdBZArcWDYjo0exiUnnInUaLUSM8jzdiOJIAbLfPJVVMHw6Q8Bx4A7rBmZfqriY2RAj133fMQEGrKVG/pCBuZPvuk/pTgc+5M19w1aIhcKQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676514; c=relaxed/simple; bh=wYvf03Hp1Oqo764YMmwK5bV1IehfJ495o8fiosCb5jc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EZrdNKI8F2tHReN02zK69FUliErt/OPNH7owJ/6Qdz4k65NOd5sAqV9k5hz6Lvg0Bd8sm5aagT6F30curDEXIUbHgn6hbOfwC7JBC3DAX2TlcbyTDULb0LdzvC3fZX0tQA6ZPa51DK4XoZ4iOnUS2ZgOtIZ4pvxPAOabDlp64dg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rLJ15ots; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rLJ15ots" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D933AC19425; Tue, 6 Jan 2026 05:15:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767676514; bh=wYvf03Hp1Oqo764YMmwK5bV1IehfJ495o8fiosCb5jc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rLJ15otswxZAF9P/H5IbCpcOLYjxhsJUQLaVASJ7VsrcZeUIEsHTnWEW+tDOWxGjU YcKS/D5wZnkvv+PWZgPXFlXHcS7rtCaGdOG0a+vKF+DUlkLexCpFLP2k2wDH0fSzt2 qd+3f2yOyysQsEP5FZ+YqFD/KrcENYL9JlRN8NFivPbzB9lERooTkF3g9Q1UONN1FC GgU5tkr5+5taFceLDZpRKJBWZAQyzeozhAJhx23Tx38GmkI/Xstft+wLhkOiANPKY5 2Io4yPqS9kSzuvSW88yOJQyotGtDBjCWzSAC3z8jL1kOh3Dee5WjhUiTGqp+xfZcXy lHgJOCbPe//GQ== From: "Mario Limonciello (AMD)" To: "Gautham R . Shenoy" Cc: Perry Yuan , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v5 3/5] cpufreq/amd-pstate: Add support for platform profile class Date: Mon, 5 Jan 2026 23:14:39 -0600 Message-ID: <20260106051441.60093-4-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106051441.60093-1-superm1@kernel.org> References: <20260106051441.60093-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mario Limonciello The platform profile core allows multiple drivers and devices to register platform profile support. When the legacy platform profile interface is used all drivers will adjust the platform profile as well. Add support for registering every CPU with the platform profile handler when dynamic EPP is enabled. The end result will be that changing the platform profile will modify EPP accordingly. Signed-off-by: Mario Limonciello --- Documentation/admin-guide/pm/amd-pstate.rst | 4 +- drivers/cpufreq/Kconfig.x86 | 1 + drivers/cpufreq/amd-pstate.c | 144 +++++++++++++++++--- drivers/cpufreq/amd-pstate.h | 10 ++ 4 files changed, 141 insertions(+), 18 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index df4607b6a5f62..a6745f2358e61 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -321,7 +321,9 @@ Whether this behavior is enabled by default with the ke= rnel config option at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dyn= amic_epp``. =20 When set to enabled, the driver will select a different energy performance -profile when the machine is running on battery or AC power. +profile when the machine is running on battery or AC power. The driver will +also register with the platform profile handler to receive notifications of +user desired power state and react to those. When set to disabled, the driver will not change the energy performance pr= ofile based on the power source and will not react to user desired power state. =20 diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 index cdaa8d858045a..a0dbb9808ae99 100644 --- a/drivers/cpufreq/Kconfig.x86 +++ b/drivers/cpufreq/Kconfig.x86 @@ -40,6 +40,7 @@ config X86_AMD_PSTATE select ACPI_PROCESSOR select ACPI_CPPC_LIB if X86_64 select CPU_FREQ_GOV_SCHEDUTIL if SMP + select ACPI_PLATFORM_PROFILE help This driver adds a CPUFreq driver which utilizes a fine grain processor performance frequency control range instead of legacy diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 7dd50b5825d78..e1ccbbdd56d42 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -109,6 +109,7 @@ static struct quirk_entry *quirks; * 2 balance_performance * 3 balance_power * 4 power + * 5 custom (for raw EPP values) */ enum energy_perf_value_index { EPP_INDEX_DEFAULT =3D 0, @@ -116,6 +117,7 @@ enum energy_perf_value_index { EPP_INDEX_BALANCE_PERFORMANCE, EPP_INDEX_BALANCE_POWERSAVE, EPP_INDEX_POWERSAVE, + EPP_INDEX_CUSTOM, EPP_INDEX_MAX, }; =20 @@ -125,6 +127,7 @@ static const char * const energy_perf_strings[] =3D { [EPP_INDEX_BALANCE_PERFORMANCE] =3D "balance_performance", [EPP_INDEX_BALANCE_POWERSAVE] =3D "balance_power", [EPP_INDEX_POWERSAVE] =3D "power", + [EPP_INDEX_CUSTOM] =3D "custom", }; static_assert(ARRAY_SIZE(energy_perf_strings) =3D=3D EPP_INDEX_MAX); =20 @@ -135,7 +138,7 @@ static unsigned int epp_values[] =3D { [EPP_INDEX_BALANCE_POWERSAVE] =3D AMD_CPPC_EPP_BALANCE_POWERSAVE, [EPP_INDEX_POWERSAVE] =3D AMD_CPPC_EPP_POWERSAVE, }; -static_assert(ARRAY_SIZE(epp_values) =3D=3D EPP_INDEX_MAX); +static_assert(ARRAY_SIZE(epp_values) =3D=3D EPP_INDEX_MAX - 1); =20 typedef int (*cppc_mode_transition_fn)(int); =20 @@ -1094,6 +1097,10 @@ static int amd_pstate_power_supply_notifier(struct n= otifier_block *nb, if (event !=3D PSY_EVENT_PROP_CHANGED) return NOTIFY_OK; =20 + /* dynamic actions are only applied while platform profile is in balanced= */ + if (cpudata->current_profile !=3D PLATFORM_PROFILE_BALANCED) + return 0; + epp =3D amd_pstate_get_balanced_epp(policy); =20 ret =3D amd_pstate_set_epp(policy, epp); @@ -1102,14 +1109,84 @@ static int amd_pstate_power_supply_notifier(struct = notifier_block *nb, =20 return NOTIFY_OK; } -static void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) + +static int amd_pstate_profile_probe(void *drvdata, unsigned long *choices) +{ + set_bit(PLATFORM_PROFILE_LOW_POWER, choices); + set_bit(PLATFORM_PROFILE_BALANCED, choices); + set_bit(PLATFORM_PROFILE_PERFORMANCE, choices); + + return 0; +} + +static int amd_pstate_profile_get(struct device *dev, + enum platform_profile_option *profile) +{ + struct amd_cpudata *cpudata =3D dev_get_drvdata(dev); + + *profile =3D cpudata->current_profile; + + return 0; +} + +static int amd_pstate_profile_set(struct device *dev, + enum platform_profile_option profile) +{ + struct amd_cpudata *cpudata =3D dev_get_drvdata(dev); + struct cpufreq_policy *policy __free(put_cpufreq_policy) =3D cpufreq_cpu_= get(cpudata->cpu); + int ret; + + switch (profile) { + case PLATFORM_PROFILE_LOW_POWER: + if (cpudata->policy !=3D CPUFREQ_POLICY_POWERSAVE) + cpudata->policy =3D CPUFREQ_POLICY_POWERSAVE; + ret =3D amd_pstate_set_epp(policy, AMD_CPPC_EPP_POWERSAVE); + if (ret) + return ret; + break; + case PLATFORM_PROFILE_BALANCED: + if (cpudata->policy !=3D CPUFREQ_POLICY_POWERSAVE) + cpudata->policy =3D CPUFREQ_POLICY_POWERSAVE; + ret =3D amd_pstate_set_epp(policy, + amd_pstate_get_balanced_epp(policy)); + if (ret) + return ret; + break; + case PLATFORM_PROFILE_PERFORMANCE: + ret =3D amd_pstate_set_epp(policy, AMD_CPPC_EPP_PERFORMANCE); + if (ret) + return ret; + break; + default: + pr_err("Unknown Platform Profile %d\n", profile); + return -EOPNOTSUPP; + } + + cpudata->current_profile =3D profile; + + return 0; +} + +static const struct platform_profile_ops amd_pstate_profile_ops =3D { + .probe =3D amd_pstate_profile_probe, + .profile_set =3D amd_pstate_profile_set, + .profile_get =3D amd_pstate_profile_get, +}; + +void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata =3D policy->driver_data; =20 if (cpudata->power_nb.notifier_call) power_supply_unreg_notifier(&cpudata->power_nb); + if (cpudata->ppdev) { + platform_profile_remove(cpudata->ppdev); + cpudata->ppdev =3D NULL; + } + kfree(cpudata->profile_name); cpudata->dynamic_epp =3D false; } +EXPORT_SYMBOL_GPL(amd_pstate_clear_dynamic_epp); =20 static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) { @@ -1117,11 +1194,35 @@ static int amd_pstate_set_dynamic_epp(struct cpufre= q_policy *policy) int ret; u8 epp; =20 - epp =3D amd_pstate_get_balanced_epp(policy); + switch (cpudata->current_profile) { + case PLATFORM_PROFILE_PERFORMANCE: + epp =3D AMD_CPPC_EPP_PERFORMANCE; + break; + case PLATFORM_PROFILE_LOW_POWER: + epp =3D AMD_CPPC_EPP_POWERSAVE; + break; + case PLATFORM_PROFILE_BALANCED: + epp =3D amd_pstate_get_balanced_epp(policy); + break; + default: + pr_err("Unknown Platform Profile %d\n", cpudata->current_profile); + return -EOPNOTSUPP; + } ret =3D amd_pstate_set_epp(policy, epp); if (ret) return ret; =20 + cpudata->profile_name =3D kasprintf(GFP_KERNEL, "amd-pstate-epp-cpu%d", c= pudata->cpu); + + cpudata->ppdev =3D platform_profile_register(get_cpu_device(policy->cpu), + cpudata->profile_name, + policy->driver_data, + &amd_pstate_profile_ops); + if (IS_ERR(cpudata->ppdev)) { + ret =3D PTR_ERR(cpudata->ppdev); + goto cleanup; + } + /* only enable notifier if things will actually change */ if (cpudata->epp_default_ac !=3D cpudata->epp_default_dc) { ret =3D power_supply_reg_notifier(&cpudata->power_nb); @@ -1227,8 +1328,8 @@ static ssize_t show_energy_performance_available_pref= erences( return offset; } =20 -static ssize_t store_energy_performance_preference( - struct cpufreq_policy *policy, const char *buf, size_t count) +ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, + const char *buf, size_t count) { struct amd_cpudata *cpudata =3D policy->driver_data; ssize_t ret; @@ -1239,16 +1340,22 @@ static ssize_t store_energy_performance_preference( return -EBUSY; } =20 - ret =3D sysfs_match_string(energy_perf_strings, buf); - if (ret < 0) - return -EINVAL; - - if (ret) - epp =3D epp_values[ret]; - else - epp =3D amd_pstate_get_balanced_epp(policy); + /* + * if the value matches a number, use that, otherwise see if + * matches an index in the energy_perf_strings array + */ + ret =3D kstrtou8(buf, 0, &epp); + if (ret) { + ret =3D sysfs_match_string(energy_perf_strings, buf); + if (ret < 0 || ret =3D=3D EPP_INDEX_CUSTOM) + return -EINVAL; + if (ret) + epp =3D epp_values[ret]; + else + epp =3D amd_pstate_get_balanced_epp(policy); + } =20 - if (epp > 0 && policy->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) { + if (epp > 0 && cpudata->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) { pr_debug("EPP cannot be set under performance policy\n"); return -EBUSY; } @@ -1259,9 +1366,9 @@ static ssize_t store_energy_performance_preference( =20 return ret ? ret : count; } +EXPORT_SYMBOL_GPL(store_energy_performance_preference); =20 -static ssize_t show_energy_performance_preference( - struct cpufreq_policy *policy, char *buf) +ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, = char *buf) { struct amd_cpudata *cpudata =3D policy->driver_data; u8 preference, epp; @@ -1282,11 +1389,12 @@ static ssize_t show_energy_performance_preference( preference =3D EPP_INDEX_POWERSAVE; break; default: - return -EINVAL; + return sysfs_emit(buf, "%u\n", epp); } =20 return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } +EXPORT_SYMBOL_GPL(show_energy_performance_preference); =20 static void amd_pstate_driver_cleanup(void) { @@ -1621,10 +1729,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_p= olicy *policy) amd_pstate_acpi_pm_profile_undefined()) { policy->policy =3D CPUFREQ_POLICY_PERFORMANCE; cpudata->epp_default_ac =3D cpudata->epp_default_dc =3D amd_pstate_get_e= pp(cpudata); + cpudata->current_profile =3D PLATFORM_PROFILE_PERFORMANCE; } else { policy->policy =3D CPUFREQ_POLICY_POWERSAVE; cpudata->epp_default_ac =3D AMD_CPPC_EPP_PERFORMANCE; cpudata->epp_default_dc =3D AMD_CPPC_EPP_BALANCE_PERFORMANCE; + cpudata->current_profile =3D PLATFORM_PROFILE_BALANCED; } =20 if (dynamic_epp) { diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index 7bfe5f8115623..9839c7c6558f4 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -9,6 +9,7 @@ #define _LINUX_AMD_PSTATE_H =20 #include +#include =20 /********************************************************************* * AMD P-state INTERFACE * @@ -110,6 +111,11 @@ struct amd_cpudata { u8 epp_default_dc; bool dynamic_epp; struct notifier_block power_nb; + + /* platform profile */ + enum platform_profile_option current_profile; + struct device *ppdev; + char *profile_name; }; =20 /* @@ -126,5 +132,9 @@ enum amd_pstate_mode { const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode); int amd_pstate_get_status(void); int amd_pstate_update_status(const char *buf, size_t size); +ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, + const char *buf, size_t count); +ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, = char *buf); +void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy); =20 #endif /* _LINUX_AMD_PSTATE_H */ --=20 2.43.0 From nobody Sat Feb 7 14:39:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 940152F6918; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oE48U59R" Received: by smtp.kernel.org (Postfix) with ESMTPSA id ACA04C116C6; Tue, 6 Jan 2026 05:15:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767676515; bh=Up228IhCXATNfubrE2DCT/+a50HLpsxmqCVz8EXcOsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oE48U59RIRa2DRTKVuSIl09eEahMt9YR7hnvZQuloR+IQueWzqYwhJNkR4Hy8aftm XdROgKzJcVuJpV/7+lU8A0EB8tSlWYAXL+ZXagKURF6mxKVdW7ztowMlpbpG3PWCMs aTTzQfxx22YewO2w0qzKc8RZoCJ3lLyuFWaaEapKpf823xiPH9l0bzW1QlsEGuYSZT EXAYdvcdH3CSIQpNHhDYZFHC1XtmLXfBnbIHVX7QYQDmxdHRVI8cpBThO1kD37V58+ jQ25VTsjYEhk0J/7VWcVUeFkx2HVufTGUdxUwnOlEREBrDx6M0K3Me3GRCSqhHiqzy WfxqAXdDBsozA== From: "Mario Limonciello (AMD)" To: "Gautham R . Shenoy" Cc: Perry Yuan , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v5 4/5] cpufreq/amd-pstate: Add support for raw EPP writes Date: Mon, 5 Jan 2026 23:14:40 -0600 Message-ID: <20260106051441.60093-5-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106051441.60093-1-superm1@kernel.org> References: <20260106051441.60093-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mario Limonciello The energy performance preference field of the CPPC request MSR supports values from 0 to 255, but the strings only offer 4 values. The other values are useful for tuning the performance of some workloads. Add support for writing the raw energy performance preference value to the sysfs file. If the last value written was an integer then an integer will be returned. If the last value written was a string then a string will be returned. Signed-off-by: Mario Limonciello --- Documentation/admin-guide/pm/amd-pstate.rst | 16 +++++++++++----- drivers/cpufreq/amd-pstate.c | 11 +++++++++-- drivers/cpufreq/amd-pstate.h | 1 + 3 files changed, 21 insertions(+), 7 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index a6745f2358e61..674e76ff9293e 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -280,16 +280,22 @@ A list of all the supported EPP preferences that coul= d be used for These profiles represent different hints that are provided to the low-level firmware about the user's desired energy vs efficiency tradeoff. ``default`` represents the epp value is set by platform -firmware. This attribute is read-only. +firmware. ``custom`` designates that integer values 0-255 may be written +as well. This attribute is read-only. =20 ``energy_performance_preference`` =20 The current energy performance preference can be read from this attribute. and user can change current preference according to energy or performance = needs -Please get all support profiles list from -``energy_performance_available_preferences`` attribute, all the profiles a= re -integer values defined between 0 to 255 when EPP feature is enabled by pla= tform -firmware, but if the dynamic EPP feature is enabled, driver will block wri= tes. +Coarse named profiles are available in the attribute +``energy_performance_available_preferences``. +Users can also write individual integer values between 0 to 255. +When EPP feature is enabled by platform firmware but if the dynamic EPP fe= ature is +enabled, driver will ignore the written value. Lower epp values shift the = bias +towards improved performance while a higher epp value shifts the bias towa= rds +power-savings. The exact impact can change from one platform to the other. +If a valid integer was last written, then a number will be returned on fut= ure reads. +If a valid string was last written then a string will be returned on futur= e reads. This attribute is read-write. =20 ``boost`` diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index e1ccbbdd56d42..14347baf3cefb 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1333,6 +1333,7 @@ ssize_t store_energy_performance_preference(struct cp= ufreq_policy *policy, { struct amd_cpudata *cpudata =3D policy->driver_data; ssize_t ret; + bool raw_epp =3D FALSE; u8 epp; =20 if (cpudata->dynamic_epp) { @@ -1345,6 +1346,7 @@ ssize_t store_energy_performance_preference(struct cp= ufreq_policy *policy, * matches an index in the energy_perf_strings array */ ret =3D kstrtou8(buf, 0, &epp); + raw_epp =3D !ret; if (ret) { ret =3D sysfs_match_string(energy_perf_strings, buf); if (ret < 0 || ret =3D=3D EPP_INDEX_CUSTOM) @@ -1364,7 +1366,9 @@ ssize_t store_energy_performance_preference(struct cp= ufreq_policy *policy, if (ret) return ret; =20 - return ret ? ret : count; + cpudata->raw_epp =3D raw_epp; + + return count; } EXPORT_SYMBOL_GPL(store_energy_performance_preference); =20 @@ -1375,6 +1379,9 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * =20 epp =3D FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached); =20 + if (cpudata->raw_epp) + return sysfs_emit(buf, "%u\n", epp); + switch (epp) { case AMD_CPPC_EPP_PERFORMANCE: preference =3D EPP_INDEX_PERFORMANCE; @@ -1389,7 +1396,7 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * preference =3D EPP_INDEX_POWERSAVE; break; default: - return sysfs_emit(buf, "%u\n", epp); + return -EINVAL; } =20 return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index 9839c7c6558f4..38b575b8ad959 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -110,6 +110,7 @@ struct amd_cpudata { u8 epp_default_ac; u8 epp_default_dc; bool dynamic_epp; + bool raw_epp; struct notifier_block power_nb; =20 /* platform profile */ --=20 2.43.0 From nobody Sat Feb 7 14:39:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3420D2FD1CF; Tue, 6 Jan 2026 05:15:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676516; cv=none; b=oBCSj7mlqIVEofPiThhh9kQxBV+VishvA7QgEeHQbynowh01xzse4vFQTU7LBYPnZb2wEGTwIQl042iqP+gwoTLjudhCsj614n+VrfnvBH+oe1wkW3g/WYJPl2w3xLWCgDlDUzq9ziVFD4CKmpdeGOd5htK99psgH4pPPb1tdXo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767676516; c=relaxed/simple; bh=4Xf5M26QhIx7PvxjoOfMxL9jKXnZ/prTFEPkgVcsvr4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fXEqp92Yk8ktPpZpMmRBFqvZS0itvVdNCd/9ZdYBKed48wRnfVZt3K5bFhotdDkMJctBkFLtF/8SiCStLGb3hAcsvPvc3y7PkKDdXw9VLJ5CDzrsSEf1KU6LMEe1ZJBoJlKDvhHvYgNsSqt05FQoDlAa+TYQP0CcglibO/ZWTvw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qpjWOGXX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qpjWOGXX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7D559C19421; Tue, 6 Jan 2026 05:15:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767676516; bh=4Xf5M26QhIx7PvxjoOfMxL9jKXnZ/prTFEPkgVcsvr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qpjWOGXXujo8syr/PZjNquS7Do0X0Szzg27eCgs/OoXjSr0XylK3mDjASskKOppxM cWgFHsGDzZ4v4uS93ngShmiqWgotLXveSZdyfsvTidFiCNT6YIgK3BHQ4VkmWvQh8D KmUFwEAAUAONeYpozmGgcDG1Fzgv0haMIPRvO1VfmusXAd6dAPQ05qeYL8u0JQseal kKQWFSG4FNvu5Xvn0grXbTaKpvA7dyrx+FN93Y/Hfl6LrJVfF5uuhyKY8mzW4Pxli4 3PqsG7vADGHAPC9MUUY2hbhrzyZQXWAp3RsjmyEOzXNzEabSxLRGte2YXmN6JM7+VU rl83mOQ85o5YA== From: "Mario Limonciello (AMD)" To: "Gautham R . Shenoy" Cc: Perry Yuan , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v5 5/5] cpufreq/amd-pstate-ut: Add a unit test for raw EPP Date: Mon, 5 Jan 2026 23:14:41 -0600 Message-ID: <20260106051441.60093-6-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106051441.60093-1-superm1@kernel.org> References: <20260106051441.60093-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mario Limonciello Ensure that all supported raw EPP values work properly. Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate-ut.c | 58 +++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-u= t.c index 447b9aa5ce40b..d51233b753db6 100644 --- a/drivers/cpufreq/amd-pstate-ut.c +++ b/drivers/cpufreq/amd-pstate-ut.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include =20 @@ -35,6 +36,7 @@ =20 #include "amd-pstate.h" =20 +DEFINE_FREE(cleanup_page, void *, if (_T) free_page((unsigned long)_T)) =20 struct amd_pstate_ut_struct { const char *name; @@ -48,6 +50,7 @@ static int amd_pstate_ut_acpi_cpc_valid(u32 index); static int amd_pstate_ut_check_enabled(u32 index); static int amd_pstate_ut_check_perf(u32 index); static int amd_pstate_ut_check_freq(u32 index); +static int amd_pstate_ut_epp(u32 index); static int amd_pstate_ut_check_driver(u32 index); =20 static struct amd_pstate_ut_struct amd_pstate_ut_cases[] =3D { @@ -55,6 +58,7 @@ static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = =3D { {"amd_pstate_ut_check_enabled", amd_pstate_ut_check_enabled }, {"amd_pstate_ut_check_perf", amd_pstate_ut_check_perf }, {"amd_pstate_ut_check_freq", amd_pstate_ut_check_freq }, + {"amd_pstate_ut_epp", amd_pstate_ut_epp }, {"amd_pstate_ut_check_driver", amd_pstate_ut_check_driver } }; =20 @@ -241,6 +245,60 @@ static int amd_pstate_set_mode(enum amd_pstate_mode mo= de) return amd_pstate_update_status(mode_str, strlen(mode_str)); } =20 +static int amd_pstate_ut_epp(u32 index) +{ + struct cpufreq_policy *policy __free(put_cpufreq_policy) =3D NULL; + void *buf __free(cleanup_page) =3D NULL; + struct amd_cpudata *cpudata; + int ret, cpu =3D 0; + u16 epp; + + policy =3D cpufreq_cpu_get(cpu); + if (!policy) + return -ENODEV; + + cpudata =3D policy->driver_data; + + /* disable dynamic EPP before running test */ + if (cpudata->dynamic_epp) { + pr_debug("Dynamic EPP is enabled, disabling it\n"); + amd_pstate_clear_dynamic_epp(policy); + } + + buf =3D (void *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret =3D amd_pstate_set_mode(AMD_PSTATE_ACTIVE); + if (ret) + return ret; + + for (epp =3D 0; epp <=3D U8_MAX; epp++) { + u8 val; + + /* write all EPP values */ + memset(buf, 0, sizeof(*buf)); + snprintf(buf, PAGE_SIZE, "%d", epp); + ret =3D store_energy_performance_preference(policy, buf, sizeof(*buf)); + if (ret < 0) + return ret; + + /* check if the EPP value reads back correctly for raw numbers */ + memset(buf, 0, sizeof(*buf)); + ret =3D show_energy_performance_preference(policy, buf); + if (ret < 0) + return ret; + strreplace(buf, '\n', '\0'); + ret =3D kstrtou8(buf, 0, &val); + if (!ret && epp !=3D val) { + pr_err("Raw EPP value mismatch: %d !=3D %d\n", epp, val); + return -EINVAL; + } + } + + return 0; +} + static int amd_pstate_ut_check_driver(u32 index) { enum amd_pstate_mode mode1, mode2 =3D AMD_PSTATE_DISABLE; --=20 2.43.0