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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id D68743F70C6; Mon, 5 Jan 2026 18:15:33 -0800 (PST) From: Ratheesh Kannoth To: , , CC: , , , , , Ratheesh Kannoth Subject: [PATCH net-next 08/10] octeontx2: switch: L3 offload support Date: Tue, 6 Jan 2026 07:44:45 +0530 Message-ID: <20260106021447.2359108-9-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260106021447.2359108-1-rkannoth@marvell.com> References: <20260106021447.2359108-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA2MDAxOCBTYWx0ZWRfXx87Sak1USqOi qjN0wtpJ4BlF/vrGAIrrXSHDbTs0QMcNdrq4yXjYgl39mVCodo2Gy7v/IQZSva2NsqiPPP10hMA oCItFDv6lSmELunGbAQ8BDKjmfyldCBhBPW9AOAjuPmb1C14kiGWoVcoRl/OJhO+BPVRvwHsgS+ OF7JGRhOn77zi2zNgGQe8inT3sDVQZVY45SIhlRC1ZIfwV5iERv7MpipFLDyMmRnXiCKEAk4Db5 cHvg5vDOH6xE9VuzADQGZJDuvFv0JeK1U7tzd0XgahZOifIvtKh5lbRPg7S9KuhgmHdfjWVdimh KVPAw0L9HmAspu3rKGIXVE+5vYQ31Otq0M9r3amBUOiwzXa0y2WEY2DRCIwOpxJC1T69fumW2U1 qt9NfeUtFKymZvQdcEVTCQB7nwrgLWhmn7m+4Ndy2Gc53oTewQOa8hLvDJdOEdMP3oS1LqKNr2+ DmLiZVEtdYUNbIEeDKA== X-Proofpoint-ORIG-GUID: 5xEe9nGzIkmpVTHorXo9W3NoQ3rDQfEA X-Authority-Analysis: v=2.4 cv=aLr9aL9m c=1 sm=1 tr=0 ts=695c7049 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=M5GUcnROAAAA:8 a=tTGoQvCruEYILLHsEjQA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-GUID: 5xEe9nGzIkmpVTHorXo9W3NoQ3rDQfEA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-05_02,2026-01-05_01,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Linux route events are parsed to decide on destination DIP/MASK to fwd packets. Switchdev HW flow table is filled with this information. Once populated, all packet with DIP/MASK will be accelerated. Signed-off-by: Ratheesh Kannoth --- .../marvell/octeontx2/af/switch/rvu_sw.c | 2 +- .../marvell/octeontx2/af/switch/rvu_sw_l3.c | 201 ++++++++++++++++++ .../marvell/octeontx2/nic/switch/sw_fib.c | 117 ++++++++++ .../marvell/octeontx2/nic/switch/sw_fib.h | 3 + .../marvell/octeontx2/nic/switch/sw_nb.c | 7 + 5 files changed, 329 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw.c b/dr= ivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw.c index b66f9c2eb981..fe91b0a6baf5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw.c @@ -6,9 +6,9 @@ */ =20 #include "rvu.h" -#include "rvu_sw.h" #include "rvu_sw_l2.h" #include "rvu_sw_fl.h" +#include "rvu_sw.h" =20 u32 rvu_sw_port_id(struct rvu *rvu, u16 pcifunc) { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw_l3.c b= /drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw_l3.c index 2b798d5f0644..0daad60ca949 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw_l3.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/switch/rvu_sw_l3.c @@ -4,11 +4,212 @@ * Copyright (C) 2026 Marvell. * */ + +#include #include "rvu.h" +#include "rvu_sw.h" +#include "rvu_sw_l3.h" + +#define M(_name, _id, _fn_name, _req_type, _rsp_type) \ +static struct _req_type __maybe_unused \ +*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \ +{ \ + struct _req_type *req; \ + \ + req =3D (struct _req_type *)otx2_mbox_alloc_msg_rsp( \ + &rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \ + sizeof(struct _rsp_type)); \ + if (!req) \ + return NULL; \ + req->hdr.sig =3D OTX2_MBOX_REQ_SIG; \ + req->hdr.id =3D _id; \ + return req; \ +} + +MBOX_UP_AF2SWDEV_MESSAGES +#undef M + +static struct workqueue_struct *sw_l3_offl_wq; + +struct l3_entry { + struct list_head list; + struct rvu *rvu; + u32 port_id; + int cnt; + struct fib_entry entry[]; +}; + +static DEFINE_MUTEX(l3_offl_llock); +static LIST_HEAD(l3_offl_lh); +static bool l3_offl_work_running; + +static struct workqueue_struct *sw_l3_offl_wq; +static void sw_l3_offl_work_handler(struct work_struct *work); +static DECLARE_DELAYED_WORK(l3_offl_work, sw_l3_offl_work_handler); + +static void sw_l3_offl_dump(struct l3_entry *l3_entry) +{ + struct fib_entry *entry =3D l3_entry->entry; + int i; + + for (i =3D 0; i < l3_entry->cnt; i++) { + pr_debug("%s:%d cmd=3D%llu port_id=3D%#x dst=3D%#x dst_len=3D%d gw=3D%#= x\n", + __func__, __LINE__, entry->cmd, entry->port_id, entry->dst, + entry->dst_len, entry->gw); + } +} + +static int rvu_sw_l3_offl_rule_push(struct list_head *lh) +{ + struct af2swdev_notify_req *req; + struct fib_entry *entry, *dst; + struct l3_entry *l3_entry; + struct rvu *rvu; + int swdev_pf; + int sz, cnt; + int tot_cnt =3D 0; + + l3_entry =3D list_first_entry_or_null(lh, struct l3_entry, list); + if (!l3_entry) + return 0; + + rvu =3D l3_entry->rvu; + swdev_pf =3D rvu_get_pf(rvu->pdev, rvu->rswitch.pcifunc); + + mutex_lock(&rvu->mbox_lock); + req =3D otx2_mbox_alloc_msg_af2swdev_notify(rvu, swdev_pf); + if (!req) { + mutex_unlock(&rvu->mbox_lock); + return -ENOMEM; + } + + dst =3D &req->entry[0]; + while ((l3_entry =3D + list_first_entry_or_null(lh, + struct l3_entry, list)) !=3D NULL) { + entry =3D l3_entry->entry; + cnt =3D l3_entry->cnt; + sz =3D sizeof(*entry) * cnt; + + memcpy(dst, entry, sz); + tot_cnt +=3D cnt; + dst +=3D cnt; + + sw_l3_offl_dump(l3_entry); + + list_del_init(&l3_entry->list); + kfree(l3_entry); + } + req->flags =3D FIB_CMD; + req->cnt =3D tot_cnt; + + otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, swdev_pf); + otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, swdev_pf); + + mutex_unlock(&rvu->mbox_lock); + return 0; +} + +static atomic64_t req_cnt; +static atomic64_t ack_cnt; +static atomic64_t req_processed; +static LIST_HEAD(l3_local_lh); +static int lcnt; + +static void sw_l3_offl_work_handler(struct work_struct *work) +{ + struct l3_entry *l3_entry; + struct list_head l3lh; + u64 req, ack, proc; + + INIT_LIST_HEAD(&l3lh); + + mutex_lock(&l3_offl_llock); + while (1) { + l3_entry =3D list_first_entry_or_null(&l3_offl_lh, struct l3_entry, list= ); + + if (!l3_entry) + break; + + if (lcnt + l3_entry->cnt > 16) { + req =3D atomic64_read(&req_cnt); + atomic64_set(&ack_cnt, req); + atomic64_set(&req_processed, req); + mutex_unlock(&l3_offl_llock); + goto process; + } + + lcnt +=3D l3_entry->cnt; + + atomic64_inc(&req_cnt); + list_del_init(&l3_entry->list); + list_add_tail(&l3_entry->list, &l3_local_lh); + } + mutex_unlock(&l3_offl_llock); + + req =3D atomic64_read(&req_cnt); + ack =3D atomic64_read(&ack_cnt); + + if (req > ack) { + atomic64_set(&ack_cnt, req); + queue_delayed_work(sw_l3_offl_wq, &l3_offl_work, + msecs_to_jiffies(100)); + return; + } + + proc =3D atomic64_read(&req_processed); + if (req =3D=3D proc) { + queue_delayed_work(sw_l3_offl_wq, &l3_offl_work, + msecs_to_jiffies(1000)); + return; + } + + atomic64_set(&req_processed, req); + +process: + lcnt =3D 0; + + mutex_lock(&l3_offl_llock); + list_splice_init(&l3_local_lh, &l3lh); + mutex_unlock(&l3_offl_llock); + + rvu_sw_l3_offl_rule_push(&l3lh); + + queue_delayed_work(sw_l3_offl_wq, &l3_offl_work, msecs_to_jiffies(100)); +} =20 int rvu_mbox_handler_fib_notify(struct rvu *rvu, struct fib_notify_req *req, struct msg_rsp *rsp) { + struct l3_entry *l3_entry; + int sz; + + if (!(rvu->rswitch.flags & RVU_SWITCH_FLAG_FW_READY)) + return 0; + + sz =3D req->cnt * sizeof(struct fib_entry); + + l3_entry =3D kcalloc(1, sizeof(*l3_entry) + sz, GFP_KERNEL); + if (!l3_entry) + return -ENOMEM; + + l3_entry->port_id =3D rvu_sw_port_id(rvu, req->hdr.pcifunc); + l3_entry->rvu =3D rvu; + l3_entry->cnt =3D req->cnt; + INIT_LIST_HEAD(&l3_entry->list); + memcpy(l3_entry->entry, req->entry, sz); + + mutex_lock(&l3_offl_llock); + list_add_tail(&l3_entry->list, &l3_offl_lh); + mutex_unlock(&l3_offl_llock); + + if (!l3_offl_work_running) { + sw_l3_offl_wq =3D alloc_workqueue("sw_af_fib_wq", 0, 0); + l3_offl_work_running =3D true; + queue_delayed_work(sw_l3_offl_wq, &l3_offl_work, + msecs_to_jiffies(1000)); + } + return 0; } diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.c b/d= rivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.c index 12ddf8119372..662b0daf31d5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.c @@ -4,13 +4,130 @@ * Copyright (C) 2026 Marvell. * */ +#include +#include +#include +#include +#include +#include +#include + +#include "../otx2_reg.h" +#include "../otx2_common.h" +#include "../otx2_struct.h" +#include "../cn10k.h" +#include "sw_nb.h" #include "sw_fib.h" =20 +static DEFINE_SPINLOCK(sw_fib_llock); +static LIST_HEAD(sw_fib_lh); + +static struct workqueue_struct *sw_fib_wq; +static void sw_fib_work_handler(struct work_struct *work); +static DECLARE_DELAYED_WORK(sw_fib_work, sw_fib_work_handler); + +struct sw_fib_list_entry { + struct list_head lh; + struct otx2_nic *pf; + int cnt; + struct fib_entry *entry; +}; + +static void sw_fib_dump(struct fib_entry *entry, int cnt) +{ + int i; + + for (i =3D 0; i < cnt; i++, entry++) { + pr_debug("%s:%d cmd=3D%s gw_valid=3D%d mac_valid=3D%d dst=3D%#x len=3D%d= gw=3D%#x mac=3D%pM nud_state=3D%#x\n", + __func__, __LINE__, + sw_nb_get_cmd2str(entry->cmd), + entry->gw_valid, entry->mac_valid, entry->dst, entry->dst_len, + entry->gw, entry->mac, entry->nud_state); + } +} + +static int sw_fib_notify(struct otx2_nic *pf, + int cnt, + struct fib_entry *entry) +{ + struct fib_notify_req *req; + int rc; + + mutex_lock(&pf->mbox.lock); + req =3D otx2_mbox_alloc_msg_fib_notify(&pf->mbox); + if (!req) { + rc =3D -ENOMEM; + goto out; + } + + req->cnt =3D cnt; + memcpy(req->entry, entry, sizeof(*entry) * cnt); + sw_fib_dump(req->entry, cnt); + + rc =3D otx2_sync_mbox_msg(&pf->mbox); +out: + mutex_unlock(&pf->mbox.lock); + return rc; +} + +static void sw_fib_work_handler(struct work_struct *work) +{ + struct sw_fib_list_entry *lentry; + LIST_HEAD(tlist); + + spin_lock(&sw_fib_llock); + list_splice_init(&sw_fib_lh, &tlist); + spin_unlock(&sw_fib_llock); + + while ((lentry =3D + list_first_entry_or_null(&tlist, + struct sw_fib_list_entry, lh)) !=3D NULL) { + list_del_init(&lentry->lh); + sw_fib_notify(lentry->pf, lentry->cnt, lentry->entry); + kfree(lentry->entry); + kfree(lentry); + } + + spin_lock(&sw_fib_llock); + if (!list_empty(&sw_fib_lh)) + queue_delayed_work(sw_fib_wq, &sw_fib_work, + msecs_to_jiffies(10)); + spin_unlock(&sw_fib_llock); +} + +int sw_fib_add_to_list(struct net_device *dev, + struct fib_entry *entry, int cnt) +{ + struct otx2_nic *pf =3D netdev_priv(dev); + struct sw_fib_list_entry *lentry; + + lentry =3D kcalloc(1, sizeof(*lentry), GFP_ATOMIC); + + lentry->pf =3D pf; + lentry->cnt =3D cnt; + lentry->entry =3D entry; + INIT_LIST_HEAD(&lentry->lh); + + spin_lock(&sw_fib_llock); + list_add_tail(&lentry->lh, &sw_fib_lh); + queue_delayed_work(sw_fib_wq, &sw_fib_work, + msecs_to_jiffies(10)); + spin_unlock(&sw_fib_llock); + + return 0; +} + int sw_fib_init(void) { + sw_fib_wq =3D alloc_workqueue("sw_pf_fib_wq", 0, 0); + if (!sw_fib_wq) + return -ENOMEM; + return 0; } =20 void sw_fib_deinit(void) { + cancel_delayed_work_sync(&sw_fib_work); + destroy_workqueue(sw_fib_wq); } diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.h b/d= rivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.h index a51d15c2b80e..50c4fbca81e8 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fib.h @@ -7,6 +7,9 @@ #ifndef SW_FIB_H_ #define SW_FIB_H_ =20 +int sw_fib_add_to_list(struct net_device *dev, + struct fib_entry *entry, int cnt); + void sw_fib_deinit(void); int sw_fib_init(void); =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c b/dr= ivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c index b295940ab8c7..5da643b3cec3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c @@ -301,6 +301,8 @@ static int sw_nb_fib_event(struct notifier_block *nb, =20 pr_debug("pf_dev is %s cnt=3D%d\n", pf_dev->name, cnt); =20 + sw_fib_add_to_list(pf_dev, entries, cnt); + if (!hcnt) return NOTIFY_DONE; =20 @@ -327,6 +329,7 @@ static int sw_nb_fib_event(struct notifier_block *nb, iter->cmd, iter->dst, iter->dst_len, iter->gw, dev->name); } =20 + sw_fib_add_to_list(pf_dev, entries, hcnt); kfree(haddr); return NOTIFY_DONE; } @@ -378,6 +381,7 @@ static int sw_nb_net_event(struct notifier_block *nb, =20 pf =3D netdev_priv(pf_dev); entry->port_id =3D pf->pcifunc; + sw_fib_add_to_list(pf_dev, entry, 1); break; } =20 @@ -461,6 +465,7 @@ static int sw_nb_inetaddr_event(struct notifier_block *= nb, pr_debug("%s:%d pushing inetaddr event from HOST interface address %#x, %= pM, %s\n", __func__, __LINE__, entry->dst, entry->mac, dev->name); =20 + sw_fib_add_to_list(pf_dev, entry, 1); return NOTIFY_DONE; } =20 @@ -524,6 +529,8 @@ static int sw_nb_netdev_event(struct notifier_block *un= used, break; } =20 + sw_fib_add_to_list(pf_dev, entry, 1); + pr_debug("%s:%d pushing netdev event from HOST interface address %#x, %pM= , dev=3D%s\n", __func__, __LINE__, entry->dst, entry->mac, dev->name); =20 --=20 2.43.0