From nobody Tue Feb 10 06:58:47 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7396A330678; Tue, 6 Jan 2026 12:08:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767701313; cv=none; b=DJvh7erza1/ESZxcwb18YY3bRPjYG4PZ9grND6Q8jxNqvGZQaABswPERnKZbwNdOfWlV+qw1fDtebYw5ZAXasmZ5+UY281nzMF2GGYLTOy2vGDk9EZeth4Y3B9CC28ZLa6LeGXA+FYtFCY6zgXTaNEm4LWQEY1n1+RUv4ujBS+g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767701313; c=relaxed/simple; bh=1jZaP4IQ7K4aruUjUiI7SLKS88QFa+Wto9bZT2h4OCw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y3bhni1WGUXxc3ndFPPiKS0iStqkVJbz1GD6xWCdFEyVaXMX851Wsajwqt67obQOCxH57fcBIGQCaJ0Q2LqYE9IzmAWAksPd6OZ4zqsU72HSj0D8XOVUiCSn0b7fw239UQQeIAtRCBhuMcHxJMG3QoWzOPRqnIUY+PqAfbaZ+dg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1C5C41595; Tue, 6 Jan 2026 04:08:24 -0800 (PST) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C04CC3F5A1; Tue, 6 Jan 2026 04:08:28 -0800 (PST) From: Leo Yan Date: Tue, 06 Jan 2026 12:07:58 +0000 Subject: [PATCH RESEND v4 8/8] perf arm_spe: Improve SIMD flags setting Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-perf_support_arm_spev1-3-v4-8-b887bb999f6e@arm.com> References: <20260106-perf_support_arm_spev1-3-v4-0-b887bb999f6e@arm.com> In-Reply-To: <20260106-perf_support_arm_spev1-3-v4-0-b887bb999f6e@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Mark Rutland Cc: Arnaldo Carvalho de Melo , linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767701288; l=3573; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=1jZaP4IQ7K4aruUjUiI7SLKS88QFa+Wto9bZT2h4OCw=; b=LDTA4Zp5J+n5P2+AvfmXclonaHt7/xaFOIedWm5Tgf5clPsEAFMCNfRSUrVSop42GB6oPQ5Qx yF5ysupcebLBiinvOmjMl9N/v86qZTrEH7FFqbR83/Nik2wCUSDzyrE X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Fill in ASE and SME operations for the SIMD arch field. Also set the predicate flags for SVE and SME, but differences between them: SME does not have a predicate flag, so the setting is based on events. SVE provides a predicate flag to indicate whether the predicate is disabled, which allows it to be distinguished into four cases: full predicates, empty predicates, fully predicated, and disabled predicates. After: perf report -s +simd ... 0.06% 0.06% sve-test sve-test [.] setz = [p] SVE 0.06% 0.06% sve-test [kernel.kallsyms] [k] do_raw_spin_lock 0.06% 0.06% sve-test sve-test [.] getz = [p] SVE 0.06% 0.06% sve-test [kernel.kallsyms] [k] timekeeping_advan= ce 0.06% 0.06% sve-test sve-test [.] getz = [d] SVE 0.06% 0.06% sve-test [kernel.kallsyms] [k] update_load_avg 0.06% 0.06% sve-test sve-test [.] getz = [e] SVE 0.05% 0.05% sve-test sve-test [.] setz = [e] SVE 0.05% 0.05% sve-test [kernel.kallsyms] [k] update_curr 0.05% 0.05% sve-test sve-test [.] setz = [d] SVE 0.05% 0.05% sve-test [kernel.kallsyms] [k] do_raw_spin_unlock 0.05% 0.05% sve-test [kernel.kallsyms] [k] timekeeping_updat= e_from_shadow.constprop.0 0.05% 0.05% sve-test sve-test [.] getz = [f] SVE 0.05% 0.05% sve-test sve-test [.] setz = [f] SVE Reviewed-by: James Clark Reviewed-by: Ian Rogers Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 8e9004213e163a46fcacecb4ee32e199a0ec50b2..0a20591d49e821357d3d9ac5598= 74179f1d4f378 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -353,12 +353,26 @@ static struct simd_flags arm_spe__synth_simd_flags(co= nst struct arm_spe_record * =20 if (record->op & ARM_SPE_OP_SVE) simd_flags.arch |=3D SIMD_OP_FLAGS_ARCH_SVE; - - if (record->type & ARM_SPE_SVE_PARTIAL_PRED) - simd_flags.pred |=3D SIMD_OP_FLAGS_PRED_PARTIAL; - - if (record->type & ARM_SPE_SVE_EMPTY_PRED) - simd_flags.pred |=3D SIMD_OP_FLAGS_PRED_EMPTY; + else if (record->op & ARM_SPE_OP_SME) + simd_flags.arch |=3D SIMD_OP_FLAGS_ARCH_SME; + else if (record->op & (ARM_SPE_OP_ASE | ARM_SPE_OP_SIMD_FP)) + simd_flags.arch |=3D SIMD_OP_FLAGS_ARCH_ASE; + + if (record->op & ARM_SPE_OP_SVE) { + if (!(record->op & ARM_SPE_OP_PRED)) + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_DISABLED; + else if (record->type & ARM_SPE_SVE_PARTIAL_PRED) + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_PARTIAL; + else if (record->type & ARM_SPE_SVE_EMPTY_PRED) + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_EMPTY; + else + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_FULL; + } else { + if (record->type & ARM_SPE_SVE_PARTIAL_PRED) + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_PARTIAL; + else if (record->type & ARM_SPE_SVE_EMPTY_PRED) + simd_flags.pred =3D SIMD_OP_FLAGS_PRED_EMPTY; + } =20 return simd_flags; } --=20 2.34.1