From nobody Mon Feb 9 03:47:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF698332ECD; Tue, 6 Jan 2026 16:41:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767717668; cv=none; b=G7ntR3YZjXcpJVyj4hOefKjELztlPfEnGRZ6/bpp88dIYgjcdp9Vb/FSqLjICqPdnDlDfM+FRjS5Nq+f0PRQjx2IFlEjVjX8/scbado5we54loBtuFpkZbv7swtkIhy8VpM1jgzwZdbwst7In1bva757drX0B08olBszYnduvA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767717668; c=relaxed/simple; bh=xYgDOpclz3W8UTnTnuUmKAYjYLa7hYWNW1Pby+Iekzk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qVcQ9/iBZtG9zVEhzJNo2SqfzeACafWZaNygMFYGRLyOLtZi08V+cHP5e8/Ez8HBVJzVow7umqGAgPta+7hV+aIqWO0L9WHoB0OiTR24VgM09kyaHj5MmPzXtAkcRlSydcPvPjG9Z6nKkRMDNWF7Dp29/Q3Xjt8pQodc9hK4USc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RsDP2vAl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RsDP2vAl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 11FCCC19423; Tue, 6 Jan 2026 16:41:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767717667; bh=xYgDOpclz3W8UTnTnuUmKAYjYLa7hYWNW1Pby+Iekzk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=RsDP2vAlKLrLPFnbQHwFQM6Ai+MlwF8cir6fcB0AGuGTC3gNURYdAHZCDSpA0yD8L dQjhBLOYtVlviS/FDFdRybwQwAYmG2qBIHB8SPbJKW5+rF+rWnbs+TWSRHeIJE1J4Y iFrFaQ4njFzKpvJ4kzA7vpJmKryRfSks3C6NXYq+5KqVM4QxNBhOdR6c71QUzD5Yrb ROXLifp0hZYWERXwtorTSrdoN/2GUMb6f4axkbfJsXZ2TAs+RmyEe2lw+8iFUH0TPd khjKUrYpolzQ2ip5tlk6SbtiUeJ7ty43Y1nIztuyZvLVhFm7cm5gzz7iv2xA6btyIB EAQKM5Ni6HC7Q== From: Mark Brown Date: Tue, 06 Jan 2026 16:35:41 +0000 Subject: [PATCH v4 1/5] KVM: selftests: arm64: Report set_id_reg reads of test registers as tests Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-kvm-arm64-set-id-regs-aarch64-v4-1-c7ef4551afb3@kernel.org> References: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> In-Reply-To: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: Ben Horgan , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=4884; i=broonie@kernel.org; h=from:subject:message-id; bh=xYgDOpclz3W8UTnTnuUmKAYjYLa7hYWNW1Pby+Iekzk=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpXTsa3uBncQmuH/EVport8g4bVtAGuwN4sTJ98 LHiN+Mk3SOJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaV07GgAKCRAk1otyXVSH 0AvdB/9QUDq8aJpJ786zjEOu+J2GGOkItaleykX4xf+Cf9honMekP3VUs2PbtmxZkTD0sMhamlH rNEz+K8dh8ae9T+F1uY0Ch2LYJNRmdf6NAC4MpdGiyU8eCgNAiaX5TY+uOR/1OwdAkHuu2TXsaX 1KukooUTNZlzc06/+/qbGPflxC1CXiIHkli3aeuWBt+fpPdZXoTRD3KxUnzlcKRimeimh2k6hFz 8ZsVYg1J3Dz7xXgl9sx+JhGPByZlFIAp7Qk7pWfyRFNU11Ibq8ihvcUSK/71l6B2F1RIpm+CZVQ lqx9zLnPAxluGEuW4Z/0ISmv1XDqOLYf4185uvKOqqkU1LKt X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when we run guest code to validate that the values we wrote to the registers are seen by the guest we assert that these values match using a KVM selftests level assert, resulting in unclear diagnostics if the test fails. Replace this assert with reporting a kselftest test per register. In order to support getting the names of the registers we repaint the array of ID_ registers to store the names and open code the rest. Reviewed-by: Ben Horgan Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 74 +++++++++++++++++++--= ---- 1 file changed, 57 insertions(+), 17 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index c4815d365816..84e9484a4899 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -40,6 +40,7 @@ struct reg_ftr_bits { }; =20 struct test_feature_reg { + const char *name; uint32_t reg; const struct reg_ftr_bits *ftr_bits; }; @@ -218,24 +219,25 @@ static const struct reg_ftr_bits ftr_id_aa64zfr0_el1[= ] =3D { =20 #define TEST_REG(id, table) \ { \ - .reg =3D id, \ + .name =3D #id, \ + .reg =3D SYS_ ## id, \ .ftr_bits =3D &((table)[0]), \ } =20 static struct test_feature_reg test_regs[] =3D { - TEST_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), - TEST_REG(SYS_ID_DFR0_EL1, ftr_id_dfr0_el1), - TEST_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), - TEST_REG(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), - TEST_REG(SYS_ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), - TEST_REG(SYS_ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), - TEST_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), - TEST_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), - TEST_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), - TEST_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), - TEST_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), - TEST_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), - TEST_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), + TEST_REG(ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), + TEST_REG(ID_DFR0_EL1, ftr_id_dfr0_el1), + TEST_REG(ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), + TEST_REG(ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), + TEST_REG(ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), + TEST_REG(ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), + TEST_REG(ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), + TEST_REG(ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), + TEST_REG(ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), + TEST_REG(ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), + TEST_REG(ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), + TEST_REG(ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), + TEST_REG(ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), }; =20 #define GUEST_REG_SYNC(id) GUEST_SYNC_ARGS(0, id, read_sysreg_s(id), 0, 0); @@ -265,6 +267,34 @@ static void guest_code(void) GUEST_DONE(); } =20 +#define GUEST_READ_TEST (ARRAY_SIZE(test_regs) + 6) + +static const char *get_reg_name(u64 id) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) + if (test_regs[i].reg =3D=3D id) + return test_regs[i].name; + + switch (id) { + case SYS_MPIDR_EL1: + return "MPIDR_EL1"; + case SYS_CLIDR_EL1: + return "CLIDR_EL1"; + case SYS_CTR_EL0: + return "CTR_EL0"; + case SYS_MIDR_EL1: + return "MIDR_EL1"; + case SYS_REVIDR_EL1: + return "REVIDR_EL1"; + case SYS_AIDR_EL1: + return "AIDR_EL1"; + default: + TEST_FAIL("Unknown register"); + } +} + /* Return a safe value to a given ftr_bits an ftr value */ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) { @@ -639,6 +669,8 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) { bool done =3D false; struct ucall uc; + uint64_t reg_id, expected_val, guest_val; + bool match; =20 while (!done) { vcpu_run(vcpu); @@ -649,8 +681,16 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) break; case UCALL_SYNC: /* Make sure the written values are seen by guest */ - TEST_ASSERT_EQ(test_reg_vals[encoding_to_range_idx(uc.args[2])], - uc.args[3]); + reg_id =3D uc.args[2]; + guest_val =3D uc.args[3]; + expected_val =3D test_reg_vals[encoding_to_range_idx(reg_id)]; + match =3D expected_val =3D=3D guest_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", + expected_val, guest_val); + ksft_test_result(match, + "%s value seen in guest\n", + get_reg_name(reg_id)); break; case UCALL_DONE: done =3D true; @@ -790,7 +830,7 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST; + test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.3 From nobody Mon Feb 9 03:47:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4BD3338F35; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ngvY8V64" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D2645C116C6; Tue, 6 Jan 2026 16:41:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767717670; bh=/9fO9HltczDK8z6tnrwTg+VY6XIFgeW+AlaaLIcWhnE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ngvY8V64PZc8rB8bDVqvmPoZxj4H8p048XGdCbQopKMg9mofeMuOJp+f25PiBGbVP JVgdtiaJ06JyTYQMqN3H8ocSZF6S8kbplwRxvwajFZle/PJ8rlPxhZgSbiw2pwVI2j /RcJ1btTK59hFttHwAjU0dudxdr3PofdNIDUvvlAg+eQfV2pNdh5GaccwNq+U2nMWC dTmlpO6lyJp4rTL1L/q45ca+gEa6U+jyNfH8/GB3nwS7CgQSeENkPBtDzj/jYuEoM9 rLt5PTZF41q/3+31rBTZ+KYT6PXhbz3prw01gJqK0MPeSL+OyyMAuSG6wg7zttYewx WL3C4kC1aS4XQ== From: Mark Brown Date: Tue, 06 Jan 2026 16:35:42 +0000 Subject: [PATCH v4 2/5] KVM: selftests: arm64: Report register reset tests individually Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-kvm-arm64-set-id-regs-aarch64-v4-2-c7ef4551afb3@kernel.org> References: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> In-Reply-To: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: Ben Horgan , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=2248; i=broonie@kernel.org; h=from:subject:message-id; bh=/9fO9HltczDK8z6tnrwTg+VY6XIFgeW+AlaaLIcWhnE=; b=owGbwMvMwMWocq27KDak/QLjabUkhsxYa6m3vbbzpCs6JrmKBwp9n3BNfkvWnwynZWZf9kws5 v3GvjCjk9GYhYGRi0FWTJFl7bOMVenhElvnP5r/CmYQKxPIFAYuTgGYSMBd9r8yrz6EvpJ/dGzC JXGTzGtBghnzfjut4ouaIXo1/3W/7Wa5W1estnjUM8uqfYxtWSI7UaaqxuYid3T8tKtX4sQrbsp VWvcGr7zr2VeycPqGK11zJ3Mw/iiLr5fovsWQaXre0kVx75LP86vZ396p9TU/ftnc1E4vzM+I3Y CtdaZRe+7+m+lVpiX278X97pf/3MHc9U73+lwPvql71k0weckVaOfWk/bgVA1nwgmZ4syK998Ya j6sbvdu/SzAqnyH1a5+X4rQqh0Mf23y1OffnqfR+c5DStcsasu6b62aFXdM1Y50fc+7YMsvWpqW E6lh8vyb/QmH8HWSP2pvb6muefNWlWOWU/Dp2a736l3cAQ== X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB set_id_regs tests that registers have their values preserved over reset. Currently it reports all registers in a single test with an instantly fatal assert which isn't great for diagnostics, it's hard to tell which register failed or if it's just one register. Change this to report each register as a separate test so that it's clear from the program output which registers have problems. Reviewed-by: Ben Horgan Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 84e9484a4899..b61942895808 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -779,11 +779,18 @@ static void test_assert_id_reg_unchanged(struct kvm_v= cpu *vcpu, uint32_t encodin { size_t idx =3D encoding_to_range_idx(encoding); uint64_t observed; + bool pass; =20 observed =3D vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); - TEST_ASSERT_EQ(test_reg_vals[idx], observed); + pass =3D test_reg_vals[idx] =3D=3D observed; + if (!pass) + ksft_print_msg("%lx !=3D %lx\n", test_reg_vals[idx], observed); + ksft_test_result(pass, "%s unchanged by reset\n", + get_reg_name(encoding)); } =20 +#define ID_REG_RESET_UNCHANGED_TEST (ARRAY_SIZE(test_regs) + 6) + static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu) { /* @@ -801,8 +808,6 @@ static void test_reset_preserves_id_regs(struct kvm_vcp= u *vcpu) test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1); - - ksft_test_result_pass("%s\n", __func__); } =20 int main(void) @@ -830,7 +835,8 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; + test_cnt =3D 2 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST + + ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.3 From nobody Mon Feb 9 03:47:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78F393370F2; Tue, 6 Jan 2026 16:41:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Tue, 6 Jan 2026 16:41:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767717673; bh=vQwUfvI6XJk7lLf5MWlbiQC9X9/qXYABnqN9jIpJqAc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=j3ORLSG7A4BqhpswDYY/TRN+gY+ryF65XLYSIZCDbpJcMgvayG6S4aD154Em3+sFT 83HrEtN2Mo7PK3bGzGSR/KPNpodO8lZy+lT6nNiFvOTqi/fhajkRK9bBBdWiOWOl9x gwRhjHqhUO7OXVuU1ou0iDCY5ShJ5tTEeESaOAztLYIWzf8qkIiTGIxlv8RqkTKxeu 5s2E8eQRFb+ywmB88MxZOBEVW01qM41LC5pFJ2DY3Gd232A7wAh4nm9x2pqRY2rCdn jLXABpoJjASgp8bk60bDoHDmlBTeg+JiuQI89wiYh+NT0T7ehhuz3JyBaz1Bn6VyBa DVH4DDJHAmUUQ== From: Mark Brown Date: Tue, 06 Jan 2026 16:35:43 +0000 Subject: [PATCH v4 3/5] KVM: selftests: arm64: Make set_id_regs bitfield validatity checks non-fatal Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-kvm-arm64-set-id-regs-aarch64-v4-3-c7ef4551afb3@kernel.org> References: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> In-Reply-To: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: Ben Horgan , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=3569; i=broonie@kernel.org; h=from:subject:message-id; bh=vQwUfvI6XJk7lLf5MWlbiQC9X9/qXYABnqN9jIpJqAc=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpXTsbXQiYc4EG7OfsfGydUeV3e3kU3WjEtqHrR nLZODyD+JSJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaV07GwAKCRAk1otyXVSH 0HXeB/4yXr2++OUpaf7D+SElAM4rdRCoBYNhM6EeeipcCPJdoXaqu00e+5IetILU2+BKjG/Ob8j zUOoW5yyBdRS8xet5p8lVGO4ZfgaV0q2jQwFl9YYeGxqIOF5jmdnmcsAH/qTNbwDdKjUN7oUMsY W/TKqebetnTLaulUEOJ4iio9oofwMxVCWgb/WzGs9XlUKDaSMAbpKlHD2XXrCHjXWwMy2R6kr08 TqCLoRXJAYj/5fSHhlkDWZPuomaNidZNMbakV/c0NoRBsToCGhF42l47YlWFzHaMnta72Qn8c8N EBNAqTGhP+ZLcoC/hXIvVfciwclrJxO5uTUG/VQZCjtabAAE X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when set_id_regs encounters a problem checking validation of writes to feature registers it uses an immediately fatal assert to report the problem. This is not idiomatic for kselftest, and it is also not great for usability. The affected bitfield is not clearly reported and further tests do not have their results reported. Switch to using standard kselftest result reporting for the two asserts we do, these are non-fatal asserts so allow the program to continue and the test names include the affected field. Reviewed-by: Ben Horgan Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index b61942895808..5837da63e9b9 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -409,6 +409,7 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *v= cpu, uint64_t reg, uint8_t shift =3D ftr_bits->shift; uint64_t mask =3D ftr_bits->mask; uint64_t val, new_val, ftr; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -421,7 +422,10 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *= vcpu, uint64_t reg, =20 vcpu_set_reg(vcpu, reg, val); new_val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(new_val, val); + match =3D new_val =3D=3D val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", new_val, val); + ksft_test_result(match, "%s valid write succeeded\n", ftr_bits->name); =20 return new_val; } @@ -433,6 +437,7 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, ui= nt64_t reg, uint64_t mask =3D ftr_bits->mask; uint64_t val, old_val, ftr; int r; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -449,7 +454,10 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, u= int64_t reg, "Unexpected KVM_SET_ONE_REG error: r=3D%d, errno=3D%d", r, errno); =20 val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(val, old_val); + match =3D val =3D=3D old_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", val, old_val); + ksft_test_result(match, "%s invalid write rejected\n", ftr_bits->name); } =20 static uint64_t test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE]; @@ -489,7 +497,11 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu,= bool aarch64_only) for (int j =3D 0; ftr_bits[j].type !=3D FTR_END; j++) { /* Skip aarch32 reg on aarch64 only system, since they are RAZ/WI. */ if (aarch64_only && sys_reg_CRm(reg_id) < 4) { - ksft_test_result_skip("%s on AARCH64 only system\n", + ksft_print_msg("%s on AARCH64 only system\n", + ftr_bits[j].name); + ksft_test_result_skip("%s invalid write rejected\n", + ftr_bits[j].name); + ksft_test_result_skip("%s valid write succeeded\n", ftr_bits[j].name); continue; } @@ -501,8 +513,6 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, = bool aarch64_only) =20 test_reg_vals[idx] =3D test_reg_set_success(vcpu, reg, &ftr_bits[j]); - - ksft_test_result_pass("%s\n", ftr_bits[j].name); } } } @@ -839,7 +849,7 @@ int main(void) ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) - test_cnt++; + test_cnt +=3D 2; =20 ksft_set_plan(test_cnt); =20 --=20 2.47.3 From nobody Mon Feb 9 03:47:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1D5D33A9FB; Tue, 6 Jan 2026 16:41:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 6 Jan 2026 16:41:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767717675; bh=sTI4+mDiSC7/2y47jsx14QL1e72vNJ3oFg2mDK4zgrM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DOeqmHh5qiymWpTCrVA2PxPnTd8KXB22aioXLa4c43XOGpAb6j2oBBI6bJ5S5ZVb3 PY2m0KcCmM/XOAtJdzYBStw65Yt26RPTzTSqnV2zg/1cM0LMgiV77Boy9Vcm6OCe8f 1wwiteDwcvLzhF7VQqbaChbeKVEOuwi4hF2D+JcmsAvhA/VVP9ji3Y6F7E5R2/+RXh ulS56GBFVN/Y/SANc3GjyJU298mAxrGv6rVGTH51+atPiCSPtJVnXhXF+XQ2A1oNax g0uvq3vEXz8S6P6WQ/cG+TLkPQXpkm6I0IhKisLmIcERMzhsId0t5+P1Au/jRqPYxM kZs+U0YHJrgng== From: Mark Brown Date: Tue, 06 Jan 2026 16:35:44 +0000 Subject: [PATCH v4 4/5] KVM: selftests: arm64: Skip all 32 bit IDs when set_id_regs is aarch64 only Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-kvm-arm64-set-id-regs-aarch64-v4-4-c7ef4551afb3@kernel.org> References: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> In-Reply-To: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: Ben Horgan , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=4946; i=broonie@kernel.org; h=from:subject:message-id; bh=sTI4+mDiSC7/2y47jsx14QL1e72vNJ3oFg2mDK4zgrM=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpXTscjujbBQ4lD3eAZdJBtGaLW+JKB+w+mLqc1 BL5OwRwcLGJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaV07HAAKCRAk1otyXVSH 0C2zB/9kwog5FznVGbSBeBSliDGc/Nk7qhmjTv9pHOsb1lN9oTkLqK+6MXy5B7otEfU1pbler7C h23w7+3NMwmCsEAMFNG3uN20L/trsNzDk6AdwP1h+qUvjo2f1QBGx/e3HwaOnb649cf0IFMgz/f ZEYrEWYC7Gpo03drn31jy9mP+YAY+Hyi8Mtw4XLHyCsvL0vD4eFjm7WqURAD0FapXVQpVjzgXPZ uv95rsXZiLhCKlQn3CJzF5tMYyOUyi8KCKAf465bQYSvTD1nU02Ozo20+AGAXaexFgFPaCBybiw 7tvxQLhMK6lwsGS37RDSiWXZ3uu07B84zPieS2waZWv3eZX3 X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB On an aarch64 only system the 32 bit ID registers have UNDEFINED values. As a result set_id_regs skips tests for setting fields in these registers when testing an aarch64 only guest. This has the side effect of meaning that we don't record an expected value for these registers, meaning that when the subsequent tests for values being visible in guests and preserved over reset check the value they can spuriously fail. This can be seen by running on an emulated system with both NV and 32 bit enabled, NV will result in the guests created by the test program being 64 bit only but the 32 bit ID registers will have values. Also skip those tests that use the values set in the field setting tests for aarch64 only guests in order to avoid these spurious failures. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 49 ++++++++++++++++++---= ---- 1 file changed, 36 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 5837da63e9b9..908b3c8947d9 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -295,6 +295,13 @@ static const char *get_reg_name(u64 id) } } =20 +static inline bool is_aarch32_id_reg(u64 id) +{ + return (sys_reg_Op0(id) =3D=3D 3 && sys_reg_Op1(id) =3D=3D 0 && + sys_reg_CRn(id) =3D=3D 0 && sys_reg_CRm(id) >=3D 1 && + sys_reg_CRm(id) <=3D 3); +} + /* Return a safe value to a given ftr_bits an ftr value */ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) { @@ -675,7 +682,7 @@ static void test_user_set_mte_reg(struct kvm_vcpu *vcpu) ksft_test_result_pass("ID_AA64PFR1_EL1.MTE_frac no longer 0xF\n"); } =20 -static void test_guest_reg_read(struct kvm_vcpu *vcpu) +static void test_guest_reg_read(struct kvm_vcpu *vcpu, bool aarch64_only) { bool done =3D false; struct ucall uc; @@ -694,6 +701,13 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) reg_id =3D uc.args[2]; guest_val =3D uc.args[3]; expected_val =3D test_reg_vals[encoding_to_range_idx(reg_id)]; + + if (aarch64_only && is_aarch32_id_reg(reg_id)) { + ksft_test_result_skip("%s value seen in guest\n", + get_reg_name(reg_id)); + break; + } + match =3D expected_val =3D=3D guest_val; if (!match) ksft_print_msg("%lx !=3D %lx\n", @@ -785,12 +799,19 @@ static void test_vcpu_non_ftr_id_regs(struct kvm_vcpu= *vcpu) ksft_test_result_pass("%s\n", __func__); } =20 -static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t e= ncoding) +static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t e= ncoding, + bool aarch64_only) { size_t idx =3D encoding_to_range_idx(encoding); uint64_t observed; bool pass; =20 + if (aarch64_only && is_aarch32_id_reg(encoding)) { + ksft_test_result_skip("%s unchanged by reset\n", + get_reg_name(encoding)); + return; + } + observed =3D vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); pass =3D test_reg_vals[idx] =3D=3D observed; if (!pass) @@ -801,7 +822,8 @@ static void test_assert_id_reg_unchanged(struct kvm_vcp= u *vcpu, uint32_t encodin =20 #define ID_REG_RESET_UNCHANGED_TEST (ARRAY_SIZE(test_regs) + 6) =20 -static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu) +static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu, + bool aarch64_only) { /* * Calls KVM_ARM_VCPU_INIT behind the scenes, which will do an @@ -810,14 +832,15 @@ static void test_reset_preserves_id_regs(struct kvm_v= cpu *vcpu) aarch64_vcpu_setup(vcpu, NULL); =20 for (int i =3D 0; i < ARRAY_SIZE(test_regs); i++) - test_assert_id_reg_unchanged(vcpu, test_regs[i].reg); - - test_assert_id_reg_unchanged(vcpu, SYS_MPIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_CLIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_CTR_EL0); - test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1); + test_assert_id_reg_unchanged(vcpu, test_regs[i].reg, + aarch64_only); + + test_assert_id_reg_unchanged(vcpu, SYS_MPIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_CLIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_CTR_EL0, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1, aarch64_only); } =20 int main(void) @@ -859,9 +882,9 @@ int main(void) test_user_set_mpam_reg(vcpu); test_user_set_mte_reg(vcpu); =20 - test_guest_reg_read(vcpu); + test_guest_reg_read(vcpu, aarch64_only); =20 - test_reset_preserves_id_regs(vcpu); + test_reset_preserves_id_regs(vcpu, aarch64_only); =20 kvm_vm_free(vm); =20 --=20 2.47.3 From nobody Mon Feb 9 03:47:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EC0B33B6C2; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QVXwrdpj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40264C19424; Tue, 6 Jan 2026 16:41:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767717678; bh=ze09838bu4tgioSjBEqALwERPyBGKXw8MzIwdv5zFGY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QVXwrdpjRxTlKijpAHvck0fcvXPwrVxZcxwi2UyVL0cQ4ZxkPJ/5QnQMJK+9T0W88 p90vDS2NWetnNMSAg/7uOoejUa330IJitHPLPJyfEIULJM2mhae6+i3NRwRMY9PCKi sDb8MhBVb5D/1nPb8Juz2VEvWz3f13GuWqohRWbVfjZmA5WCbI4fRBH3lAuDQOxQpf pQFYXpuJ6XjxCpZVH6iFOIw65f4Sl/HNdgHKNUCZgtv1WLB38yP5vAKxUpIJpzVbG6 V1HBo0Wuw1+m8vAzKxswsIlV4x91v6M48Pkiu1IsYNpEINpUW+fTAFTtlNVpHhL75H JhYrrKwPbT3Ig== From: Mark Brown Date: Tue, 06 Jan 2026 16:35:45 +0000 Subject: [PATCH v4 5/5] KVM: selftests: arm64: Use is_aarch32_id_reg() in test_vm_ftr_id_regs() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-kvm-arm64-set-id-regs-aarch64-v4-5-c7ef4551afb3@kernel.org> References: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> In-Reply-To: <20260106-kvm-arm64-set-id-regs-aarch64-v4-0-c7ef4551afb3@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: Ben Horgan , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=1148; i=broonie@kernel.org; h=from:subject:message-id; bh=ze09838bu4tgioSjBEqALwERPyBGKXw8MzIwdv5zFGY=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpXTsdxCQGJi+W81ZooYRjsa6d9nw9aQbV7Isdo 0qUUg6pwlaJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaV07HQAKCRAk1otyXVSH 0DXLB/0cXvjbU+zB17kgrZhMg1U0LcQUAP3jU78hE6JW/2AxfQk3FGYKuHLAU35CW7RPJAn+UFW R/kcXTN0X6QvAQzE28x99PfulzNjaiAzzrE2XAF72ljHq5FLMoiFM8LCytx3z0oz0VBBTaHDBBy GjtYk/60l2OFUZ0k0xmBi9R5eO+SLe2J/qEx6YVCO3+4zz4iiWsdZMrZZAfQ/ioG9B/ZaRcmn8d MRaKsNEfAUhN6cv3JNHPG9byRn9JSCerGCTJtQPGABp7T6O43CCBRoBrSmz867KaZka4ci1Jdui c5eYwZLQ8ajj+3Gzj8Ab77ihqbjYAeU8MO7B0iWk9pQeP4vb X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB test_vm_ftr_id_regs() uses a simplified check for 32 bit ID registers since it knows it will only run on ID registers. For clarity update this to use the newly added is_aarch32_id_reg(), there should be no functional change. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 908b3c8947d9..f703c6cfe132 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -503,7 +503,7 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, = bool aarch64_only) =20 for (int j =3D 0; ftr_bits[j].type !=3D FTR_END; j++) { /* Skip aarch32 reg on aarch64 only system, since they are RAZ/WI. */ - if (aarch64_only && sys_reg_CRm(reg_id) < 4) { + if (aarch64_only && is_aarch32_id_reg(reg_id)) { ksft_print_msg("%s on AARCH64 only system\n", ftr_bits[j].name); ksft_test_result_skip("%s invalid write rejected\n", --=20 2.47.3