From nobody Tue Feb 10 01:20:16 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A89034B18C; Tue, 6 Jan 2026 17:44:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721460; cv=none; b=s7dxZ1wUEhy64h/iV6XqVkWof7ag4yAchTVSrUMKQ9G7FCho3tB/3yBGd9oybF+Ls4r3VId4oucloOnY/1AYhPlF+vJR6dmFDIMyCAHJ8VGu7g63z4uN2O6OIDdq+Nyo4mXK/Y+hO/CmsnYJtOw6boqgx3N4UefySgeHQT7NMc0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721460; c=relaxed/simple; bh=sVIIWiddC2GObJ55h7JpMsCaAPT9r5w9pLJ/2lk7eSw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZDDe2CmQwzj/LkT32kKu/J+nRcUtnGFYMc/gtwVRB9APuqAz+A8HWDt7M5IJAJc02f0f6u3Npi0vjdN/G4YIA1WdujgrpaQUX48tfycW3FtkRJNvdy0otlBV8Ixd6ts8xaSGuThF4G4g7vMEuPeil/7aC0nF/5ztLd78nDLIqw4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Sj0NKrJv; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Sj0NKrJv" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 17C05C1E4B2; Tue, 6 Jan 2026 17:43:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 2560860739; Tue, 6 Jan 2026 17:44:17 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E9A8B103C85D5; Tue, 6 Jan 2026 18:44:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721455; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=86uD/TZTv84PLQ1XJXf+TfRW/ckjofOVWcN3ccYwmA0=; b=Sj0NKrJvhaZYV9X5VMCGDcjShsVZmfHBzq1KlV+3ytKBwPWxvihWkXrcl3SkFoy6hcXrw7 0Adqcm5fhDWiNqrCkqgxaGtqOHDZAsr6Jnhzw7TIWOF8kBI4Jz56Ga3Z7cQAJmPR5matMc E5AKWaObk0abHVda4Jb1P2Tt2pFVtX2QG/RQEbnNHsagfPviukQZ8khJy3sorKcfpTnP5i rpzSV7s8tBNrwz605XVFcWq5FFe/rEmA3JnzKKsxw6MI+fYi0Fwj9Hj1PQ4hDu9xr+e1iD D6GPchd54a1+XLimFAYM+xcrTSjroc24eKKPHXD5VvS594XhZw7EHY89yc1H3g== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:31 +0100 Subject: [PATCH v3 15/22] drm/tilcdc: Move tilcdc_init/fini closer to probe/remove Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-15-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Move tilcdc_init/fini functions adjacent to the probe and remove functions in preparation for cleanup and modernization. This improves readability for subsequent commits that will refactor these functions. No functional changes, only code reorganization. Signed-off-by: Kory Maincent (TI.com) --- Change in v3: - New patch. --- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 238 ++++++++++++++++++--------------= ---- 1 file changed, 119 insertions(+), 119 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.c index a82a2494e23d9..c306fc3ae2784 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -140,6 +140,125 @@ static void tilcdc_irq_uninstall(struct drm_device *d= ev) * DRM operations: */ =20 +#if defined(CONFIG_DEBUG_FS) +static const struct { + const char *name; + uint8_t rev; + uint8_t save; + uint32_t reg; +} registers[] =3D { +#define REG(rev, save, reg) { #reg, rev, save, reg } + /* exists in revision 1: */ + REG(1, false, LCDC_PID_REG), + REG(1, true, LCDC_CTRL_REG), + REG(1, false, LCDC_STAT_REG), + REG(1, true, LCDC_RASTER_CTRL_REG), + REG(1, true, LCDC_RASTER_TIMING_0_REG), + REG(1, true, LCDC_RASTER_TIMING_1_REG), + REG(1, true, LCDC_RASTER_TIMING_2_REG), + REG(1, true, LCDC_DMA_CTRL_REG), + REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), + REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), + REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), + REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), + /* new in revision 2: */ + REG(2, false, LCDC_RAW_STAT_REG), + REG(2, false, LCDC_MASKED_STAT_REG), + REG(2, true, LCDC_INT_ENABLE_SET_REG), + REG(2, false, LCDC_INT_ENABLE_CLR_REG), + REG(2, false, LCDC_END_OF_INT_IND_REG), + REG(2, true, LCDC_CLK_ENABLE_REG), +#undef REG +}; + +static int tilcdc_regs_show(struct seq_file *m, void *arg) +{ + struct drm_info_node *node =3D (struct drm_info_node *) m->private; + struct drm_device *dev =3D node->minor->dev; + struct tilcdc_drm_private *priv =3D dev->dev_private; + unsigned i; + + pm_runtime_get_sync(dev->dev); + + seq_printf(m, "revision: %d\n", priv->rev); + + for (i =3D 0; i < ARRAY_SIZE(registers); i++) + if (priv->rev >=3D registers[i].rev) + seq_printf(m, "%s:\t %08x\n", registers[i].name, + tilcdc_read(dev, registers[i].reg)); + + pm_runtime_put_sync(dev->dev); + + return 0; +} + +static int tilcdc_mm_show(struct seq_file *m, void *arg) +{ + struct drm_info_node *node =3D (struct drm_info_node *) m->private; + struct drm_device *dev =3D node->minor->dev; + struct drm_printer p =3D drm_seq_file_printer(m); + drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); + return 0; +} + +static struct drm_info_list tilcdc_debugfs_list[] =3D { + { "regs", tilcdc_regs_show, 0, NULL }, + { "mm", tilcdc_mm_show, 0, NULL }, +}; + +static void tilcdc_debugfs_init(struct drm_minor *minor) +{ + drm_debugfs_create_files(tilcdc_debugfs_list, + ARRAY_SIZE(tilcdc_debugfs_list), + minor->debugfs_root, minor); +} +#endif + +DEFINE_DRM_GEM_DMA_FOPS(fops); + +static const struct drm_driver tilcdc_driver =3D { + .driver_features =3D DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, + DRM_GEM_DMA_DRIVER_OPS, + DRM_FBDEV_DMA_DRIVER_OPS, +#ifdef CONFIG_DEBUG_FS + .debugfs_init =3D tilcdc_debugfs_init, +#endif + .fops =3D &fops, + .name =3D "tilcdc", + .desc =3D "TI LCD Controller DRM", + .major =3D 1, + .minor =3D 0, +}; + +/* + * Power management: + */ + +static int tilcdc_pm_suspend(struct device *dev) +{ + struct drm_device *ddev =3D dev_get_drvdata(dev); + int ret =3D 0; + + ret =3D drm_mode_config_helper_suspend(ddev); + + /* Select sleep pin state */ + pinctrl_pm_select_sleep_state(dev); + + return ret; +} + +static int tilcdc_pm_resume(struct device *dev) +{ + struct drm_device *ddev =3D dev_get_drvdata(dev); + + /* Select default pin state */ + pinctrl_pm_select_default_state(dev); + return drm_mode_config_helper_resume(ddev); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(tilcdc_pm_ops, + tilcdc_pm_suspend, tilcdc_pm_resume); + static void tilcdc_fini(struct drm_device *dev) { struct tilcdc_drm_private *priv =3D dev->dev_private; @@ -384,125 +503,6 @@ static int tilcdc_init(const struct drm_driver *ddrv,= struct device *dev) return ret; } =20 -#if defined(CONFIG_DEBUG_FS) -static const struct { - const char *name; - uint8_t rev; - uint8_t save; - uint32_t reg; -} registers[] =3D { -#define REG(rev, save, reg) { #reg, rev, save, reg } - /* exists in revision 1: */ - REG(1, false, LCDC_PID_REG), - REG(1, true, LCDC_CTRL_REG), - REG(1, false, LCDC_STAT_REG), - REG(1, true, LCDC_RASTER_CTRL_REG), - REG(1, true, LCDC_RASTER_TIMING_0_REG), - REG(1, true, LCDC_RASTER_TIMING_1_REG), - REG(1, true, LCDC_RASTER_TIMING_2_REG), - REG(1, true, LCDC_DMA_CTRL_REG), - REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), - REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), - REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), - REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), - /* new in revision 2: */ - REG(2, false, LCDC_RAW_STAT_REG), - REG(2, false, LCDC_MASKED_STAT_REG), - REG(2, true, LCDC_INT_ENABLE_SET_REG), - REG(2, false, LCDC_INT_ENABLE_CLR_REG), - REG(2, false, LCDC_END_OF_INT_IND_REG), - REG(2, true, LCDC_CLK_ENABLE_REG), -#undef REG -}; - -static int tilcdc_regs_show(struct seq_file *m, void *arg) -{ - struct drm_info_node *node =3D (struct drm_info_node *) m->private; - struct drm_device *dev =3D node->minor->dev; - struct tilcdc_drm_private *priv =3D dev->dev_private; - unsigned i; - - pm_runtime_get_sync(dev->dev); - - seq_printf(m, "revision: %d\n", priv->rev); - - for (i =3D 0; i < ARRAY_SIZE(registers); i++) - if (priv->rev >=3D registers[i].rev) - seq_printf(m, "%s:\t %08x\n", registers[i].name, - tilcdc_read(dev, registers[i].reg)); - - pm_runtime_put_sync(dev->dev); - - return 0; -} - -static int tilcdc_mm_show(struct seq_file *m, void *arg) -{ - struct drm_info_node *node =3D (struct drm_info_node *) m->private; - struct drm_device *dev =3D node->minor->dev; - struct drm_printer p =3D drm_seq_file_printer(m); - drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); - return 0; -} - -static struct drm_info_list tilcdc_debugfs_list[] =3D { - { "regs", tilcdc_regs_show, 0, NULL }, - { "mm", tilcdc_mm_show, 0, NULL }, -}; - -static void tilcdc_debugfs_init(struct drm_minor *minor) -{ - drm_debugfs_create_files(tilcdc_debugfs_list, - ARRAY_SIZE(tilcdc_debugfs_list), - minor->debugfs_root, minor); -} -#endif - -DEFINE_DRM_GEM_DMA_FOPS(fops); - -static const struct drm_driver tilcdc_driver =3D { - .driver_features =3D DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, - DRM_GEM_DMA_DRIVER_OPS, - DRM_FBDEV_DMA_DRIVER_OPS, -#ifdef CONFIG_DEBUG_FS - .debugfs_init =3D tilcdc_debugfs_init, -#endif - .fops =3D &fops, - .name =3D "tilcdc", - .desc =3D "TI LCD Controller DRM", - .major =3D 1, - .minor =3D 0, -}; - -/* - * Power management: - */ - -static int tilcdc_pm_suspend(struct device *dev) -{ - struct drm_device *ddev =3D dev_get_drvdata(dev); - int ret =3D 0; - - ret =3D drm_mode_config_helper_suspend(ddev); - - /* Select sleep pin state */ - pinctrl_pm_select_sleep_state(dev); - - return ret; -} - -static int tilcdc_pm_resume(struct device *dev) -{ - struct drm_device *ddev =3D dev_get_drvdata(dev); - - /* Select default pin state */ - pinctrl_pm_select_default_state(dev); - return drm_mode_config_helper_resume(ddev); -} - -static DEFINE_SIMPLE_DEV_PM_OPS(tilcdc_pm_ops, - tilcdc_pm_suspend, tilcdc_pm_resume); - static int tilcdc_pdev_probe(struct platform_device *pdev) { /* bail out early if no DT data: */ --=20 2.43.0