From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1E4733FE2B; Tue, 6 Jan 2026 17:43:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721407; cv=none; b=HQNhuCd2kPGCaeDEasYcl9sBBFp4JP4RJ6LZPia7z0pJBZ/Jr5yUlYaHfkX2v6I+8bjPpsUWHj2mKxKpsabLJgCa40yofgaIirsOBjl2PYmD6R12WUDRDme2tnRcFjlzq8WVYSXTjE0RQcfcwXzm9Y0KYQWZLP4vbdbHpv9HWfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721407; c=relaxed/simple; bh=f0RIJwgQVq/mV+rQhublJd9MGZJIHAh4csiPypk9fmM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=huLVVYcr5kLGlr3hFKrpUpzThcg3JrPdLHPsaAbE2/AWFjLaGnrhdC4x0sLzKxRZY6TU1sks1l7HQ4px4Z8b9JE10V8C4Cs6yYn1EfUrJ7hB+4vXliHGDHKS6Dn6c3a2EXyvFXi0Z7v1SCcjjoI72UDezeQJRrurs9LgSct26tQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=tvVwcC8U; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="tvVwcC8U" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id E602FC1E4AB; Tue, 6 Jan 2026 17:42:56 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C3A0C60739; Tue, 6 Jan 2026 17:43:22 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 447E5103C81A0; Tue, 6 Jan 2026 18:43:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721401; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=fbSfNwB1WkSY2iPd/6BPZFGgPTacQL14qwc+lCPe/vo=; b=tvVwcC8UeJJh49uRdXVrnooCOXaJTZfK1m8Plsrf3n5nVyMnlI57ZJl2k5kkE2QSivkkU6 PB4jCWb0GXCAaeB83P8Zag1qGn89K/gEkdfWDxj7n84oz2oynIUlUYcVTKRbkLIdfjJQpm brtFLpJwORGZZZik7HjQo8ZDx+fLAsY7QG0Ndi7xmWJ2O5y8SZeU1PkNYoRQJLIL4gqLkG pkGgVQbY9f+eCeebDIxMiyf67VdlPOdUbj6Bj+HzscZ4jOxyNUviL8Yx5IJ5i3jhLynQKJ UWe+pqCkeQatyHy2V0lFgHAZOk/fal34bFAo6SIQ8rOptq3th2ObvjQLoY5EZQ== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:17 +0100 Subject: [PATCH v3 01/22] dt-bindings: display: tilcdc: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-1-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Convert the device tree binding documentation for tilcdc from plain text to DT binding schema. Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Krzysztof Kozlowski --- Change in v3: - Rename binding file to ti,am33xx-tilcdc.yaml. - Use generic node name and drop unused label. --- .../bindings/display/tilcdc/ti,am33xx-tilcdc.yaml | 100 +++++++++++++++++= ++++ .../devicetree/bindings/display/tilcdc/tilcdc.txt | 82 ----------------- 2 files changed, 100 insertions(+), 82 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-til= cdc.yaml b/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-tilcd= c.yaml new file mode 100644 index 0000000000000..eb0ebb678fa87 --- /dev/null +++ b/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-tilcdc.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Bootlin +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/tilcdc/ti,am33xx-tilcdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LCD Controller, found on AM335x, DA850, AM18x and OMAP-L138 + +maintainers: + - Kory Maincent + +properties: + compatible: + enum: + - ti,am33xx-tilcdc + - ti,da850-tilcdc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: + Name of the hwmod associated to the LCDC + + max-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixels per second that the memory interface / lcd + controller combination can sustain + # maximum: 2048*2048*60 + maximum: 251658240 + + max-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum horizontal pixel width supported by the lcd controller. + maximum: 2048 + + max-pixelclock: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixel clock that can be supported by the lcd controller + in KHz. + + blue-and-red-wiring: + enum: [straight, crossed] + description: + This property deals with the LCDC revision 2 (found on AM335x) + color errata [1]. + - "straight" indicates normal wiring that supports RGB565, + BGR888, and XBGR8888 color formats. + - "crossed" indicates wiring that has blue and red wires + crossed. This setup supports BGR565, RGB888 and XRGB8888 + formats. + - If the property is not present or its value is not recognized + the legacy mode is assumed. This configuration supports RGB565, + RGB888 and XRGB8888 formats. However, depending on wiring, the red + and blue colors are swapped in either 16 or 24-bit color modes. + + [1] There is an errata about AM335x color wiring. For 16-bit color + mode the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), + but for 24 bit color modes the wiring of blue and red components is + crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is + for Blue[3-7]. For more details see section 3.1.1 in AM335x + Silicon Errata + https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratur= eNumber=3Dsprz360 + +required: + - compatible + - interrupts + - reg + - port + +additionalProperties: false + +examples: + - | + display-controller@4830e000 { + compatible =3D "ti,am33xx-tilcdc"; + reg =3D <0x4830e000 0x1000>; + interrupt-parent =3D <&intc>; + interrupts =3D <36>; + ti,hwmods =3D "lcdc"; + + blue-and-red-wiring =3D "crossed"; + + port { + endpoint { + remote-endpoint =3D <&hdmi_0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/= Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt deleted file mode 100644 index 3b3d0bbfcfff4..0000000000000 --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +++ /dev/null @@ -1,82 +0,0 @@ -Device-Tree bindings for tilcdc DRM driver - -Required properties: - - compatible: value should be one of the following: - - "ti,am33xx-tilcdc" for AM335x based boards - - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards - - interrupts: the interrupt number - - reg: base address and size of the LCDC device - -Recommended properties: - - ti,hwmods: Name of the hwmod associated to the LCDC - -Optional properties: - - max-bandwidth: The maximum pixels per second that the memory - interface / lcd controller combination can sustain - - max-width: The maximum horizontal pixel width supported by - the lcd controller. - - max-pixelclock: The maximum pixel clock that can be supported - by the lcd controller in KHz. - - blue-and-red-wiring: Recognized values "straight" or "crossed". - This property deals with the LCDC revision 2 (found on AM335x) - color errata [1]. - - "straight" indicates normal wiring that supports RGB565, - BGR888, and XBGR8888 color formats. - - "crossed" indicates wiring that has blue and red wires - crossed. This setup supports BGR565, RGB888 and XRGB8888 - formats. - - If the property is not present or its value is not recognized - the legacy mode is assumed. This configuration supports RGB565, - RGB888 and XRGB8888 formats. However, depending on wiring, the red - and blue colors are swapped in either 16 or 24-bit color modes. - -Optional nodes: - - - port/ports: to describe a connection to an external encoder. The - binding follows Documentation/devicetree/bindings/graph.txt and - supports a single port with a single endpoint. - - - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and - Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for con= necting - tfp410 DVI encoder or lcd panel to lcdc - -[1] There is an errata about AM335x color wiring. For 16-bit color mode - the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), - but for 24 bit color modes the wiring of blue and red components is - crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is - for Blue[3-7]. For more details see section 3.1.1 in AM335x - Silicon Errata: - https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNu= mber=3Dsprz360 - -Example: - - fb: fb@4830e000 { - compatible =3D "ti,am33xx-tilcdc", "ti,da850-tilcdc"; - reg =3D <0x4830e000 0x1000>; - interrupt-parent =3D <&intc>; - interrupts =3D <36>; - ti,hwmods =3D "lcdc"; - - blue-and-red-wiring =3D "crossed"; - - port { - lcdc_0: endpoint { - remote-endpoint =3D <&hdmi_0>; - }; - }; - }; - - tda19988: tda19988 { - compatible =3D "nxp,tda998x"; - reg =3D <0x70>; - - pinctrl-names =3D "default", "off"; - pinctrl-0 =3D <&nxp_hdmi_bonelt_pins>; - pinctrl-1 =3D <&nxp_hdmi_bonelt_off_pins>; - - port { - hdmi_0: endpoint { - remote-endpoint =3D <&lcdc_0>; - }; - }; - }; --=20 2.43.0 From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80A2E335557; Tue, 6 Jan 2026 17:43:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721411; cv=none; b=uaKcpnEJlhM9wLPYxAIC155j2ym7hTcHfPIdxt+c40yOwolaHyryQafz0dnQ4Iw2CE5MUJ/Zajucz3sAdej3j34jEAZUXN7j3vmVpvpWfkET4O3U6CC4f4TFPr1iVUCdj8f9E3HlKMpyKpmH+MlCBhg8Q7o5F44Op+zlj4wHN7s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721411; c=relaxed/simple; bh=yGejKaZh5ByrBfXLcr2NmrBBEetDse4CwlTbHeXyB7s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CP1Au+pG3Fd69LcVNOqHzLeYlVdmw32L5KkKiim+Ssw1Xk+jhM2yxylgigbu0qsb9pWgMMjdrMo/onQObrCGt18Lobg/pC0fwkq0AFFItH1ZoWa+MyrAG99o1uEufliqPtoQcLk0P4XeTGN9TvQ2RjDM3OyVp5/szXautz/31nw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=KTHcErS8; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="KTHcErS8" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id ED2E04E41FB5; Tue, 6 Jan 2026 17:43:26 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C2B4760739; Tue, 6 Jan 2026 17:43:26 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 82B5B103C81A7; Tue, 6 Jan 2026 18:43:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721404; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=9pRdDo0hFTS055NfI0T4ilJaSpXgnD1Q6tcrd1hCPuE=; b=KTHcErS8R07Xjr4q8SgyZe2RC3+pN3SHAYbaUsuWaye2mjwkcknuzhWZtKj3B6qYY08dzT DKBd2ysp0dP2wiODeN6I2EB4DIamW6Ii2F52pEtm1hTs8gLKjDjmE1ynMW4t0xGhrP65nw xPU/ImWaQyMrYy3LT3Xh6i7iY7237Zclri1X08eOcAXakpokrczurekZsTlzi8mBi9OtgH zCNTUVHftDncq2eeCkge48kBqXbc/tNksYg+JzuOfYi9yxXMwUWgsbbwosC4vAei8IVmF4 kEIvK77qCODVGScYxe78TSNb3chDYwdMm8cSlK6PSUkG4HOVXIwBPZ9zjpomDg== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:18 +0100 Subject: [PATCH v3 02/22] dt-bindings: display: tilcdc: Mark panel binding as deprecated Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-2-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Mark the ti,tilcdc,panel binding as deprecated in the documentation. This legacy binding should no longer be used for new designs. Users should migrate to the standard DRM panel bindings instead. Acked-by: Krzysztof Kozlowski Signed-off-by: Kory Maincent (TI.com) --- Change in v2: - New patch --- Documentation/devicetree/bindings/display/tilcdc/panel.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/tilcdc/panel.txt b/D= ocumentation/devicetree/bindings/display/tilcdc/panel.txt index 808216310ea27..b973174d704ed 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/panel.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/panel.txt @@ -1,4 +1,5 @@ Device-Tree bindings for tilcdc DRM generic panel output driver +This binding is deprecated and should not be used. =20 Required properties: - compatible: value should be "ti,tilcdc,panel". --=20 2.43.0 From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29986345CB0; Tue, 6 Jan 2026 17:43:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721414; cv=none; b=BFm9MHhWt9jMhWJRuKdDxf/yNOVqiL0z5PSrW0Vr+64r9Xt/ZHUXyFQHt/TuOh+BlXAHB9X4UwyEu3DpKW+17806h33PmP45Rp0BjpGM9ZTduy47c7e7IIY7jmST8YX1V4pbltF9ols7L1IcmvwKq85SEBXf/k7pmmEHIYQY7mI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721414; c=relaxed/simple; bh=zH6ddwMZf6e4Bua7tANEEOZOr9Vjd0AeuM3WhJ3M9R8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WE0SHb7ojgzbg6TI8J6UbW4smsm9AKLC0wKyRgIuCtuzmCPP7LIcUvrCTCDeUP7TJrGG9BJgkFpQ/JHA6Uy+dNB2GEwtqo7S2wIG3/vTabv/fw8/nC9imck+G/eAYBk2OdMSujW/b+3LoZDDQrGqeZsphJtYpyTuJ/Sd2C1Gx6c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=obY0pm8o; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="obY0pm8o" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id D68231A26A8; Tue, 6 Jan 2026 17:43:30 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id A95F660739; Tue, 6 Jan 2026 17:43:30 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 62358103C830C; Tue, 6 Jan 2026 18:43:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721408; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RJmCdmjf1cJp6uWKepJHYg4mCo27O3rNk6xDNkv07d0=; b=obY0pm8oG5523U438IUvNf3COd4DX5occ2li6h3MfiRPS9edcUhwXIzGTJnFASvevhIf2K PHFr/cImBioWA1d+hwsm50BqxGiV93sTvHxmztUP5Qbf12qHWxLewWBPQasSmaf9Oelihi 0P8osqYI6VdQ43PmI4fsva2B4xjsVaNdvp9KggumP9LG6ZML0uio2gT+W+Ko/ZSUweLSZP miZ+P8SA0uqJJtyLku9bKgopv3uqIAQoCxHKKQVpx/kZAkBTPobl7dRqJOVKmhoXd0iek0 srzwWZBty9IF1h5wLPWOtJtuR/RUik2XIUXtq2k1W8cH8O3Z/Ne/uaSQMapMzg== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:19 +0100 Subject: [PATCH v3 03/22] drm/tilcdc: Remove simulate_vesa_sync flag Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-3-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The tilcdc hardware does not generate VESA-compliant sync signals. It aligns the vertical sync (VS) on the second edge of the horizontal sync (HS) instead of the first edge. To compensate for this hardware behavior, the driver applies a timing adjustment in mode_fixup(). Previously, this adjustment was conditional based on the simulate_vesa_sync flag, which was only set when using external encoders. This appears problematic because: 1. The timing adjustment seems needed for the hardware behavior regardless of whether an external encoder is used 2. The external encoder infrastructure is driver-specific and being removed due to design issues 3. Boards using tilcdc without bridges (e.g., am335x-evm, am335x-evmsk) may not be getting the necessary timing adjustments Remove the simulate_vesa_sync flag and apply the VESA sync timing adjustment unconditionally, ensuring consistent behavior across all configurations. While it's unclear if the previous conditional behavior was causing actual issues, the unconditional adjustment better reflects the hardware's characteristics. Reviewed-by: Luca Ceresoli Signed-off-by: Kory Maincent (TI.com) --- Only few board currently use tilcdc not associated to a bridge like the am335x_evm or the am335x-evmsk. --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 ---------------- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 -- drivers/gpu/drm/tilcdc/tilcdc_external.c | 1 - 3 files changed, 19 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/= tilcdc_crtc.c index 52c95131af5af..b06b1453db2dd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -47,9 +47,6 @@ struct tilcdc_crtc { =20 struct drm_framebuffer *next_fb; =20 - /* Only set if an external encoder is connected */ - bool simulate_vesa_sync; - int sync_lost_count; bool frame_intact; struct work_struct recover_work; @@ -642,11 +639,6 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *cr= tc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { - struct tilcdc_crtc *tilcdc_crtc =3D to_tilcdc_crtc(crtc); - - if (!tilcdc_crtc->simulate_vesa_sync) - return true; - /* * tilcdc does not generate VESA-compliant sync but aligns * VS on the second edge of HS instead of first edge. @@ -866,14 +858,6 @@ void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, tilcdc_crtc->info =3D info; } =20 -void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, - bool simulate_vesa_sync) -{ - struct tilcdc_crtc *tilcdc_crtc =3D to_tilcdc_crtc(crtc); - - tilcdc_crtc->simulate_vesa_sync =3D simulate_vesa_sync; -} - void tilcdc_crtc_update_clk(struct drm_crtc *crtc) { struct drm_device *dev =3D crtc->dev; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.h index 58b276f82a669..3aba3a1155ba0 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -160,8 +160,6 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); void tilcdc_crtc_update_clk(struct drm_crtc *crtc); void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, const struct tilcdc_panel_info *info); -void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, - bool simulate_vesa_sync); void tilcdc_crtc_shutdown(struct drm_crtc *crtc); void tilcdc_crtc_destroy(struct drm_crtc *crtc); int tilcdc_crtc_update_fb(struct drm_crtc *crtc, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/til= cdc/tilcdc_external.c index 3b86d002ef62e..da755a411d9ff 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c @@ -80,7 +80,6 @@ int tilcdc_add_component_encoder(struct drm_device *ddev) return -ENODEV; =20 /* Only tda998x is supported at the moment. */ - tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true); tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x); =20 return 0; --=20 2.43.0 From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01404303C88; 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arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="vYnqF2Ek" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id A82A61A26A6; Tue, 6 Jan 2026 17:43:34 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 7A60460739; Tue, 6 Jan 2026 17:43:34 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7915C103C81A7; Tue, 6 Jan 2026 18:43:29 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721412; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=QDAXWdUJmd0cA6jKsGtZfG1uf3CKjn7ANSkkLa3ofEA=; b=vYnqF2EkgkmmXCsKrRYap1MVBVqcoyb9kXkDFVtJHHTuNqG35YjHVgnWO9pFeLzbaydFWY +3svXJrg4sogpTbDg2+8rI6y6Glck/fbS5ItS/s6dXaJ53LC9ly9nXOAS5b9+OmhQq+RPe xprF3WlYTVNn6eoi9TDQGnT+oMgVS1FAibxOkwhHsuR0pBY3e8KJa5C1kVyiORr3zMdIA5 KiVaXMQmIvG+5HqDSSTcFurx0EABTDeYWUcafQdSVl+ysMcGZAW4GBKFeb9DuHkSjAJcOL GkB7TEUrK1mTQQVODMGcbtoDFzA1VQyypVsg2bnVfM3mNEKl1Ynv5ZvKuBFIRQ== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:20 +0100 Subject: [PATCH v3 04/22] drm/tilcdc: Add support for DRM bus flags and simplify panel config Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-4-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Migrate CRTC mode configuration to use standard DRM bus flags in preparation for removing the tilcdc_panel driver and its custom tilcdc_panel_info structure. Add support for DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE and DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE flags to control pixel clock and sync signal edge polarity, while maintaining backward compatibility with the existing tilcdc panel info structure. Simplify several hardware parameters by setting them to fixed defaults based on common usage across existing device trees: - DMA burst size: 16 (previously configurable via switch statement) - AC bias frequency: 255 (previously panel-specific) - FIFO DMA request delay: 128 (previously panel-specific) These parameters show no variation in real-world usage, so hardcoding them simplifies the driver without losing functionality. Preserve FIFO threshold configurability by detecting the SoC type, as this parameter varies between AM33xx (8) and DA850 (16) platforms. Reviewed-by: Luca Ceresoli Signed-off-by: Kory Maincent (TI.com) --- Change in v2: - Use SoC type instead of devicetree parameter to set FIFO threshold value. --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 47 +++++++++++++-------------------= ---- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 29 ++++++++++++++++------ drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 ++ 3 files changed, 41 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/= tilcdc_crtc.c index b06b1453db2dd..2309a9a0c925d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -285,27 +285,15 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crt= c) =20 /* Configure the Burst Size and fifo threshold of DMA: */ reg =3D tilcdc_read(dev, LCDC_DMA_CTRL_REG) & ~0x00000770; - switch (info->dma_burst_sz) { - case 1: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_1); - break; - case 2: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_2); - break; - case 4: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_4); - break; - case 8: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_8); - break; - case 16: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16); - break; - default: - dev_err(dev->dev, "invalid burst size\n"); - return; + /* Use 16 bit DMA burst size by default */ + reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16); + if (priv->fifo_th) { + int fifo_th_val =3D ilog2(priv->fifo_th) - 3; + + reg |=3D (fifo_th_val << 8); + } else { + reg |=3D (info->fifo_th << 8); } - reg |=3D (info->fifo_th << 8); tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); =20 /* Configure timings: */ @@ -321,8 +309,8 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) =20 /* Set AC Bias Period and Number of Transitions per Interrupt: */ reg =3D tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; - reg |=3D LCDC_AC_BIAS_FREQUENCY(info->ac_bias) | - LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt); + /* Use 255 AC Bias Pin Frequency by default */ + reg |=3D LCDC_AC_BIAS_FREQUENCY(255); =20 /* * subtract one from hfp, hbp, hsw because the hardware uses @@ -392,20 +380,19 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crt= c) return; } } - reg |=3D info->fdd << 12; + /* Use 128 FIFO DMA Request Delay by default */ + reg |=3D 128 << 12; tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); =20 - if (info->invert_pxl_clk) + if (info->invert_pxl_clk || + mode->flags =3D=3D DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); =20 - if (info->sync_ctrl) - tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); - else - tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); - - if (info->sync_edge) + tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); + if (info->sync_edge || + mode->flags =3D=3D DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE) tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.c index 3dcbec312bacb..60230fa9cec95 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -31,6 +31,11 @@ #include "tilcdc_panel.h" #include "tilcdc_regs.h" =20 +enum { + AM33XX_TILCDC, + DA850_TILCDC, +}; + static LIST_HEAD(module_list); =20 static const u32 tilcdc_rev1_formats[] =3D { DRM_FORMAT_RGB565 }; @@ -192,11 +197,19 @@ static void tilcdc_fini(struct drm_device *dev) drm_dev_put(dev); } =20 +static const struct of_device_id tilcdc_of_match[] =3D { + { .compatible =3D "ti,am33xx-tilcdc", .data =3D (void *)AM33XX_TILCDC}, + { .compatible =3D "ti,da850-tilcdc", .data =3D (void *)DA850_TILCDC}, + { }, +}; +MODULE_DEVICE_TABLE(of, tilcdc_of_match); + static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev) { struct drm_device *ddev; struct platform_device *pdev =3D to_platform_device(dev); struct device_node *node =3D dev->of_node; + const struct of_device_id *of_id; struct tilcdc_drm_private *priv; u32 bpp =3D 0; int ret; @@ -209,6 +222,10 @@ static int tilcdc_init(const struct drm_driver *ddrv, = struct device *dev) if (IS_ERR(ddev)) return PTR_ERR(ddev); =20 + of_id =3D of_match_node(tilcdc_of_match, node); + if (!of_id) + return -ENODEV; + ddev->dev_private =3D priv; platform_set_drvdata(pdev, ddev); drm_mode_config_init(ddev); @@ -309,6 +326,11 @@ static int tilcdc_init(const struct drm_driver *ddrv, = struct device *dev) =20 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); =20 + if ((unsigned int)of_id->data =3D=3D DA850_TILCDC) + priv->fifo_th =3D 16; + else + priv->fifo_th =3D 8; + ret =3D tilcdc_crtc_create(ddev); if (ret < 0) { dev_err(dev, "failed to create crtc\n"); @@ -597,13 +619,6 @@ static void tilcdc_pdev_shutdown(struct platform_devic= e *pdev) drm_atomic_helper_shutdown(platform_get_drvdata(pdev)); } =20 -static const struct of_device_id tilcdc_of_match[] =3D { - { .compatible =3D "ti,am33xx-tilcdc", }, - { .compatible =3D "ti,da850-tilcdc", }, - { }, -}; -MODULE_DEVICE_TABLE(of, tilcdc_of_match); - static struct platform_driver tilcdc_platform_driver =3D { .probe =3D tilcdc_pdev_probe, .remove =3D tilcdc_pdev_remove, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.h index 3aba3a1155ba0..79078b4ae7393 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -61,6 +61,8 @@ struct tilcdc_drm_private { */ uint32_t max_width; =20 + u32 fifo_th; + /* Supported pixel formats */ const uint32_t *pixelformats; uint32_t num_pixelformats; --=20 2.43.0 From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22D1D346E4A for ; Tue, 6 Jan 2026 17:43:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721422; cv=none; b=OUG5sN64cNKUQgPVHWWi7GAWZI3+Mx25k3ULJ5FFm0Rh1tHeN52jGkGHWhLNhfXs84gC8R2W7EnrugQpWo7Rn7jrAr0YkLZ2ZoqyfgR8FEVjhg+fXG7o/mgGBVPN89+dlEh86L/aHI/WApRNyr1rZl/mlTrUKq8Rz0qRMzwpp1M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721422; c=relaxed/simple; bh=obFJtGGsuIxG1H9QUSyyWarbVTihbhaom3n9LbzRb4Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Tue, 6 Jan 2026 17:43:38 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E5D37103C833E; Tue, 6 Jan 2026 18:43:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721416; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=qnZz3V+eqsv88HjL9bfo8fY4ay+fDnSckWD+mpzI2zw=; b=rixvQnIzwkBFC7JXjJF6SLg+y5+IsOASRDgsMYBim2IHGuM23cU3fwu+F12bMi6rRvbWEN hGsgaRMbOCuNSsOMlr+CUzRUV5AOa+VvXPIh4MSHx0FpWswG7ZGwHUPaWO2DOniKNtcN2U iRLsy1OTZrnHRmm6SM99q0+Sl02Cpcv9ujtwHUNhjaZ+i4XLA+3gcfQ1D7dMoKLAjUEgGv Eq1gY+hDS+GfIgDlQb/4qpGeZw87in8P5wQfu90XZh8C1NAwTAtVPdcppp1efy5UC+CtbB 5Kg2Ukohzn3xy/6vixlb7G4suzhaldLBz3UVvAzGQr7ReFdEtJRjt4AHnjk5ow== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:21 +0100 Subject: [PATCH v3 05/22] drm/tilcdc: Convert legacy panel binding via DT overlay at boot time Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-5-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 To maintain backward compatibility while removing the deprecated tilcdc_panel driver, add a tilcdc_panel_legacy subdriver that converts the legacy "ti,tilcdc,panel" devicetree binding to the standard panel-dpi binding at early boot. The conversion uses an embedded device tree overlay that is applied and modified during subsys_initcall. The process: - Apply embedded overlay to create a tilcdc-panel-dpi node with port/endpoint connections to the LCDC - Copy all properties from the legacy panel node to the new tilcdc-panel-dpi node - Copy display-timings from the legacy panel - Convert legacy panel-info properties (invert-pxl-clk, sync-edge) to standard display timing properties (pixelclk-active, syncclk-active) - Disable the legacy panel by removing its compatible property to prevent the deprecated driver from binding The result is a standard tilcdc-panel-dpi node with proper endpoints and timing properties, allowing the DRM panel infrastructure to work with legacy devicetrees without modification. Other legacy panel-info properties are not migrated as they consistently use default values across all mainline devicetrees and can be hardcoded in the tilcdc driver. This feature is optional via CONFIG_DRM_TILCDC_PANEL_LEGACY and should only be enabled for systems with legacy devicetrees containing "ti,tilcdc,panel" nodes. Suggested-by: Tomi Valkeinen Link: https://lore.kernel.org/all/1d9a9269-bfda-4d43-938b-2df6b82b9369@idea= sonboard.com/ Signed-off-by: Kory Maincent (TI.com) --- Using the approach of applying an overlay and then modifying the live device tree is the solution I found that requires no modification of the OF core. Dealing entirely with changesets would bring additional requirements such as phandle resolution management, which is internal to the OF framework. I intend to avoid OF core change to support this legacy binding. Change in v3: - Use __free() macro instead of manual house cleaning. - Enable CONFIG_DRM_TILCDC_PANEL_LEGACY config by default. - Improve config description. - Rename "panel-dpi" to "tilcdc-panel-dpi" to avoid any future conflict. - Use OF changeset instead of modifying the live devicetree step by step. - Add kfree to avoid memory leak. Change in v2: - New patch. --- drivers/gpu/drm/tilcdc/Kconfig | 16 ++ drivers/gpu/drm/tilcdc/Makefile | 2 + drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c | 185 ++++++++++++++++++++= ++++ drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso | 29 ++++ 4 files changed, 232 insertions(+) diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig index 24f9a245ba593..4fca8058eb7db 100644 --- a/drivers/gpu/drm/tilcdc/Kconfig +++ b/drivers/gpu/drm/tilcdc/Kconfig @@ -14,3 +14,19 @@ config DRM_TILCDC controller, for example AM33xx in beagle-bone, DA8xx, or OMAP-L1xx. This driver replaces the FB_DA8XX fbdev driver. =20 +config DRM_TILCDC_PANEL_LEGACY + bool "Support device tree blobs using TI LCDC Panel binding" + default y + depends on DRM_TILCDC + depends on OF + depends on BACKLIGHT_CLASS_DEVICE + depends on PM + select OF_OVERLAY + select DRM_PANEL_SIMPLE + help + Modifies the live device tree at early boot to convert the legacy + "ti,tilcdc,panel" devicetree node to the standard panel-dpi node. + This allows to maintain backward compatibility for boards which + were using the deprecated tilcdc_panel driver. + If you find "ti,tilcdc,panel"-string from your DTB, you probably + need this. Otherwise you do not. diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makef= ile index f5190477de721..6d6a08b5adf40 100644 --- a/drivers/gpu/drm/tilcdc/Makefile +++ b/drivers/gpu/drm/tilcdc/Makefile @@ -11,3 +11,5 @@ tilcdc-y :=3D \ tilcdc_drv.o =20 obj-$(CONFIG_DRM_TILCDC) +=3D tilcdc.o +obj-$(CONFIG_DRM_TILCDC_PANEL_LEGACY) +=3D tilcdc_panel_legacy.o \ + tilcdc_panel_legacy.dtbo.o diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c b/drivers/gpu/drm= /tilcdc/tilcdc_panel_legacy.c new file mode 100644 index 0000000000000..37a69b3cf04b2 --- /dev/null +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Bootlin + * Author: Kory Maincent + * + * To support the legacy "ti,tilcdc,panel" binding, the devicetree has to + * be transformed to the new panel-dpi binding with the endpoint associate= d. + */ + +#include +#include +#include +#include + +/* Embedded dtbo symbols created by cmd_wrap_S_dtb in scripts/Makefile.lib= */ +extern char __dtbo_tilcdc_panel_legacy_begin[]; +extern char __dtbo_tilcdc_panel_legacy_end[]; + +static int __init +tilcdc_panel_update_prop(struct of_changeset *ocs, struct device_node *nod= e, + char *name, void *val, int length) +{ + struct property *prop; + + prop =3D kzalloc(sizeof(*prop), GFP_KERNEL); + if (!prop) + return -ENOMEM; + + prop->name =3D kstrdup(name, GFP_KERNEL); + prop->length =3D length; + prop->value =3D kmemdup(val, length, GFP_KERNEL); + if (!prop->name || !prop->value) { + kfree(prop->name); + kfree(prop->value); + kfree(prop); + return -ENOMEM; + } + + return of_changeset_update_property(ocs, node, prop); +} + +static int __init tilcdc_panel_copy_props(struct device_node *old_panel, + struct device_node *new_panel) +{ + struct device_node *old_timing __free(device_node) =3D NULL; + struct device_node *new_timing __free(device_node) =3D NULL; + struct device_node *panel_info __free(device_node) =3D NULL; + struct device_node *child __free(device_node) =3D NULL; + u32 invert_pxl_clk =3D 0, sync_edge =3D 0; + struct of_changeset ocs; + struct property *prop; + int ret; + + child =3D of_get_child_by_name(old_panel, "display-timings"); + if (!child) + return -EINVAL; + + /* The default display timing is the one specified as native-mode. + * If no native-mode is specified then the first node is assumed + * to be the native mode. + */ + old_timing =3D of_parse_phandle(child, "native-mode", 0); + if (!old_timing) { + old_timing =3D of_get_next_child(child, NULL); + if (!old_timing) + return -EINVAL; + } + + panel_info =3D of_get_child_by_name(old_panel, "panel-info"); + if (!panel_info) + return -EINVAL; + + of_changeset_init(&ocs); + + /* Copy all panel properties to the new panel node */ + for_each_property_of_node(old_panel, prop) { + if (!strncmp(prop->name, "compatible", sizeof("compatible"))) + continue; + + ret =3D tilcdc_panel_update_prop(&ocs, new_panel, prop->name, + prop->value, prop->length); + if (ret) + goto destroy_ocs; + } + + new_timing =3D of_changeset_create_node(&ocs, new_panel, "panel-timing"); + if (!new_timing) { + ret =3D -ENODEV; + goto destroy_ocs; + } + + /* Copy all panel timing properties to the new panel node */ + for_each_property_of_node(old_timing, prop) { + ret =3D tilcdc_panel_update_prop(&ocs, new_timing, prop->name, + prop->value, prop->length); + if (ret) + goto destroy_ocs; + } + + /* Looked only for these two parameter as all the other are always + * set to default and not related to common DRM properties. + */ + of_property_read_u32(panel_info, "invert-pxl-clk", &invert_pxl_clk); + of_property_read_u32(panel_info, "sync-edge", &sync_edge); + + if (!invert_pxl_clk) { + ret =3D tilcdc_panel_update_prop(&ocs, new_timing, "pixelclk-active", + &(u32){cpu_to_be32(1)}, sizeof(u32)); + if (ret) + goto destroy_ocs; + } + + if (!sync_edge) { + ret =3D tilcdc_panel_update_prop(&ocs, new_timing, "syncclk-active", + &(u32){cpu_to_be32(1)}, sizeof(u32)); + if (ret) + goto destroy_ocs; + } + + /* Remove compatible property to avoid any driver compatible match */ + of_changeset_remove_property(&ocs, old_panel, + of_find_property(old_panel, "compatible", NULL)); + + of_changeset_apply(&ocs); + return 0; + +destroy_ocs: + of_changeset_destroy(&ocs); + return ret; +} + +static const struct of_device_id tilcdc_panel_of_match[] __initconst =3D { + { .compatible =3D "ti,tilcdc,panel", }, + {}, +}; + +static const struct of_device_id tilcdc_of_match[] __initconst =3D { + { .compatible =3D "ti,am33xx-tilcdc", }, + { .compatible =3D "ti,da850-tilcdc", }, + {}, +}; + +static int __init tilcdc_panel_legacy_init(void) +{ + struct device_node *new_panel __free(device_node) =3D NULL; + struct device_node *panel __free(device_node) =3D NULL; + struct device_node *lcdc __free(device_node) =3D NULL; + void *dtbo_start; + u32 dtbo_size; + int ovcs_id; + int ret; + + lcdc =3D of_find_matching_node(NULL, tilcdc_of_match); + panel =3D of_find_matching_node(NULL, tilcdc_panel_of_match); + + if (!of_device_is_available(panel) || + !of_device_is_available(lcdc)) + return 0; + + dtbo_start =3D __dtbo_tilcdc_panel_legacy_begin; + dtbo_size =3D __dtbo_tilcdc_panel_legacy_end - + __dtbo_tilcdc_panel_legacy_begin; + + ret =3D of_overlay_fdt_apply(dtbo_start, dtbo_size, &ovcs_id, NULL); + if (ret) + return ret; + + new_panel =3D of_find_node_by_name(NULL, "tilcdc-panel-dpi"); + if (!new_panel) { + ret =3D -ENODEV; + goto overlay_remove; + } + + ret =3D tilcdc_panel_copy_props(panel, new_panel); + if (ret) + goto overlay_remove; + + return 0; + +overlay_remove: + of_overlay_remove(&ovcs_id); + return ret; +} + +subsys_initcall(tilcdc_panel_legacy_init); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso b/drivers/gpu/= drm/tilcdc/tilcdc_panel_legacy.dtso new file mode 100644 index 0000000000000..ae71d10f5ec13 --- /dev/null +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * DTS overlay for converting ti,tilcdc,panel binding to new binding. + * + * Copyright (C) 2025 Bootlin + * Author: Kory Maincent + */ + +/dts-v1/; +/plugin/; + +&{/} { + tilcdc-panel-dpi { + compatible =3D "panel-dpi"; + port { + panel_in: endpoint@0 { + remote-endpoint =3D <&lcd_0>; + }; + }; + }; +}; + +&lcdc { + port { + lcd_0: endpoint@0 { + remote-endpoint =3D <&panel_in>; + }; + }; +}; --=20 2.43.0 From nobody Sun Feb 8 07:58:07 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90598346FB2; Tue, 6 Jan 2026 17:43:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721425; cv=none; b=J9bXkybquNRvxy9mcDhwRzdN1sHUF9DE0XyFgf/UmTzxj+F1kPbsVePLXO3RI/+GMvubZAlxGTsBIFWKJwEFfR4xcksNPqGlLnvNyzcZl9mJ5HHd1fatvPwQYQuKTn5xtC43YvhT0JdsaKevuKpjVUl4WDxI+yTdKANlGIZUiaM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767721425; c=relaxed/simple; bh=Tg/66exnpLIShYtAK87190Bk1rsOoG04lQRwjMUnuR4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Tue, 6 Jan 2026 17:43:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 6ED38103C81A7; Tue, 6 Jan 2026 18:43:37 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767721420; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=QltpuhlV8wIq2FXxKizcHn6SH0iLxXux/T94hekRIGY=; b=WND6cEZAGE21UXfOffCpkddSYoc7TxsDnHas2lQBhJdkHBSeP+h7BT1oCa1frxo3CQoCFx MIAESu5ZsYa7SxLoLMAqjT+vjrjGb9NLM7aixFqRFYOXhGJphmnkOK9QjDzxJphVeKkDvC J2MB76xRPTRUdjPBgdi87BUDjtBVMDtv8VTToVW6oCSwPGH6bQwp5w7vY9G5+i/A3I1AvT VFaJWiWGrC8+y2KehiY0FzQnpNpOPHNzA5CPjOAOB7crQ9Ggm0G34Za6vmYZxeBr45lzOE gvsWHiPiaPKboFZGVuIxKDFgtXYtA14RuGIV6+2txh1NR5krVsg+7ama/nNIZA== From: "Kory Maincent (TI.com)" Date: Tue, 06 Jan 2026 18:42:22 +0100 Subject: [PATCH v3 06/22] drm/tilcdc: Remove tilcdc panel driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260106-feature_tilcdc-v3-6-9bad0f742164@bootlin.com> References: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> In-Reply-To: <20260106-feature_tilcdc-v3-0-9bad0f742164@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , Herve Codina , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The tilcdc panel subdriver is a legacy, non-standard driver that has been replaced by the standard panel-dpi driver and panel-simple infrastructure. With the device tree bindings removed and all in-tree users migrated to use panel-dpi, this driver no longer has any associated device tree bindings or users. The panel-dpi driver combined with DRM bus flags provides equivalent functionality in a standard way that is compatible with the broader DRM panel ecosystem. This removal eliminates 400+ lines of redundant code and completes the migration to standard panel handling. Reviewed-by: Luca Ceresoli Signed-off-by: Kory Maincent (TI.com) --- drivers/gpu/drm/tilcdc/Makefile | 1 - drivers/gpu/drm/tilcdc/tilcdc_drv.c | 3 - drivers/gpu/drm/tilcdc/tilcdc_panel.c | 408 ------------------------------= ---- drivers/gpu/drm/tilcdc/tilcdc_panel.h | 15 -- 4 files changed, 427 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makef= ile index 6d6a08b5adf40..b78204a65ce29 100644 --- a/drivers/gpu/drm/tilcdc/Makefile +++ b/drivers/gpu/drm/tilcdc/Makefile @@ -6,7 +6,6 @@ endif tilcdc-y :=3D \ tilcdc_plane.o \ tilcdc_crtc.o \ - tilcdc_panel.o \ tilcdc_external.o \ tilcdc_drv.o =20 diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.c index 60230fa9cec95..28f09b9c1879b 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -28,7 +28,6 @@ =20 #include "tilcdc_drv.h" #include "tilcdc_external.h" -#include "tilcdc_panel.h" #include "tilcdc_regs.h" =20 enum { @@ -636,7 +635,6 @@ static int __init tilcdc_drm_init(void) return -ENODEV; =20 DBG("init"); - tilcdc_panel_init(); return platform_driver_register(&tilcdc_platform_driver); } =20 @@ -644,7 +642,6 @@ static void __exit tilcdc_drm_fini(void) { DBG("fini"); platform_driver_unregister(&tilcdc_platform_driver); - tilcdc_panel_fini(); } =20 module_init(tilcdc_drm_init); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc= /tilcdc_panel.c deleted file mode 100644 index 262f290d85d91..0000000000000 --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c +++ /dev/null @@ -1,408 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Texas Instruments - * Author: Rob Clark - */ - -#include -#include -#include - -#include