From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB9BA1F09A3 for ; Mon, 5 Jan 2026 13:08:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618506; cv=none; b=UakX7froQvSeVW1zhZjgGsxnXnOkbiQHkGboOrzuiE97HzG2fjZ3cr8QTKUuUviNBMn4sQQOFOfQqHQjVOQfelyspk3zv7QcdrZw509kjtTeGCVWyuOhG+7aPhRxn1eMRzi9glb0IRZ1oYG+miBmwzUdTjtGodlfOBYT4ZwZsPY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618506; c=relaxed/simple; bh=GXaQFe/Is97fVVZGCbnVuhzcHgfOQ+tyK7d4SkC6q98=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ThCprzpLu2RsD/WypNkhXiIOuUnQPxwAWNMau6nRAV0LyOhSEpbaovfao9aFWwCg8yE6wDjYUx75Wx+JgOChw7513ujd1y7D3OjmnaJyRusLsJPMTCKtL8R8jg6bt6hSoKsLNF3IExhazzaF0cxUtdo9GLQBhZnKhtiC7tnVJJg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=qOaLktrK; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="qOaLktrK" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id C3E52C1E487; Mon, 5 Jan 2026 13:07:56 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C18E960726; Mon, 5 Jan 2026 13:08:22 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EE24C103C8416; Mon, 5 Jan 2026 14:08:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618502; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=nAokcdyRaLbj1nu9HhMESdbv4sN2fW/Zlfyc2vVP3vY=; b=qOaLktrKDnHuti5M+HA3l9Bc7IUQUADbaVgmfvzN0RTN3NLUBfJzt0lQz4I1nO8GBuFj4w aFe+5AngL8Quqrb/yCr57noj1r9PIQUF4l/FUyBXcPG9fBN2jYlPTDtAIKjKSEDAJ9oIVw 7xvb0mLE0f02g3le2HX2vreGCVXAz5Ur4k4x88ZcecfqM6OYjmRsBtperNiMFaflLG44x9 qCzm4FrFbGKtLwk2G3Up16lpvGESrtBIdZHQMm5JJcyUeV/5ydgtYGgMWsRspHH2zztPgA m1s+ZJlCj+8eQ24P+KitIfVvhC38mzBbi2cSdjJ/Byutte7XsOEw18WNXyRzTQ== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:00 +0100 Subject: [PATCH net-next 1/9] net: dsa: microchip: Initialize IRQ's mask outside common_setup() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-1-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 The IRQ logic of the KSZ8463 differs from that of other KSZ switches. It doesn't have a 'mask' register but an 'enable' one instead. The common IRQ framework can still be used though as soon as we reverse the logic (using '1' to enable interrupts instead of '0') for KSZ8463 cases. Move the initialization of the kirq->masked outside of ksz_irq_common_setup() to keep this function truly common when IRQ support for the KSZ8463 is added. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 0c10351fe5eb4206210c727ffc2484bfb7168d97..fa392f952f9441cfbeb51498fc9= 411340b58747a 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -2905,7 +2905,6 @@ static int ksz_irq_common_setup(struct ksz_device *de= v, struct ksz_irq *kirq) int ret, n; =20 kirq->dev =3D dev; - kirq->masked =3D ~0; =20 kirq->domain =3D irq_domain_create_simple(dev_fwnode(dev->dev), kirq->nir= qs, 0, &ksz_irq_domain_ops, kirq); @@ -2935,6 +2934,7 @@ static int ksz_girq_setup(struct ksz_device *dev) girq->nirqs =3D dev->info->port_cnt; girq->reg_mask =3D REG_SW_PORT_INT_MASK__1; girq->reg_status =3D REG_SW_PORT_INT_STATUS__1; + girq->masked =3D ~0; snprintf(girq->name, sizeof(girq->name), "global_port_irq"); =20 girq->irq_num =3D dev->irq; @@ -2949,6 +2949,7 @@ static int ksz_pirq_setup(struct ksz_device *dev, u8 = p) pirq->nirqs =3D dev->info->port_nirqs; pirq->reg_mask =3D dev->dev_ops->get_port_addr(p, REG_PORT_INT_MASK); pirq->reg_status =3D dev->dev_ops->get_port_addr(p, REG_PORT_INT_STATUS); + pirq->masked =3D ~0; snprintf(pirq->name, sizeof(pirq->name), "port_irq-%d", p); =20 pirq->irq_num =3D irq_find_mapping(dev->girq.domain, p); --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CFD421D3F3 for ; Mon, 5 Jan 2026 13:08:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618508; cv=none; b=ojtLLkQW3CNhwJU6/ak4i0zvQ0Li49qV2rfH+afEmXIdqujK2OI4q5mHsYQHdzJZk85oTsNUP8ilvPV1QdGFCeC6SJpeBX+4xSLLLng0Zx8vAwqGDIuGt4aorqv1M9Rb9HrCNDWg3NaMW2oAPvJdg1E+yzxKxXftpskBelR3JQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618508; c=relaxed/simple; bh=8agHYfGsTbdc3ErzqoR06YZ4Tg7PdxjqckMeQqhL/Zw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tdwVa+fRydO1FZL1LU0LgnpFg28CyXNV2a4dNBS/tPCNKCymr3fIlcQZ8HdgToEIOzvFE/Otgn/oqDD/ZDNTOW//sga+DT4PxpTTNoH56tsXT/4sP6w9cdnMoa/GbSO9S6DZDWO6uzGQ54nlah4OFdgH3yytHmFLyd8gdcYKMVs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=oM8dFMGs; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="oM8dFMGs" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 6ABDCC1E488; Mon, 5 Jan 2026 13:07:58 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 60EB160726; Mon, 5 Jan 2026 13:08:24 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 51DDA103C8525; Mon, 5 Jan 2026 14:08:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618503; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=jcHdHKeRfk2L2dJr+OgepAfuQM3d1EUGFfjpNce4V24=; b=oM8dFMGsRhzfNp9RC6CRH3392rkU87OeLdXA9htqv/JOPCAVyy5JgY/D6b90sC6miEsaf2 DQ19oQHFh24woKTYI1xUMRyR2xxvR8dSb+qSXuIythF6jGeLbroCfK87zqrRl9MuLQ+aHB AD7NT2xjfLC4NcKpqxdR4qwBNl8k0rlTn3Xmie0tawwQp1sgu6OaqItinfFsn3J5RLb4WE nNLX0au9KkyceQ1y2rZlzhrSnd/I59hgFYDrp5tS+5T6ViGpA3eaJ1e2L1NRXyd+40lJQR C/Pfi1SSxXhMnGbkfq8H87MocKl8W2DgbqwEW9RzBXslmr6M39XQuQ6JBqnwtw== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:01 +0100 Subject: [PATCH net-next 2/9] net: dsa: microchip: Use dynamic irq offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-2-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 The PTP irq_chip operations use an hardcoded IRQ offset in the bit logic. This IRQ offset isn't the same on KSZ8463 than on others switches so it can't use the irq_chip operations. Convey the interrupt bit offset through a new attribute in struct ksz_irq Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 8 +++++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index c65188cd3c0a0ed8dd75ee195cebbe47b3a01ada..3add190e686260bb1807ba03b4b= 153abeead223e 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -108,6 +108,7 @@ struct ksz_irq { int irq_num; char name[16]; struct ksz_device *dev; + u16 irq0_offset; }; =20 struct ksz_ptp_irq { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 997e4a76d0a68448b0ebc76169150687bbc79673..0ac2865ba9c000fa58b974647c9= c88287164cd1c 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1008,7 +1008,7 @@ static irqreturn_t ksz_ptp_irq_thread_fn(int irq, voi= d *dev_id) return IRQ_NONE; =20 for (n =3D 0; n < ptpirq->nirqs; ++n) { - if (data & BIT(n + KSZ_PTP_INT_START)) { + if (data & BIT(n + ptpirq->irq0_offset)) { sub_irq =3D irq_find_mapping(ptpirq->domain, n); handle_nested_irq(sub_irq); ++nhandled; @@ -1023,14 +1023,14 @@ static void ksz_ptp_irq_mask(struct irq_data *d) { struct ksz_irq *kirq =3D irq_data_get_irq_chip_data(d); =20 - kirq->masked &=3D ~BIT(d->hwirq + KSZ_PTP_INT_START); + kirq->masked &=3D ~BIT(d->hwirq + kirq->irq0_offset); } =20 static void ksz_ptp_irq_unmask(struct irq_data *d) { struct ksz_irq *kirq =3D irq_data_get_irq_chip_data(d); =20 - kirq->masked |=3D BIT(d->hwirq + KSZ_PTP_INT_START); + kirq->masked |=3D BIT(d->hwirq + kirq->irq0_offset); } =20 static void ksz_ptp_irq_bus_lock(struct irq_data *d) @@ -1126,6 +1126,8 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) ptpirq->reg_mask =3D ops->get_port_addr(p, REG_PTP_PORT_TX_INT_ENABLE__2); ptpirq->reg_status =3D ops->get_port_addr(p, REG_PTP_PORT_TX_INT_STATUS__2); + ptpirq->irq0_offset =3D KSZ_PTP_INT_START; + snprintf(ptpirq->name, sizeof(ptpirq->name), "ptp-irq-%d", p); =20 init_completion(&port->tstamp_msg_comp); --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89A37224240 for ; Mon, 5 Jan 2026 13:08:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618509; cv=none; b=RXwacqQF/nj7rRF2SmIPxK7RjFvbb1QP+Ym4uE+UAyqnLCThcmueULE86thO+V+Fpea/iqqODIhy0Antw8h7lOkdzFptUVpsUs23LK7tLcKVrPTrIsoVkc95FfRTtS9nO0bSRQmoZzanJ1k+AIa9ky0B0HQlkPbDjXibbbO1now= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618509; c=relaxed/simple; bh=34BAacbaXCRPTlIufrTUReA/4diDnwLT3uTFDTsh6Pc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Mon, 5 Jan 2026 13:08:25 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id C4673103C852D; Mon, 5 Jan 2026 14:08:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618505; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=kIZGUOgrlFFSG+MXDelX5nuX7CrC7Vxiyp0xlM4B0vU=; b=bGHdgN8j7EJjPSIx4ITVX6ZVFhLUd/vSWynZVkvkdFiIp9OFm1mRPMblqk3CDEdnp6DISL JZui9hKzy5hLRZDrVnKmq223SkukmlnWeXs/Sbyv7n2EJySr+lG7Vy+sxQRvwwULTFHZPh PVuG6zBdinWFvF3lQnFzMvLgmAUYNJaVlpXazsQ2FS7uBWtDQgB8o0jRmTF8ctLaeyW+hx kf3gtHP4TFX6o7j2zvq6weA7m3mKWOeyMM55BTg2DQrsC9EprM0rSGYvOBpb5FfVYNlr4c 485a/gFCrnqzJURi7y71mB6tGD243g9lcJbA5OtUdHTRqHtwhQiz9sh+BtdDlQ== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:02 +0100 Subject: [PATCH net-next 3/9] net: dsa: microchip: Use regs[] to access REG_PTP_CLK_CTRL Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-3-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_CLK_CTRL register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_CLK_CTRL register in the regs[] tables. Use the regs[] table to retrieve the PTP_CLK_CTRL register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 19 ++++++++++++------- drivers/net/dsa/microchip/ksz_ptp_reg.h | 3 +-- 4 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index fa392f952f9441cfbeb51498fc9411340b58747a..d7f407370c1cc59402d444e27eb= e44e7a600b441 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -569,6 +569,7 @@ static const u16 ksz8463_regs[] =3D { [S_START_CTRL] =3D 0x01, [S_BROADCAST_CTRL] =3D 0x06, [S_MULTICAST_CTRL] =3D 0x04, + [PTP_CLK_CTRL] =3D 0x0600, }; =20 static const u32 ksz8463_masks[] =3D { @@ -803,6 +804,7 @@ static const u16 ksz9477_regs[] =3D { [REG_SW_PME_CTRL] =3D 0x0006, [REG_PORT_PME_STATUS] =3D 0x0013, [REG_PORT_PME_CTRL] =3D 0x0017, + [PTP_CLK_CTRL] =3D 0x0500, }; =20 static const u32 ksz9477_masks[] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 3add190e686260bb1807ba03b4b153abeead223e..8033cb9d84838705389e6ed52a5= a54aaa8b49497 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -271,6 +271,7 @@ enum ksz_regs { REG_SW_PME_CTRL, REG_PORT_PME_STATUS, REG_PORT_PME_CTRL, + PTP_CLK_CTRL, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 0ac2865ba9c000fa58b974647c9c88287164cd1c..68553d9f1e0e3a3cd6319d73b7f= 9bf6ee2fce7ce 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -585,13 +585,14 @@ void ksz_port_deferred_xmit(struct kthread_work *work) =20 static int _ksz_ptp_gettime(struct ksz_device *dev, struct timespec64 *ts) { + const u16 *regs =3D dev->info->regs; u32 nanoseconds; u32 seconds; u8 phase; int ret; =20 /* Copy current PTP clock into shadow registers and read */ - ret =3D ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_READ_TIME, PTP_READ_TIME); + ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_READ_TIME, PTP_READ_TIME); if (ret) return ret; =20 @@ -676,6 +677,7 @@ static int ksz_ptp_settime(struct ptp_clock_info *ptp, { struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + const u16 *regs =3D dev->info->regs; int ret; =20 mutex_lock(&ptp_data->lock); @@ -693,7 +695,7 @@ static int ksz_ptp_settime(struct ptp_clock_info *ptp, if (ret) goto unlock; =20 - ret =3D ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_LOAD_TIME, PTP_LOAD_TIME); + ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_LOAD_TIME, PTP_LOAD_TIME); if (ret) goto unlock; =20 @@ -723,6 +725,7 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, = long scaled_ppm) { struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + const u16 *regs =3D dev->info->regs; u64 base, adj; bool negative; u32 data32; @@ -743,12 +746,12 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp= , long scaled_ppm) if (ret) goto unlock; =20 - ret =3D ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ADJ_ENABLE, + ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ADJ_ENABLE, PTP_CLK_ADJ_ENABLE); if (ret) goto unlock; } else { - ret =3D ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ADJ_ENABLE, 0); + ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ADJ_ENABLE, 0); if (ret) goto unlock; } @@ -763,6 +766,7 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, = s64 delta) struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); struct timespec64 delta64 =3D ns_to_timespec64(delta); + const u16 *regs =3D dev->info->regs; s32 sec, nsec; u16 data16; int ret; @@ -782,7 +786,7 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, = s64 delta) if (ret) goto unlock; =20 - ret =3D ksz_read16(dev, REG_PTP_CLK_CTRL, &data16); + ret =3D ksz_read16(dev, regs[PTP_CLK_CTRL], &data16); if (ret) goto unlock; =20 @@ -794,7 +798,7 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, = s64 delta) else data16 |=3D PTP_STEP_DIR; =20 - ret =3D ksz_write16(dev, REG_PTP_CLK_CTRL, data16); + ret =3D ksz_write16(dev, regs[PTP_CLK_CTRL], data16); if (ret) goto unlock; =20 @@ -882,9 +886,10 @@ static long ksz_ptp_do_aux_work(struct ptp_clock_info = *ptp) static int ksz_ptp_start_clock(struct ksz_device *dev) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + const u16 *regs =3D dev->info->regs; int ret; =20 - ret =3D ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE); + ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ENABLE, PTP_CLK_ENABLE= ); if (ret) return ret; =20 diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index d71e85510cda56b6ddfefd4ed65564dfb4be7c88..bf8526390c2a2face12406c575a= 1ea3e4d42e3e6 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -15,8 +15,7 @@ #define LED_SRC_PTP_GPIO_2 BIT(2) =20 /* 5 - PTP Clock */ -#define REG_PTP_CLK_CTRL 0x0500 - +/* REG_PTP_CLK_CTRL */ #define PTP_STEP_ADJ BIT(6) #define PTP_STEP_DIR BIT(5) #define PTP_READ_TIME BIT(4) --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBD3A238D52 for ; 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arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="dIujRnnI" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 894FA4E41F7E; Mon, 5 Jan 2026 13:08:27 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5FDC760726; Mon, 5 Jan 2026 13:08:27 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 748EA103C852F; Mon, 5 Jan 2026 14:08:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618506; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=wTCLUmid6PG6QzdXFMwdqPdThJYrHMsol4xSmttF/zg=; b=dIujRnnIXBYqkWTKFyT/I+eteAOf1ct9ZQ36uY0wleS93w/23npYDDI05hbwHz/BwG/4gk kjbqbK7MsMvJ3/6rVSVl0qAwSy5k4FOerf02SMP7ToEtwfL2T1Hz24sKSfMm8MuCpZz8fo 2Zq+QVe3Srf9AOEDZDrfSWWONf1sbvrBIpODFHF06WMr/06x3HMxr1SQXQD3z/ufGzAmKi tI7tZjKYP0PRhS36Gf1l/eHkvYleVaMiH7BIZKBE6g/68tjhe1vNFtChRozZxjF2zFq76q D0wfTAzBhsIJxdAdTc1sVq+SCco0B9W2jUd1hKGk1mTE9+See3pVXwzGV+LuBA== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:03 +0100 Subject: [PATCH net-next 4/9] net: dsa: microchip: Use regs[] to access REG_PTP_RTC_NANOSEC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-4-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_RTC_NANOSEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_NANOSEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_NANOSEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 6 +++--- drivers/net/dsa/microchip/ksz_ptp_reg.h | 2 -- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index d7f407370c1cc59402d444e27ebe44e7a600b441..d400a4ad57b5691d54bce7680fc= 831475535a85c 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -570,6 +570,7 @@ static const u16 ksz8463_regs[] =3D { [S_BROADCAST_CTRL] =3D 0x06, [S_MULTICAST_CTRL] =3D 0x04, [PTP_CLK_CTRL] =3D 0x0600, + [PTP_RTC_NANOSEC] =3D 0x0604, }; =20 static const u32 ksz8463_masks[] =3D { @@ -805,6 +806,7 @@ static const u16 ksz9477_regs[] =3D { [REG_PORT_PME_STATUS] =3D 0x0013, [REG_PORT_PME_CTRL] =3D 0x0017, [PTP_CLK_CTRL] =3D 0x0500, + [PTP_RTC_NANOSEC] =3D 0x0504, }; =20 static const u32 ksz9477_masks[] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 8033cb9d84838705389e6ed52a5a54aaa8b49497..6d100f1f5e6efe8b43969845ca5= 17625ea825314 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -272,6 +272,7 @@ enum ksz_regs { REG_PORT_PME_STATUS, REG_PORT_PME_CTRL, PTP_CLK_CTRL, + PTP_RTC_NANOSEC, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 68553d9f1e0e3a3cd6319d73b7f9bf6ee2fce7ce..226b10d0f89a6d58c9b329a66ee= 25eabc9d294a9 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -600,7 +600,7 @@ static int _ksz_ptp_gettime(struct ksz_device *dev, str= uct timespec64 *ts) if (ret) return ret; =20 - ret =3D ksz_read32(dev, REG_PTP_RTC_NANOSEC, &nanoseconds); + ret =3D ksz_read32(dev, regs[PTP_RTC_NANOSEC], &nanoseconds); if (ret) return ret; =20 @@ -687,7 +687,7 @@ static int ksz_ptp_settime(struct ptp_clock_info *ptp, if (ret) goto unlock; =20 - ret =3D ksz_write32(dev, REG_PTP_RTC_NANOSEC, ts->tv_nsec); + ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec); if (ret) goto unlock; =20 @@ -778,7 +778,7 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, = s64 delta) */ sec =3D div_s64_rem(delta, NSEC_PER_SEC, &nsec); =20 - ret =3D ksz_write32(dev, REG_PTP_RTC_NANOSEC, abs(nsec)); + ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec)); if (ret) goto unlock; =20 diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index bf8526390c2a2face12406c575a1ea3e4d42e3e6..9ab918c7af4b46a73e00846950a= c09917c65db5a 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -29,8 +29,6 @@ #define PTP_RTC_SUB_NANOSEC_M 0x0007 #define PTP_RTC_0NS 0x00 =20 -#define REG_PTP_RTC_NANOSEC 0x0504 - #define REG_PTP_RTC_SEC 0x0508 =20 #define REG_PTP_SUBNANOSEC_RATE 0x050C --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E69B253F05 for ; Mon, 5 Jan 2026 13:08:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="k+w7MQ5+" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2EE1B4E41F7F; Mon, 5 Jan 2026 13:08:29 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 01A0460726; Mon, 5 Jan 2026 13:08:29 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D2C31103C8416; Mon, 5 Jan 2026 14:08:26 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618508; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=qKlZzN5tUG8JW9r14COXHcGVAvYMFuw4AbBxGPuQo+w=; b=k+w7MQ5+6fiRQPuJJASC5/gzvUSFdy/rdJrEVZZF7W/atnQ7EXpGZGjQjCyjR1tZG1MXUm qIs/sRrxOnkKDP5dOIR2CURm3vTh/abdVWYrlBV9oE84pC4eww8Z4fTFkzZMk0a35k92IV GlCQzBvklt0HPrcNScTQEpM06YfqGMOq/urepPETbxBSsTDOrJKgmpIaKImmjFBQv4vPyd n0ywbDJFqRLxcDj8hR1iDDWwzqU3Vi4Y8+1LSUoqa1+sAa00jncD3Z9jY6XnAus8v7fwiM 93HXGWMxpEe8X5AbLGivZyhtFzyJ5zPdLSuJA4IzTaJwuAZph/EBpqtXs/9lqA== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:04 +0100 Subject: [PATCH net-next 5/9] net: dsa: microchip: Use regs[] to access REG_PTP_RTC_SEC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-5-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_RTC_SEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_SEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_SEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 6 +++--- drivers/net/dsa/microchip/ksz_ptp_reg.h | 2 -- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index d400a4ad57b5691d54bce7680fc831475535a85c..595438031d316eda96ee7fa781a= ebdb65575b336 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -571,6 +571,7 @@ static const u16 ksz8463_regs[] =3D { [S_MULTICAST_CTRL] =3D 0x04, [PTP_CLK_CTRL] =3D 0x0600, [PTP_RTC_NANOSEC] =3D 0x0604, + [PTP_RTC_SEC] =3D 0x0608, }; =20 static const u32 ksz8463_masks[] =3D { @@ -807,6 +808,7 @@ static const u16 ksz9477_regs[] =3D { [REG_PORT_PME_CTRL] =3D 0x0017, [PTP_CLK_CTRL] =3D 0x0500, [PTP_RTC_NANOSEC] =3D 0x0504, + [PTP_RTC_SEC] =3D 0x0508, }; =20 static const u32 ksz9477_masks[] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 6d100f1f5e6efe8b43969845ca517625ea825314..b4305bd47fbebfd917fca978a6f= 916d13b6115ea 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -273,6 +273,7 @@ enum ksz_regs { REG_PORT_PME_CTRL, PTP_CLK_CTRL, PTP_RTC_NANOSEC, + PTP_RTC_SEC, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 226b10d0f89a6d58c9b329a66ee25eabc9d294a9..5a94beb410df38f5d0465e1cd89= 6039292f9a5ec 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -604,7 +604,7 @@ static int _ksz_ptp_gettime(struct ksz_device *dev, str= uct timespec64 *ts) if (ret) return ret; =20 - ret =3D ksz_read32(dev, REG_PTP_RTC_SEC, &seconds); + ret =3D ksz_read32(dev, regs[PTP_RTC_SEC], &seconds); if (ret) return ret; =20 @@ -691,7 +691,7 @@ static int ksz_ptp_settime(struct ptp_clock_info *ptp, if (ret) goto unlock; =20 - ret =3D ksz_write32(dev, REG_PTP_RTC_SEC, ts->tv_sec); + ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], ts->tv_sec); if (ret) goto unlock; =20 @@ -782,7 +782,7 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, = s64 delta) if (ret) goto unlock; =20 - ret =3D ksz_write32(dev, REG_PTP_RTC_SEC, abs(sec)); + ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], abs(sec)); if (ret) goto unlock; =20 diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 9ab918c7af4b46a73e00846950ac09917c65db5a..d1d31514488609df9f5eee4b12b= ff074965b1c6e 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -29,8 +29,6 @@ #define PTP_RTC_SUB_NANOSEC_M 0x0007 #define PTP_RTC_0NS 0x00 =20 -#define REG_PTP_RTC_SEC 0x0508 - #define REG_PTP_SUBNANOSEC_RATE 0x050C =20 #define PTP_SUBNANOSEC_M 0x3FFFFFFF --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BE9B267B05; Mon, 5 Jan 2026 13:08:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618514; 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spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="lQBtPqNC" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id A02591A2667; Mon, 5 Jan 2026 13:08:30 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 7278360726; Mon, 5 Jan 2026 13:08:30 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7E14F103C8525; Mon, 5 Jan 2026 14:08:28 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618509; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=s6nJCVMi/wjZ86g8QRLs8HImVrfAUYWEj/LwtV2A+1Y=; b=lQBtPqNCUnogRNIv3lG2VhxFIDdH29KzWCc4cBuuwglvk+AqZ56oUqcg3qui+Vx6j0B3mu pMDRtqBQLUKJJV1aCM/QxcQWR8BrRY7YC6zkom29JXSY5Pl3C0vI6SUAj5TYAsc2yiTYl1 19CMTyol7aj0jCTNY4EF1A/vyFW/TEOvGDJ/k9DibYIWTfFbhiKtkWBbOz42xvWMi8R17P rGntbbND2E2PQ9Ra46fqLwaJnnW0unS71NOXXhmhbKBqXnUizoRkP9JAUwDgl1XqAHbs26 p4Px5R8JeErb18Tz706Ntc1hlXQixN6UWRL5Ub7YQurpNVnHSIMxBZ32zkE5KQ== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:05 +0100 Subject: [PATCH net-next 6/9] net: dsa: microchip: Use regs[] to access REG_PTP_RTC_SUB_NANOSEC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-6-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_RTC_SUB_NANOSEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_SUB_NANOSEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_SUB_NANOSEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- drivers/net/dsa/microchip/ksz_ptp_reg.h | 3 +-- 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 595438031d316eda96ee7fa781aebdb65575b336..7af008cafccf716c2114f486938= cdc25b7daae73 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -572,6 +572,7 @@ static const u16 ksz8463_regs[] =3D { [PTP_CLK_CTRL] =3D 0x0600, [PTP_RTC_NANOSEC] =3D 0x0604, [PTP_RTC_SEC] =3D 0x0608, + [PTP_RTC_SUB_NANOSEC] =3D 0x060C, }; =20 static const u32 ksz8463_masks[] =3D { @@ -807,6 +808,7 @@ static const u16 ksz9477_regs[] =3D { [REG_PORT_PME_STATUS] =3D 0x0013, [REG_PORT_PME_CTRL] =3D 0x0017, [PTP_CLK_CTRL] =3D 0x0500, + [PTP_RTC_SUB_NANOSEC] =3D 0x0502, [PTP_RTC_NANOSEC] =3D 0x0504, [PTP_RTC_SEC] =3D 0x0508, }; diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index b4305bd47fbebfd917fca978a6f916d13b6115ea..d1baa3ce09b5fee8e0984791a73= 0b70b704fcfdd 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -274,6 +274,7 @@ enum ksz_regs { PTP_CLK_CTRL, PTP_RTC_NANOSEC, PTP_RTC_SEC, + PTP_RTC_SUB_NANOSEC, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 5a94beb410df38f5d0465e1cd896039292f9a5ec..3766d8bde478e6c2cf0ec19e7ac= 27570c2bb7676 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -596,7 +596,7 @@ static int _ksz_ptp_gettime(struct ksz_device *dev, str= uct timespec64 *ts) if (ret) return ret; =20 - ret =3D ksz_read8(dev, REG_PTP_RTC_SUB_NANOSEC__2, &phase); + ret =3D ksz_read8(dev, regs[PTP_RTC_SUB_NANOSEC], &phase); if (ret) return ret; =20 @@ -683,7 +683,7 @@ static int ksz_ptp_settime(struct ptp_clock_info *ptp, mutex_lock(&ptp_data->lock); =20 /* Write to shadow registers and Load PTP clock */ - ret =3D ksz_write16(dev, REG_PTP_RTC_SUB_NANOSEC__2, PTP_RTC_0NS); + ret =3D ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS); if (ret) goto unlock; =20 diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index d1d31514488609df9f5eee4b12bff074965b1c6e..41891ddadaa30ce2cf3ac41273f= d335987258230 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -24,8 +24,7 @@ #define PTP_CLK_ENABLE BIT(1) #define PTP_CLK_RESET BIT(0) =20 -#define REG_PTP_RTC_SUB_NANOSEC__2 0x0502 - +/* REG_PTP_RTC_SUB_NANOSEC */ #define PTP_RTC_SUB_NANOSEC_M 0x0007 #define PTP_RTC_0NS 0x00 =20 --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D1B8272813 for ; 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bh=RvTCTJumGyaWU6Zx6AbiAXwD9Yv/ZwJcpm0eYOrOQOE=; b=iejyKNjUoyw7L5aYqbSGEngpY9uwKjQpFQTVcF+tezDSXj7WdGI3NAoxZ0euEk3VlK8z3w i9fIhsBJLYu62oIVS3sEvYDT5PpVu9JQfQKIgdhapiRT0QKmyVkCW7EiE1Bl90YXQKCWN9 0hDutjAsLR9SuE4m4shjohKekU1nybZYM/HYZoeVpVWEAX0k0h4nHf8phrMCEYu3q4ti7A I8cYwzhHV3mrycBjqggO/7NPA7KF6rmNDk7/3A1nzV5bPhSH+qayt9yY8wIye4cu+js3SV NbxxY9RV7bJ4mm4Y3U8KPLuQiKN65pzh/9lPZfzuzyacsek8kHITdzGy4MBidw== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:06 +0100 Subject: [PATCH net-next 7/9] net: dsa: microchip: Use regs[] to access REG_PTP_SUBNANOSEC_RATE Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-7-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_SUBNANOSEC_RATE register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_SUBNANOSEC_RATE register in the regs[] tables. Use the regs[] table to retrieve the PTP_SUBNANOSEC_RATE register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 2 +- drivers/net/dsa/microchip/ksz_ptp_reg.h | 3 +-- 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 7af008cafccf716c2114f486938cdc25b7daae73..cbd918c0add30da17ea6ebe44ff= 44b866fcf2a1f 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -573,6 +573,7 @@ static const u16 ksz8463_regs[] =3D { [PTP_RTC_NANOSEC] =3D 0x0604, [PTP_RTC_SEC] =3D 0x0608, [PTP_RTC_SUB_NANOSEC] =3D 0x060C, + [PTP_SUBNANOSEC_RATE] =3D 0x0610, }; =20 static const u32 ksz8463_masks[] =3D { @@ -811,6 +812,7 @@ static const u16 ksz9477_regs[] =3D { [PTP_RTC_SUB_NANOSEC] =3D 0x0502, [PTP_RTC_NANOSEC] =3D 0x0504, [PTP_RTC_SEC] =3D 0x0508, + [PTP_SUBNANOSEC_RATE] =3D 0x050C, }; =20 static const u32 ksz9477_masks[] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index d1baa3ce09b5fee8e0984791a730b70b704fcfdd..16a7600789e3233dab1e1ed5d45= 99b875aa57aa1 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -275,6 +275,7 @@ enum ksz_regs { PTP_RTC_NANOSEC, PTP_RTC_SEC, PTP_RTC_SUB_NANOSEC, + PTP_SUBNANOSEC_RATE, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 3766d8bde478e6c2cf0ec19e7ac27570c2bb7676..538162e3e4569483c85c710182c= b3918a8713d74 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -742,7 +742,7 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, = long scaled_ppm) if (!negative) data32 |=3D PTP_RATE_DIR; =20 - ret =3D ksz_write32(dev, REG_PTP_SUBNANOSEC_RATE, data32); + ret =3D ksz_write32(dev, regs[PTP_SUBNANOSEC_RATE], data32); if (ret) goto unlock; =20 diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 41891ddadaa30ce2cf3ac41273fd335987258230..1e823b1a19daa480cccdc0367b4= 36a0940e85093 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -28,8 +28,7 @@ #define PTP_RTC_SUB_NANOSEC_M 0x0007 #define PTP_RTC_0NS 0x00 =20 -#define REG_PTP_SUBNANOSEC_RATE 0x050C - +/* REG_PTP_SUBNANOSEC_RATE */ #define PTP_SUBNANOSEC_M 0x3FFFFFFF #define PTP_RATE_DIR BIT(31) #define PTP_TMP_RATE_ENABLE BIT(30) --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAAA528469A for ; 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bh=ijE6JIYADwBrtZFkP/tXhPkQ6YftzQ+V6+ssQl8kO9s=; b=eQgh84s0i7VGbCH8HvP0CRxCoKj0jHtWkxZR5cJB3k5DWev9jOjrs/u9AVc1A3Fbg553+K sdG/Q58/Ssnx1wblQTIUaqMwtNxLIbcFE59YzxVzyx7ZlFs7GRY+KemKxwH3sUMfn5x4A1 gshKjhV1tHarY3saWzVacKqCdtUtelgihy0usulV8j1jn3DQpBsROmY3FXF/zICkepXbpR 1KwrUG+davKPiHrKME7+lHowuUhYtX+TyKxyd+vD2Xxe3Bv0+wJ6grd+ofw7GwbRZmUS/E aBg/gHla8DuQCWOlo2ik0uUE79X5n+wB37ArY/mXkx6jO0HgYpFgl01+34jnhw== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:07 +0100 Subject: [PATCH net-next 8/9] net: dsa: microchip: Use regs[] to access REG_PTP_MSG_CONF1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-8-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Accesses to the PTP_MSG_CONF1 register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_MSG_CONF1 register in the regs[] tables. Use the regs[] table to retrieve the PTP_MSG_CONF1 register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 11 +++++++---- drivers/net/dsa/microchip/ksz_ptp_reg.h | 3 +-- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index cbd918c0add30da17ea6ebe44ff44b866fcf2a1f..e5fa1f5fc09b37c1a9d907175f8= cd2cd60aee180 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -574,6 +574,7 @@ static const u16 ksz8463_regs[] =3D { [PTP_RTC_SEC] =3D 0x0608, [PTP_RTC_SUB_NANOSEC] =3D 0x060C, [PTP_SUBNANOSEC_RATE] =3D 0x0610, + [PTP_MSG_CONF1] =3D 0x0620, }; =20 static const u32 ksz8463_masks[] =3D { @@ -813,6 +814,7 @@ static const u16 ksz9477_regs[] =3D { [PTP_RTC_NANOSEC] =3D 0x0504, [PTP_RTC_SEC] =3D 0x0508, [PTP_SUBNANOSEC_RATE] =3D 0x050C, + [PTP_MSG_CONF1] =3D 0x0514, }; =20 static const u32 ksz9477_masks[] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 16a7600789e3233dab1e1ed5d4599b875aa57aa1..929aff4c55de5254defdc1afb52= b224b3898233b 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -276,6 +276,7 @@ enum ksz_regs { PTP_RTC_SEC, PTP_RTC_SUB_NANOSEC, PTP_SUBNANOSEC_RATE, + PTP_MSG_CONF1, }; =20 enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 538162e3e4569483c85c710182cb3918a8713d74..b3fff0643ea7a63aec924ec1cd9= b451ecfeeab3d 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -263,6 +263,7 @@ static int ksz_ptp_enable_mode(struct ksz_device *dev) { struct ksz_tagger_data *tagger_data =3D ksz_tagger_data(dev->ds); struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + const u16 *regs =3D dev->info->regs; struct ksz_port *prt; struct dsa_port *dp; bool tag_en =3D false; @@ -283,7 +284,7 @@ static int ksz_ptp_enable_mode(struct ksz_device *dev) =20 tagger_data->hwtstamp_set_state(dev->ds, tag_en); =20 - return ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_ENABLE, + return ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_ENABLE, tag_en ? PTP_ENABLE : 0); } =20 @@ -335,6 +336,7 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, struct ksz_port *prt, struct kernel_hwtstamp_config *config) { + const u16 *regs =3D dev->info->regs; int ret; =20 if (config->flags) @@ -353,7 +355,7 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en =3D false; prt->hwts_tx_en =3D true; =20 - ret =3D ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_1STEP, PTP_1STEP); + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, PTP_1STEP); if (ret) return ret; =20 @@ -367,7 +369,7 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en =3D true; prt->hwts_tx_en =3D true; =20 - ret =3D ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_1STEP, 0); + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, 0); if (ret) return ret; =20 @@ -902,6 +904,7 @@ static int ksz_ptp_start_clock(struct ksz_device *dev) int ksz_ptp_clock_register(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; + const u16 *regs =3D dev->info->regs; struct ksz_ptp_data *ptp_data; int ret; u8 i; @@ -941,7 +944,7 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) /* Currently only P2P mode is supported. When 802_1AS bit is set, it * forwards all PTP packets to host port and none to other ports. */ - ret =3D ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_TC_P2P | PTP_802_1AS, + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS, PTP_TC_P2P | PTP_802_1AS); if (ret) return ret; diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 1e823b1a19daa480cccdc0367b436a0940e85093..eab9aecb7fa8a50323de4140695= b2004d1beab8c 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -39,8 +39,7 @@ #define REG_PTP_RATE_DURATION_H 0x0510 #define REG_PTP_RATE_DURATION_L 0x0512 =20 -#define REG_PTP_MSG_CONF1 0x0514 - +/* REG_PTP_MSG_CONF1 */ #define PTP_802_1AS BIT(7) #define PTP_ENABLE BIT(6) #define PTP_ETH_ENABLE BIT(5) --=20 2.52.0 From nobody Sun Feb 8 15:01:24 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C13CC28A701 for ; Mon, 5 Jan 2026 13:08:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618518; cv=none; b=dVjGuGyEAKqbAro+kRjYIWWPQSri1a8buJnAKmCX5PbzecYgYeFHF6jvs3vB9R0HgAPG2zAq8ddGJtTxCtwdaBx+gCkwjtOV0cOr4nCttF/5Jj+81vTHVwR9rbI3W/izYPkbmeqJy+9bNR7YAvtIKddRxU9MC3eFyqekMOoIOCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767618518; c=relaxed/simple; bh=9QcjWnONpAVaP+Tie1zlDsm+KSktyvQl0mlt6LXj6hM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UANdM6TOBA4JaAVCNZN/SsreC3OfZ/Y0lTak0uSUphg3qdPV+WHb1HtaDpDEb/YvLNqYjFdCLxBZ9BjdakFJ26oU1nFt2s6vleSDhYXcaqEc+XuRFhRU4PFDwos3/u7VHQj1IjX2M/fapxUYMZvEe2HGigECDPFpM5OZHQWXKe0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=H46ayQbX; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="H46ayQbX" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 416684E41F80; Mon, 5 Jan 2026 13:08:35 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 0D15C60726; Mon, 5 Jan 2026 13:08:35 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B28F4103C8531; Mon, 5 Jan 2026 14:08:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1767618514; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=25UrBuweM9vQ3iWdNpe4Hggb89zhueLdPDwP/UNaNP0=; b=H46ayQbXqGWdPqKFRz/PZiA9RYL5dQL2gpTuSa6Dcm35cVMAhqpCRuCVOzJsjv4ft53DZo ntXYJoEjti4XgVb0Qe5Dq4nLJsrgdxh+3ro0FMdeLUpKKxvo7qc8KftXcGv6dkDVs4F4zc j9oM0V4dR9xXIKUF1BPNLNBamP1RKBSiVItsu2fVkxjEMmAf/IdsmnFIUoE7FjwcAglkMa o4Rk+8EU8i07qgZJ6bYLUzcqbJ0yDX7D/IVzsBe5Xvm/dBm3DeMN+E0xU0ZeAxL+ma2XVR JvypfKkN3DCufknO2kbxbJN4JgZAa6J3BSXkIbApZ01RfHXRv8XvQwSCGVPZ2Q== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 05 Jan 2026 14:08:08 +0100 Subject: [PATCH net-next 9/9] net: dsa: microchip: Wrap timestamp reading in a function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260105-ksz-rework-v1-9-a68df7f57375@bootlin.com> References: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> In-Reply-To: <20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Timestamps are directly accessed through a register read in the interrupt handler. KSZ8463's logic to access it will be a bit more complex because the same interrupt can be triggered by two different timestamps being ready. Wrap the timestamp's reading in a dedicated function to ease the KSZ8463's integration in upcoming patches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index b3fff0643ea7a63aec924ec1cd9b451ecfeeab3d..4a2cc57a628f97bd51fcb11057b= c4effda9205dd 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -967,6 +967,11 @@ void ksz_ptp_clock_unregister(struct dsa_switch *ds) ptp_clock_unregister(ptp_data->clock); } =20 +static int ksz_read_ts(struct ksz_port *port, u16 reg, u32 *ts) +{ + return ksz_read32(port->ksz_dev, reg, ts); +} + static irqreturn_t ksz_ptp_msg_thread_fn(int irq, void *dev_id) { struct ksz_ptp_irq *ptpmsg_irq =3D dev_id; @@ -980,7 +985,7 @@ static irqreturn_t ksz_ptp_msg_thread_fn(int irq, void = *dev_id) dev =3D port->ksz_dev; =20 if (ptpmsg_irq->ts_en) { - ret =3D ksz_read32(dev, ptpmsg_irq->ts_reg, &tstamp_raw); + ret =3D ksz_read_ts(port, ptpmsg_irq->ts_reg, &tstamp_raw); if (ret) return IRQ_NONE; =20 --=20 2.52.0