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Sun, 04 Jan 2026 05:35:07 -0800 (PST) Received: from J9GPGXL7NT.bytedance.net ([61.213.176.57]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3c949fb63sm30428785ad.53.2026.01.04.05.35.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 04 Jan 2026 05:35:06 -0800 (PST) From: Xu Lu To: anup@brainfault.org, atish.patra@linux.dev, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, tglx@linutronix.de Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Xu Lu Subject: [PATCH v5] irqchip/riscv-imsic: Adjust the number of available guest irq files Date: Sun, 4 Jan 2026 21:34:57 +0800 Message-ID: <20260104133457.57742-1-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, KVM assumes the minimum of implemented HGEIE bits and "BIT(gc->guest_index_bits) - 1" as the number of guest files available across all CPUs. This will not work when CPUs have different number of guest files because KVM may incorrectly allocate a guest file on a CPU with fewer guest files. To address above, during initialization, calculate the number of available guest interrupt files according to MMIO resources and constrain the number of guest interrupt files that can be allocated by KVM. Signed-off-by: Xu Lu --- arch/riscv/kvm/aia.c | 2 +- drivers/irqchip/irq-riscv-imsic-state.c | 12 +++++++++++- include/linux/irqchip/riscv-imsic.h | 3 +++ 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index dad3181856600..cac3c2b51d724 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -630,7 +630,7 @@ int kvm_riscv_aia_init(void) */ if (gc) kvm_riscv_aia_nr_hgei =3D min((ulong)kvm_riscv_aia_nr_hgei, - BIT(gc->guest_index_bits) - 1); + gc->nr_guest_files); else kvm_riscv_aia_nr_hgei =3D 0; =20 diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-= riscv-imsic-state.c index dc95ad856d80a..e8f20efb028be 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -794,7 +794,7 @@ static int __init imsic_parse_fwnode(struct fwnode_hand= le *fwnode, =20 int __init imsic_setup_state(struct fwnode_handle *fwnode, void *opaque) { - u32 i, j, index, nr_parent_irqs, nr_mmios, nr_handlers =3D 0; + u32 i, j, index, nr_parent_irqs, nr_mmios, nr_guest_files, nr_handlers = =3D 0; struct imsic_global_config *global; struct imsic_local_config *local; void __iomem **mmios_va =3D NULL; @@ -888,6 +888,7 @@ int __init imsic_setup_state(struct fwnode_handle *fwno= de, void *opaque) } =20 /* Configure handlers for target CPUs */ + global->nr_guest_files =3D BIT(global->guest_index_bits) - 1; for (i =3D 0; i < nr_parent_irqs; i++) { rc =3D imsic_get_parent_hartid(fwnode, i, &hartid); if (rc) { @@ -928,6 +929,15 @@ int __init imsic_setup_state(struct fwnode_handle *fwn= ode, void *opaque) local->msi_pa =3D mmios[index].start + reloff; local->msi_va =3D mmios_va[index] + reloff; =20 + /* + * KVM uses global->nr_guest_files to determine the available guest + * interrupt files on each CPU. Take the minimum number of guest + * interrupt files across all CPUs to avoid KVM incorrectly allocating + * an unexisted or unmapped guest interrupt file on some CPUs. + */ + nr_guest_files =3D (resource_size(&mmios[index]) - reloff) / IMSIC_MMIO_= PAGE_SZ - 1; + global->nr_guest_files =3D min(global->nr_guest_files, nr_guest_files); + nr_handlers++; } =20 diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/ri= scv-imsic.h index 7494952c55187..43aed52385008 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -69,6 +69,9 @@ struct imsic_global_config { /* Number of guest interrupt identities */ u32 nr_guest_ids; =20 + /* Number of guest interrupt files per core */ + u32 nr_guest_files; + /* Per-CPU IMSIC addresses */ struct imsic_local_config __percpu *local; }; --=20 2.20.1