From nobody Sat Feb 7 17:20:48 2026 Received: from mail-wr1-f74.google.com (mail-wr1-f74.google.com [209.85.221.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FDDA2798F3 for ; Fri, 2 Jan 2026 20:54:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.74 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767387245; cv=none; b=eaW4bz1H9ZJ4Wz1E8fq9uwp0XNVFQ8ZSRIBt1VjMpi1cN/7DCBwLG5rBkkmYMTq7rSbjiauAmWZmi+O1yMkK9LqfikXjtQL6q6t7fPaYeSLcL+UV6l6n+UspKYQPrED8cb0+muNZo4j1mR5ZsqMmSN2C6+dkX5+qqmbmu2doBg8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767387245; c=relaxed/simple; bh=XmoopGdAZcGgVQUGdaq6sywxmAcnCwUnv1l2+kwt/1s=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=SXYnA8KXghBPzL/boQp3Ow1jkvq54bp1QLSa8f59iG04F0xvCSGtkFeDaoKwFG1Grbpyimtct8PynBa7xHF+/9v+BDyjJy5qr59uAf8DyLKDVPM7pxLIAnnTeMiKbgeF95S2sqMKt1CvX8P7u4Rxtz+uOyjrC9uCbEv7BeF1JqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=dWga2EGH; arc=none smtp.client-ip=209.85.221.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="dWga2EGH" Received: by mail-wr1-f74.google.com with SMTP id ffacd0b85a97d-4325cc15176so5928989f8f.1 for ; Fri, 02 Jan 2026 12:54:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1767387241; x=1767992041; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=QAiES4ydkx/sE81xhOe/Mnr1MZ9dy5PjroYTENfcCYY=; b=dWga2EGHwHs7gYYw2w1c/VgPow+rFyw6KRVC4aEwjJdW1CwH5jz87i/SbUy/CspnID kB6eBkb2j3KTZ+3a0r7aDJ4rHT35se55m1zctVsi1HpUU3ii7VqCwTF9WmTe5/ycXOTz SObioblK4vJlaheULcKtPxBtL+TbRSiH4SaEUbWYs1qaJpx9s44ll88zi30PRDNI87Ol zdIF5HDNvjLy1b0JsBlSgKGlBzRQusS+lzPcR27qlcrw2sRVGzuobtPoNZrDKQDlaljL OPIdzT1dHS2QNliNG1dzsH1eDKc6DNGGpZP+8Ogb9mcKgfb3climtsuCBYiJHLhgi3TI 2zvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1767387241; x=1767992041; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=QAiES4ydkx/sE81xhOe/Mnr1MZ9dy5PjroYTENfcCYY=; b=KqYPx7SRoXHNbl4wP6ej5yu9IyHDcdU7K44mifqH+F7HWbfcT6czltMmCt7n5O+WO/ IC4LbLKLus6pKP8PqpK5S0EwXpD/d3mLncDuIg8EvDWkPBGYAIR4mZFcgGClRORPvtTX NVo3L3fIgaimP4k+973tQwAYP1l1bspie6OittONetPKsPjbkMuEBF04JIuK4WGr7PSD vj25r81BrV2gte8cYLgvhheii2GmH+yTqBqh3iL9Yo4MRLtmk2cu3O7JD74PKi01GKgZ bigR7bvCn1a1MkACTbFgp+BlZ+ukkK9eOT5Bu9KF6jVuHiNL9mYhdbKcl65RhM5h/AAZ xpTQ== X-Forwarded-Encrypted: i=1; AJvYcCXK7NbLz8nBiZ730GhONIMOYSbkm4ubGnvJgdHiqDnhPqVHlpnm/mQRt6msG+t5GahUaxEHP5aJgbRIy7k=@vger.kernel.org X-Gm-Message-State: AOJu0YwQkcIdjnLgynHwLHMyM39XCblGfCJueQcNSX0oio+31vrsP6ys EU/hIbb40Etmm8lYIt8A7Fr0u8jyXNnPdTYbDwQfrBGEYVePgP/fRkI7ZPPxgQiS5SYXNkN8lip gBG9x2p6E9o5OyQ== X-Google-Smtp-Source: AGHT+IFCfqRVI6Uhl1ADxzrnaLqH6bdZb69W6Eaty3oAr+lEqEgaoNlylt3n+Pn7rT0RzZhlQc+mMngowh5RnA== X-Received: from wrgb4.prod.google.com ([2002:a05:6000:3c4:b0:432:88c1:541b]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6000:430b:b0:431:808:2d32 with SMTP id ffacd0b85a97d-4324e4c716dmr50567943f8f.7.1767387241484; Fri, 02 Jan 2026 12:54:01 -0800 (PST) Date: Fri, 2 Jan 2026 20:53:52 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.52.0.351.gbe84eed79e-goog Message-ID: <20260102205353.2725509-1-smostafa@google.com> Subject: [PATCH RESEND] iommu/arm-smmu-v3: Remove IAS From: Mostafa Saleh To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, Mostafa Saleh , Tomasz Nowicki Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver only supports AArch64 page tables where OAS =3D=3D IAS. Remove the extra IAS tracking for AArch32 as this feature was never implemented and that was creating BAD_STEs for SMMUv3 with stage-2 and OAS < 40. Further discussion on this in: https://lore.kernel.org/linux-iommu/20251130194506.593700-1-smostafa@google= .com/ Reported-by: Tomasz Nowicki Fixes: f0c453dbcce7 ("iommu/arm-smmu: Ensure IAS is set correctly for AArch= 32-capable SMMUs") Signed-off-by: Mostafa Saleh --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 +++++------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 -- 2 files changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index d16d35c78c06..019211db621d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2551,7 +2551,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, ARM_SMMU_FEAT_VAX) ? 52 : 48; =20 pgtbl_cfg.ias =3D min_t(unsigned long, ias, VA_BITS); - pgtbl_cfg.oas =3D smmu->ias; + pgtbl_cfg.oas =3D smmu->oas; if (enable_dirty) pgtbl_cfg.quirks |=3D IO_PGTABLE_QUIRK_ARM_HD; fmt =3D ARM_64_LPAE_S1; @@ -2561,7 +2561,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, case ARM_SMMU_DOMAIN_S2: if (enable_dirty) return -EOPNOTSUPP; - pgtbl_cfg.ias =3D smmu->ias; + pgtbl_cfg.ias =3D smmu->oas; pgtbl_cfg.oas =3D smmu->oas; fmt =3D ARM_64_LPAE_S2; finalise_stage_fn =3D arm_smmu_domain_finalise_s2; @@ -4395,13 +4395,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_= device *smmu) } =20 /* We only support the AArch64 table format at present */ - switch (FIELD_GET(IDR0_TTF, reg)) { - case IDR0_TTF_AARCH32_64: - smmu->ias =3D 40; - fallthrough; - case IDR0_TTF_AARCH64: - break; - default: + if (!(FIELD_GET(IDR0_TTF, reg) & IDR0_TTF_AARCH64)) { dev_err(smmu->dev, "AArch64 table format not supported!\n"); return -ENXIO; } @@ -4514,8 +4508,6 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_d= evice *smmu) dev_warn(smmu->dev, "failed to set DMA mask for table walker\n"); =20 - smmu->ias =3D max(smmu->ias, smmu->oas); - if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) smmu->features |=3D ARM_SMMU_FEAT_NESTING; @@ -4525,8 +4517,8 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_d= evice *smmu) if (arm_smmu_sva_supported(smmu)) smmu->features |=3D ARM_SMMU_FEAT_SVA; =20 - dev_info(smmu->dev, "ias %lu-bit, oas %lu-bit (features 0x%08x)\n", - smmu->ias, smmu->oas, smmu->features); + dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", + smmu->oas, smmu->features); return 0; } =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ae23aacc3840..0a5bb57dbdfe 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -43,7 +43,6 @@ struct arm_vsmmu; #define IDR0_COHACC (1 << 4) #define IDR0_TTF GENMASK(3, 2) #define IDR0_TTF_AARCH64 2 -#define IDR0_TTF_AARCH32_64 3 #define IDR0_S1P (1 << 1) #define IDR0_S2P (1 << 0) =20 @@ -784,7 +783,6 @@ struct arm_smmu_device { int gerr_irq; int combined_irq; =20 - unsigned long ias; /* IPA */ unsigned long oas; /* PA */ unsigned long pgsize_bitmap; =20 --=20 2.52.0.351.gbe84eed79e-goog