From nobody Mon Feb 9 06:00:01 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43D75269B01 for ; Fri, 2 Jan 2026 17:02:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767373381; cv=none; b=CX/UM8sx4gnNeFwwp5i2rgYStCUq2s0/SeZGpCp1lrOpb6+SPTToSdBZ8id/vKiU3lK73vy/vfBY2Yixf/r0jqnf4RDMKSDsLczTHsW0YDQltrQGfIuJgoLL2wTrhEVHfqI/u04bekx63LaD0oWvEJ2HbxWvTUhpICViDYyxc1k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767373381; c=relaxed/simple; bh=m2csuiSvqhqW6MbfpzWu0Dpjoi7rMVe0Q1kp+hepEd8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=W+8L48gAwgIHJqpMItqzEUUAPt43PtCHunksI2LKM9WYuduwOI+mbwGv/h9e54pL9yOW6n53MeYF6hRA0WiENLUwI6LgJkKkSoah4q7/leRPyfRKhMhA1+su75BgHK+M1nNx0U2lsRMh52aYtgJ87bVTMU7j2y9FWzyniV+y6YA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=erwNQOZh; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="erwNQOZh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1767373379; x=1798909379; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m2csuiSvqhqW6MbfpzWu0Dpjoi7rMVe0Q1kp+hepEd8=; b=erwNQOZhPgu0YQOOYdpFYbf4kPfz4wQyJh/2cgTNUgp5ocF+O+1oJexN PO2ChvnhgrfQpIK2ch0lgrCyNdzHyxTbowPQmmcjYy5LygMBVwen81jSR 3KnBh7l+S78Vn/BNtz1PjjfTve4fBpTfOanMk0W/E1qOS2oniYCRwTeZ/ 0vT8t+5cTf2jntw1373eAqVzvLW8/M+eYKJlxaW7NxOH0yW7zppkfZ0tM qCH7gUL/DhLchyc5YJpymAWNf8h4gNdzCDxxIL8Enh8vUyrS9q6mpzHR4 AfSas23N8bx6vvd0SqOYPyylnGomYSJcEpIL/LOd65a8iE2eOyhCQH2Ll g==; X-CSE-ConnectionGUID: dCrVUlstT/WCgDlJ76zoeQ== X-CSE-MsgGUID: TW1raM+mT9+5b5vAwHyAaQ== X-IronPort-AV: E=Sophos;i="6.21,197,1763449200"; d="scan'208";a="58167748" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2026 10:01:48 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.29; Fri, 2 Jan 2026 10:01:47 -0700 Received: from ROU-LL-M43238.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 2 Jan 2026 10:01:45 -0700 From: To: , CC: Alexandre Belloni , Claudiu Beznea , Balamanikandan Gunasundar , Ryan Wanner , Conor Dooley , Nicolas Ferre Subject: [PATCH 5/5] ARM: dts: microchip: sama7d65: add missing flexcom nodes Date: Fri, 2 Jan 2026 18:01:34 +0100 Message-ID: <20260102170135.70717-6-nicolas.ferre@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260102170135.70717-1-nicolas.ferre@microchip.com> References: <20260102170135.70717-1-nicolas.ferre@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Nicolas Ferre Add nodes for usart, spi and i2c when missing to the flexcom nodes. Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 271 ++++++++++++++++++++++ 1 file changed, 271 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/= microchip/sama7d65.dtsi index 82781a1dbd6d..e21556f46384 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -419,6 +419,21 @@ uart0: serial@200 { status =3D "disabled"; }; =20 + spi0: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 34>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(6)>, + <&dma1 AT91_XDMAC_DT_PERID(5)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c0: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -443,6 +458,22 @@ flx1: flexcom@e1824000 { #size-cells =3D <1>; status =3D "disabled"; =20 + uart1: serial@200 { + compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 35>; + clock-names =3D "usart"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(8)>, + <&dma0 AT91_XDMAC_DT_PERID(7)>; + dma-names =3D "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <32>; + atmel,usart-mode =3D ; + status =3D "disabled"; + }; + spi1: spi@400 { compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; reg =3D <0x400 0x200>; @@ -497,6 +528,35 @@ uart2: serial@200 { atmel,usart-mode =3D ; status =3D "disabled"; }; + + spi2: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(10)>, + <&dma1 AT91_XDMAC_DT_PERID(9)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + + i2c2: i2c@600 { + compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(10)>, + <&dma1 AT91_XDMAC_DT_PERID(9)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx3: flexcom@e182c000 { @@ -524,6 +584,21 @@ uart3: serial@200 { status =3D "disabled"; }; =20 + spi3: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 37>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(12)>, + <&dma0 AT91_XDMAC_DT_PERID(11)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c3: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -579,6 +654,20 @@ spi4: spi@400 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + i2c4: i2c@600 { + compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 38>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(14)>, + <&dma1 AT91_XDMAC_DT_PERID(13)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx5: flexcom@e201c000 { @@ -590,6 +679,37 @@ flx5: flexcom@e201c000 { #size-cells =3D <1>; status =3D "disabled"; =20 + uart5: serial@200 { + compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 39>; + clock-names =3D "usart"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(16)>, + <&dma0 AT91_XDMAC_DT_PERID(15)>; + dma-names =3D "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <32>; + atmel,usart-mode =3D ; + status =3D "disabled"; + }; + + spi5: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 39>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(16)>, + <&dma0 AT91_XDMAC_DT_PERID(15)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c5: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -629,6 +749,35 @@ uart6: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi6: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 40>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(18)>, + <&dma1 AT91_XDMAC_DT_PERID(17)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + + i2c6: i2c@600 { + compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(18)>, + <&dma1 AT91_XDMAC_DT_PERID(17)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx7: flexcom@e2024000 { @@ -655,6 +804,35 @@ uart7: serial@200 { atmel,usart-mode =3D ; status =3D "disabled"; }; + + spi7: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 41>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(20)>, + <&dma1 AT91_XDMAC_DT_PERID(19)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + + i2c7: i2c@600 { + compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 41>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma1 AT91_XDMAC_DT_PERID(20)>, + <&dma1 AT91_XDMAC_DT_PERID(19)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx8: flexcom@e281c000 { @@ -666,6 +844,37 @@ flx8: flexcom@e281c000 { #size-cells =3D <1>; status =3D "disabled"; =20 + uart8: serial@200 { + compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 42>; + clock-names =3D "usart"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(22)>, + <&dma0 AT91_XDMAC_DT_PERID(21)>; + dma-names =3D "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <32>; + atmel,usart-mode =3D ; + status =3D "disabled"; + }; + + spi8: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 42>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(22)>, + <&dma0 AT91_XDMAC_DT_PERID(21)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c8: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -690,6 +899,37 @@ flx9: flexcom@e2820000 { #size-cells =3D <1>; status =3D "disabled"; =20 + uart9: serial@200 { + compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 43>; + clock-names =3D "usart"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(24)>, + <&dma0 AT91_XDMAC_DT_PERID(23)>; + dma-names =3D "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <32>; + atmel,usart-mode =3D ; + status =3D "disabled"; + }; + + spi9: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 43>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(24)>, + <&dma0 AT91_XDMAC_DT_PERID(23)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c9: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; @@ -714,6 +954,37 @@ flx10: flexcom@e2824000 { #size-cells =3D <1>; status =3D "disabled"; =20 + uart10: serial@200 { + compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 44>; + clock-names =3D "usart"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(26)>, + <&dma0 AT91_XDMAC_DT_PERID(25)>; + dma-names =3D "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size =3D <32>; + atmel,usart-mode =3D ; + status =3D "disabled"; + }; + + spi10: spi@400 { + compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 44>; + clock-names =3D "spi_clk"; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(26)>, + <&dma0 AT91_XDMAC_DT_PERID(25)>; + dma-names =3D "tx", "rx"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; + i2c10: i2c@600 { compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c"; reg =3D <0x600 0x200>; --=20 2.43.0