From nobody Sat Feb 7 21:14:39 2026 Received: from out-185.mta0.migadu.com (out-185.mta0.migadu.com [91.218.175.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBB5A279DB3 for ; Fri, 2 Jan 2026 09:07:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767344859; cv=none; b=kksEtrCyJwSvkEXoFRbIt8BAuVpwI2pXmBeNzg8OmhJVuFcBuypFy7xeO0fgwsDFYh0v8WkkPSbPd0/Arp57odJ3ZnJExNZKhBM4DQ6dtxLODH0qx/h7DYy1kUimq+aVMo7hD1gbT+wLtRqcM+kBLye9M0R6Oa4nr97UJtrpeh0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767344859; c=relaxed/simple; bh=nIQNvWEwyYl2hWK3GcNjeOvmr0mJVipk9z6LCDGpUBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YXx6plyRaGEqm2ptcvVodN2beoLKX5RbjiOeiOv/XFsDAdGF3psm3Aqz2csTfPlA4IrQP/DBD76YaQFcsjEArKU0RUcof1Dy0ly1MqRXMd1+c7ySnFmrT4Rf6+80cpljs/7McZqfav6wQWnTHIVMCzGkM7fLZPw0jqNM/9lqJ+0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=tkH6fcW5; arc=none smtp.client-ip=91.218.175.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="tkH6fcW5" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1767344855; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TMj5TrrlMif37vw/D7M5rWgGjiFm22plFTpEXR8IQhw=; b=tkH6fcW5Xme0JrpKnovfVILgVmIT/exsoT9krDEwZCaYTEfp5m8azT+mMHma4vlzCz1iFY cOB+OHZeSj0jLCfg5RWmL+12JF3xWevk4pw5e+255psmFDuH2oOTn3reLrAatJnG6TAc6Z hOu/apt0s2SXMySPxQPd4R5tLFTmQtY= From: Leon Hwang To: stable@vger.kernel.org, greg@kroah.com Cc: Andrii Nakryiko , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Adrian Hunter , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Leon Hwang , Ingo Molnar , Sandipan Das Subject: [PATCH 6.6.y 4/4] perf/x86/amd: Don't reject non-sampling events with configured LBR Date: Fri, 2 Jan 2026 17:03:20 +0800 Message-ID: <20260102090320.32843-5-leon.hwang@linux.dev> In-Reply-To: <20260102090320.32843-1-leon.hwang@linux.dev> References: <20260102090320.32843-1-leon.hwang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" [ Upstream commit 9794563d4d053b1b46a0cc91901f0a11d8678c19 ] Now that it's possible to capture LBR on AMD CPU from BPF at arbitrary point, there is no reason to artificially limit this feature to just sampling events. So corresponding check is removed. AFAIU, there is no correctness implications of doing this (and it was possible to bypass this check by just setting perf_event's sample_period to 1 anyways, so it doesn't guard all that much). Signed-off-by: Andrii Nakryiko Signed-off-by: Ingo Molnar Reviewed-by: Sandipan Das Link: https://lore.kernel.org/r/20240402022118.1046049-5-andrii@kernel.org Signed-off-by: Leon Hwang --- arch/x86/events/amd/lbr.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c index 33d0a45c0cd3..19c7b76e21bc 100644 --- a/arch/x86/events/amd/lbr.c +++ b/arch/x86/events/amd/lbr.c @@ -310,10 +310,6 @@ int amd_pmu_lbr_hw_config(struct perf_event *event) { int ret =3D 0; =20 - /* LBR is not recommended in counting mode */ - if (!is_sampling_event(event)) - return -EINVAL; - ret =3D amd_pmu_lbr_setup_filter(event); if (!ret) event->attach_state |=3D PERF_ATTACH_SCHED_CB; --=20 2.52.0