From nobody Sat Feb 7 08:27:50 2026 Received: from mail-m3282.qiye.163.com (mail-m3282.qiye.163.com [220.197.32.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86FD61ADC97 for ; Wed, 31 Dec 2025 03:15:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.82 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767150947; cv=none; b=dJUI63ynhkbzafT0rPr1fMpcINjoZQ++cKIzGEGfPaG435BOGGxvlPpEY3Pb9dfm1dmK5nzbcmNJ7H/ji0ozbTFBA4Vd7FWlQM/fKoCgP71Qj5CbUJWhUAgh1yJ2b/Yc6XOZ+mXXNPKNrzwrw9R4nnUIO3cjK4Z/2p5F3TK8VS4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767150947; c=relaxed/simple; bh=+E0efjuKp2EnS1ByJlL6mMPxEHLTmle7JevD0gmLOI0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NOsn5LP9u6Ad/VV8uzrVKPOy9uJSo9E/2BCmgnmdz7L63w3Zm7BN7vAd/Fh2KHtQF8G1fnzRoNjCReWwK/LCrBSSukcx42SqR84860/vsHcWG/hBSUD4gFTHEVPoCdEhT9fll6AcxXsYX5lELq6Jf1kY3y3EJkWnpENtH9QjPVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=UMOeFQRd; arc=none smtp.client-ip=220.197.32.82 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="UMOeFQRd" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 2f185eb3c; Wed, 31 Dec 2025 11:10:26 +0800 (GMT+08:00) From: Joseph Chen To: lee@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Joseph Chen Subject: [PATCH v1 1/2] dt-bindings: mfd: Add rk801 binding Date: Wed, 31 Dec 2025 11:09:50 +0800 Message-Id: <20251231030951.818-2-chenjh@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20251231030951.818-1-chenjh@rock-chips.com> References: <20251231030951.818-1-chenjh@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a9b7262a7ba09d2kunm5c2c20206ab0f2 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGhkYTVZIHhpMHkoZTkJDSU5WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=UMOeFQRd10Fts8bJe7uVAy1cu9eSjddpM7UJ0vfd2LDXloqDjuyyRdGCzQHodLXbSQq6zbs3Ou8ORYQdojrjrogD3LVUvmw5eo3Sa6qWmP9kRYjNADtg3NHIl4yCsXQK5n9iMF9Muj8UkB0602IrBNTL9DxmuOovXskP7VXaLvI=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=pJDyZVU8UBhoZL2Hk2oZGuZv9aeWaJrXTMLpCjzYgDw=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add DT binding document for Rockchip's RK801 PMIC Signed-off-by: Joseph Chen --- .../bindings/mfd/rockchip,rk801.yaml | 199 ++++++++++++++++++ 1 file changed, 199 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rockchip,rk801.ya= ml diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml b/Do= cumentation/devicetree/bindings/mfd/rockchip,rk801.yaml new file mode 100644 index 00000000000..d591125dfe8 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml @@ -0,0 +1,199 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RK801 Power Management Integrated Circuit + +maintainers: + - Joseph Chen + +description: | + Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD + that includes multiple switchable regulators. + +properties: + compatible: + enum: + - rockchip,rk801 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + rockchip,system-power-controller: + type: boolean + description: + Telling whether or not this PMIC is controlling the system power. + + system-power-controller: true + + wakeup-source: + type: boolean + description: + Device can be used as a wakeup source. + + vcc1-supply: + description: + The input supply for DCDC_REG1. + + vcc2-supply: + description: + The input supply for DCDC_REG2. + + vcc3-supply: + description: + The input supply for DCDC_REG3. + + vcc4-supply: + description: + The input supply for DCDC_REG4. + + vcc5-supply: + description: + The input supply for LDO_REG1. + + vcc6-supply: + description: + The input supply for LDO_REG2. + + vcc7-supply: + description: + The input supply for SWITCH_REG. + + regulators: + type: object + patternProperties: + "^(DCDC_REG[1-4]|LDO_REG[1-2]|SWITCH_REG)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + #include + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + rk801: rk801@27 { + compatible =3D "rockchip,rk801"; + reg =3D <0x27>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pwrctrl-gpios =3D <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply =3D <&vcc12v_dcin>; + vcc2-supply =3D <&vcc12v_dcin>; + vcc3-supply =3D <&vcc5v0_sys>; + vcc4-supply =3D <&vcc5v0_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-name =3D "vdd_cpu"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1500000>; + regulator-initial-mode =3D <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode =3D <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <950000>; + }; + }; + + vcc3v3_sys: DCDC_REG2 { + regulator-name =3D "vcc3v3_sys"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-initial-mode =3D <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode =3D <0x2>; + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode =3D <0x2>; + regulator-on-in-suspend; + }; + }; + + vdd_logic: DCDC_REG4 { + regulator-name =3D "vdd_logic"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1500000>; + regulator-initial-mode =3D <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode =3D <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vdd0v9_sys: LDO_REG1 { + regulator-name =3D "vdd0v9_sys"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-name =3D "vcc_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcc_3v3: SWITCH_REG { + regulator-name =3D "vcc_3v3"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + }; + }; + }; --=20 2.25.1