From nobody Sat Feb 7 10:50:32 2026 Received: from mail.mainlining.org (mail.mainlining.org [5.75.144.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE32E2E7623; Wed, 31 Dec 2025 02:29:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.75.144.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767148183; cv=none; b=bwQ3kDx5U98W76uVN3DtIw5fh+r5zfbC4Mylv3qVeBjFj0wjVIGgylixMpIFnKa41edEpl/ec4lCgp162UYM3NxW6NQjvqe18w++Gf8FAl2jpKJObPwCclgVnUEp57u6M+sRglsjIdg7k/8yB2Mfr4xO+EBe5YCdAmP5qR0yBHE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767148183; c=relaxed/simple; bh=tNgfas1TnnCblAKx5lvSXZhpAidV2lm9uf+pTKA9byM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JKkBW6cBgGjEZjjpCR7cgurmKET+2xMmBJuKNUKUS6vS1JETWrOet5daItl0ctORWtFihFnqlf7AR8uGZVtKUhsYPOKzXMO8yAfnvlIdZzBRF9iSpWvD/+pXLURBQZ57AcwFRRMZwnX/cwttArN8AT18NglEchzUZfyh1gLdATg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org; spf=pass smtp.mailfrom=mainlining.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=HfQkvalf; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b=kV60mn4/; arc=none smtp.client-ip=5.75.144.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mainlining.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mainlining.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="HfQkvalf"; dkim=permerror (0-bit key) header.d=mainlining.org header.i=@mainlining.org header.b="kV60mn4/" DKIM-Signature: v=1; a=rsa-sha256; s=202507r; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1767148172; bh=BU5WR2HINQXUqlixiUh+/sV ReNC8QVHzAA8B+mGFS+w=; b=HfQkvalftrzzT224/RTTtoXijnQEoNwaHQ4s5XCGZfxOY8cP0a 4EL19m8fnQAzz6qVs9mFX0GFCDezOKlQuaKwB82HDLyVPf6x9PXniyNu8Kzgm5AUOdXlUf3GXiB 7u2jqNHQAz0Fhk0P9+PS1yGb8xQvhYf43hSMFy+Sj+mc36Yj24QKgoMyZc/C4TN0gAh+B9vUsfx NzZg74bIasGN1SP+wyUNJDoZU7o3uzqGnepJ93DIUirFfcn8HNy0qyJ+SqUxoeI3EWsTo8AujjU apDmNVcojmpDeSG9U2atVxP56I0LD03Adr6WTxOusgJydxtej2sNphctXUCfd8vph6Q==; DKIM-Signature: v=1; a=ed25519-sha256; s=202507e; d=mainlining.org; c=relaxed/relaxed; h=To:Message-Id:Subject:Date:From; t=1767148172; bh=BU5WR2HINQXUqlixiUh+/sV ReNC8QVHzAA8B+mGFS+w=; b=kV60mn4/Hfn0XLFXpZ6NTMJ4IFoNig8/5lDl7v+k9Ugc5lXxV6 xjtrlK34/mvgR0R2xlkLVrKKBbmn6n8ORFCA==; From: =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= Date: Wed, 31 Dec 2025 03:29:30 +0100 Subject: [PATCH v2 3/9] remoteproc: qcom_q6v5_mss: Add MDM9607 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251231-mss-v2-3-ae5eafd835c4@mainlining.org> References: <20251231-mss-v2-0-ae5eafd835c4@mainlining.org> In-Reply-To: <20251231-mss-v2-0-ae5eafd835c4@mainlining.org> To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephan Gerhold Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Barnab=C3=A1s_Cz=C3=A9m=C3=A1n?= X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767148170; l=4923; i=barnabas.czeman@mainlining.org; s=20240730; h=from:subject:message-id; bh=F5sDbDJk3zKnlbAYmyuPx2xHN4Yesb0x3y/GxT2A62s=; b=cQKmYOV3VwvWqTCQFTULLLoxCGgD0XTPr5UuWYEWgZ5gQT2CAogl+Wo/Ez9Cvig+L87GJPSkY QZcCjgOJABuA004B/05SbSSRgRotnlqAsQv7VcxToWgFwUVuFA1AuUg X-Developer-Key: i=barnabas.czeman@mainlining.org; a=ed25519; pk=TWUSIGgwW/Sn4xnX25nw+lszj1AT/A3bzkahn7EhOFc= From: Stephan Gerhold Add support for MDM9607 MSS it have different ACC settings and it needs mitigation for inrush current issue. Signed-off-by: Stephan Gerhold [Reword the commit, add has_ext_bhs_reg] Signed-off-by: Barnab=C3=A1s Cz=C3=A9m=C3=A1n --- drivers/remoteproc/qcom_q6v5_mss.c | 70 ++++++++++++++++++++++++++++++++++= ---- 1 file changed, 63 insertions(+), 7 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q= 6v5_mss.c index 3c404118b322..a64e57544efb 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -124,6 +124,7 @@ #define QDSP6v56_CLAMP_QMC_MEM BIT(22) #define QDSP6SS_XO_CBCR 0x0038 #define QDSP6SS_ACC_OVERRIDE_VAL 0x20 +#define QDSP6SS_ACC_OVERRIDE_VAL_9607 0x80800000 #define QDSP6v55_BHS_EN_REST_ACK BIT(0) =20 /* QDSP6v65 parameters */ @@ -256,6 +257,7 @@ struct q6v5 { }; =20 enum { + MSS_MDM9607, MSS_MSM8226, MSS_MSM8909, MSS_MSM8916, @@ -747,15 +749,19 @@ static int q6v5proc_reset(struct q6v5 *qproc) return ret; } goto pbl_wait; - } else if (qproc->version =3D=3D MSS_MSM8909 || + } else if (qproc->version =3D=3D MSS_MDM9607 || + qproc->version =3D=3D MSS_MSM8909 || qproc->version =3D=3D MSS_MSM8953 || qproc->version =3D=3D MSS_MSM8996 || qproc->version =3D=3D MSS_MSM8998 || qproc->version =3D=3D MSS_SDM660) { =20 - if (qproc->version !=3D MSS_MSM8909 && - qproc->version !=3D MSS_MSM8953) - /* Override the ACC value if required */ + /* Override the ACC value if required */ + if (qproc->version =3D=3D MSS_MDM9607) + writel(QDSP6SS_ACC_OVERRIDE_VAL_9607, + qproc->reg_base + QDSP6SS_STRAP_ACC); + else if (qproc->version !=3D MSS_MSM8909 && + qproc->version !=3D MSS_MSM8953) writel(QDSP6SS_ACC_OVERRIDE_VAL, qproc->reg_base + QDSP6SS_STRAP_ACC); =20 @@ -800,7 +806,7 @@ static int q6v5proc_reset(struct q6v5 *qproc) writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); =20 if (qproc->version !=3D MSS_MSM8909) { - int mem_pwr_ctl; + int mem_pwr_ctl, reverse =3D 0; =20 /* Deassert QDSP6 compiler memory clamp */ val =3D readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); @@ -812,17 +818,25 @@ static int q6v5proc_reset(struct q6v5 *qproc) writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); =20 /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version =3D=3D MSS_MSM8953 || + if (qproc->version =3D=3D MSS_MDM9607 || + qproc->version =3D=3D MSS_MSM8953 || qproc->version =3D=3D MSS_MSM8996) { mem_pwr_ctl =3D QDSP6SS_MEM_PWR_CTL; i =3D 19; + + /* + * Set first 5 bits in reverse to avoid + * "inrush current" issues. + */ + if (qproc->version =3D=3D MSS_MDM9607) + reverse =3D 6; } else { /* MSS_MSM8998, MSS_SDM660 */ mem_pwr_ctl =3D QDSP6V6SS_MEM_PWR_CTL; i =3D 28; } val =3D readl(qproc->reg_base + mem_pwr_ctl); - for (; i >=3D 0; i--) { + for (; i >=3D reverse; i--) { val |=3D BIT(i); writel(val, qproc->reg_base + mem_pwr_ctl); /* @@ -833,6 +847,12 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |=3D readl(qproc->reg_base + mem_pwr_ctl); udelay(1); } + for (i =3D 0; i < reverse; i++) { + val |=3D BIT(i); + writel(val, qproc->reg_base + mem_pwr_ctl); + val |=3D readl(qproc->reg_base + mem_pwr_ctl); + udelay(1); + } } else { /* Turn on memories */ val =3D readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); @@ -2410,6 +2430,41 @@ static const struct rproc_hexagon_res msm8996_mss = =3D { .version =3D MSS_MSM8996, }; =20 +static const struct rproc_hexagon_res mdm9607_mss =3D { + .hexagon_mba_image =3D "mba.mbn", + .proxy_supply =3D (struct qcom_mss_reg_res[]) { + { + .supply =3D "pll", + .uA =3D 100000, + }, + {} + }, + .proxy_clk_names =3D (char*[]){ + "xo", + NULL + }, + .active_clk_names =3D (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names =3D (char*[]){ + "mx", + "cx", + NULL + }, + .need_mem_protection =3D false, + .has_alt_reset =3D false, + .has_mba_logs =3D false, + .has_spare_reg =3D false, + .has_qaccept_regs =3D false, + .has_ext_bhs_reg =3D false, + .has_ext_cntl_regs =3D false, + .has_vq6 =3D false, + .version =3D MSS_MDM9607, +}; + static const struct rproc_hexagon_res msm8909_mss =3D { .hexagon_mba_image =3D "mba.mbn", .proxy_supply =3D (struct qcom_mss_reg_res[]) { @@ -2672,6 +2727,7 @@ static const struct rproc_hexagon_res msm8926_mss =3D= { =20 static const struct of_device_id q6v5_of_match[] =3D { { .compatible =3D "qcom,q6v5-pil", .data =3D &msm8916_mss}, + { .compatible =3D "qcom,mdm9607-mss-pil", .data =3D &mdm9607_mss}, { .compatible =3D "qcom,msm8226-mss-pil", .data =3D &msm8226_mss}, { .compatible =3D "qcom,msm8909-mss-pil", .data =3D &msm8909_mss}, { .compatible =3D "qcom,msm8916-mss-pil", .data =3D &msm8916_mss}, --=20 2.52.0