From nobody Tue Feb 10 04:12:52 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7354D2459D1 for ; Tue, 30 Dec 2025 14:04:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767103443; cv=none; b=rT/Ar/Qd8vTi3qz6KATG/hZLBVihGPB6cEaeJ1i6rlrIxEuU56cGpxZ8C1A/bGydUAxOCYUbTwt0nhSFowq4/dQIpoDPRomylqa/MafbXSH1NcpcUenngKdILHZwdmwLJuDDVNoK5xcj+fvA8yhxYBlGEhTOBA3E7jp72sYs1Bk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767103443; c=relaxed/simple; bh=7ItMKgsVy2ANsMynoBcCjpMv8Wqb8/BHa+zFioLqrpU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=syiJt72BgLMxzRo+IWm0rwc5FnXooUNOcmOcgl1VfONcgLdgLP/gCKf0GKQPzdRoU3XV0Sjdbb+mGvob5lkHHYaoN0AlU9eCbTZjeMU6kUJ1Ei3OX5v1/yjFjAdgWnM/f0Q5y79HhA9cuAiZlL1uNryK0f/LZ5tn6v25vqsfuHc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Y7JDCR3K; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Y7JDCR3K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1767103439; bh=7ItMKgsVy2ANsMynoBcCjpMv8Wqb8/BHa+zFioLqrpU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Y7JDCR3KjF5xO3Cb9p8u4LJAanA1E+R1SJFxaZgjU/Etndc0lo1hPKtGny9QXsImT lBOmOs0SkuSiz4Ptv3Nlt/0iBvRxGd4xf206J+9utGm6abmLEq/euGzWZRdOvdZSZ1 LjKb5xEi7xZWwiHyG6O6vYa6Hi4o0+lMMiGrrBERqjuUXbW8YDzN4nW5QCX4WZAXQk WMYNC0Pwo8ipF7j9E9QzlcEcBMx+MgvtU2EXyFMuEBrw4cx9qa2wuDoDkPPks4G1gs ZYjBKH76CLrhKOfkj4lXTi3YcflkSsO+IU2IClTszAln7TeoN8veD38tjUJYeExS5f aIV0UPdepajzg== Received: from [127.0.1.1] (unknown [IPv6:2804:1b1:f803:a1ec:e46f:3b67:baf0:3d70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by bali.collaboradmins.com (Postfix) with ESMTPSA id 8242317E0ED3; Tue, 30 Dec 2025 15:03:54 +0100 (CET) From: =?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= Date: Tue, 30 Dec 2025 11:03:05 -0300 Subject: [PATCH RFC 5/6] drm/mediatek: ovl: Disable AFBC on MT8188 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251230-mtk-afbc-fixes-v1-5-6c0247b66e32@collabora.com> References: <20251230-mtk-afbc-fixes-v1-0-6c0247b66e32@collabora.com> In-Reply-To: <20251230-mtk-afbc-fixes-v1-0-6c0247b66e32@collabora.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Matthias Brugger , AngeloGioacchino Del Regno , Justin Green Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ariel.dalessandro@collabora.com, daniels@collabora.com, kernel@collabora.com, Nancy.Lin@mediatek.com, Jason-JH.Lin@mediatek.com, =?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= X-Mailer: b4 0.14.3 Despite MT8188's OVL being mostly the same IP as the OVL on MT8195, it does not support AFBC, even when the same register configurations are applied. Introduce a separate compatible for it with AFBC support disabled. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 196b874057ba..97f6694772d4 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -762,6 +762,21 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_dr= iver_data =3D { .num_formats =3D ARRAY_SIZE(mt8173_formats), }; =20 +static const struct mtk_disp_ovl_data mt8188_ovl_driver_data =3D { + .addr =3D DISP_REG_OVL_ADDR_MT8173, + .gmc_bits =3D 10, + .layer_nr =3D 4, + .fmt_rgb565_is_0 =3D true, + .smi_id_en =3D true, + .supports_afbc =3D false, + .blend_modes =3D BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE) | + BIT(DRM_MODE_BLEND_PIXEL_NONE), + .formats =3D mt8195_formats, + .num_formats =3D ARRAY_SIZE(mt8195_formats), + .supports_clrfmt_ext =3D true, +}; + static const struct mtk_disp_ovl_data mt8195_ovl_driver_data =3D { .addr =3D DISP_REG_OVL_ADDR_MT8173, .gmc_bits =3D 10, @@ -790,6 +805,8 @@ static const struct of_device_id mtk_disp_ovl_driver_dt= _match[] =3D { .data =3D &mt8192_ovl_driver_data}, { .compatible =3D "mediatek,mt8192-disp-ovl-2l", .data =3D &mt8192_ovl_2l_driver_data}, + { .compatible =3D "mediatek,mt8188-disp-ovl", + .data =3D &mt8188_ovl_driver_data}, { .compatible =3D "mediatek,mt8195-disp-ovl", .data =3D &mt8195_ovl_driver_data}, {}, --=20 2.51.0