From nobody Sun Feb 8 16:31:15 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CF8131ED6A for ; Mon, 29 Dec 2025 14:23:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767018239; cv=none; b=FHMPa4jNFtQUt4C3SH4m8Pyp4Zx2Xk/azajZ0MmzDgrykPJcvWAXsEU09RUKad98dCI/Rln/ZQsFS5aL+7ukq0PShbqA+6Gz2hRBZLPYyqP7IJ2c1MQZHZ9VHCVC89/tJcUeCXBLWuYWFgOcBVYow3F4BRST4EV16rmVV/nHYWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767018239; c=relaxed/simple; bh=spJDMR17QFW8kntrjyC1i6W+K4rh7nA8A9T9ETf0VKY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D1if7PDqouLKRR6v6LnPHv5PwxybB9KeQEsTMA+YgwLDdvBSjBQVpqwhSligZd+orsNK1QL7uxqTAMKS9suXbssWx5nVr3n+eiwa7V4HZprGdpJORmJ/0W+wqTQUOO6af5iiSxBhA5tAh+/IC1IUixSqmFEs5cEe6y4RbBXY+EE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZAceJvVE; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZAceJvVE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767018237; x=1798554237; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=spJDMR17QFW8kntrjyC1i6W+K4rh7nA8A9T9ETf0VKY=; b=ZAceJvVErRwFRvuWTbIO4APo2qcHYEKDBkvO5eOl4OeU9XRSbZi6Cyyq R+hrg61TjY9ob5ojoYIG8PxeWCA04XlTmEENm+69ugHC3i/isOQkXM0BK HFodnhUPfLMf4EExBtSvUyIT7zOXLrKRahGZ+FcUZ6eBIQ2IEhGXJ9RYH wOSqurWv5yFnIaFx3GMAT0ct6Ur5RTYfvzPguMJ0gkITUa/moMsK399/Z /+OyfWen6fHVdxMPegBPACWB/M6kmFy4LIrkjV6mzvvmZrxS0F3zCE6Gh 8XJ24xX2J8fhrtUt0M+AJyECoxaFOVABgtpYOEpsiTBPkOw4GJUE13y1E A==; X-CSE-ConnectionGUID: vpdw6cnHRsqHDaTU112uuw== X-CSE-MsgGUID: DxCQJM/lROyWEnfxeoNVFg== X-IronPort-AV: E=McAfee;i="6800,10657,11656"; a="79742755" X-IronPort-AV: E=Sophos;i="6.21,186,1763452800"; d="scan'208";a="79742755" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Dec 2025 06:23:55 -0800 X-CSE-ConnectionGUID: EaYgHQLWRIOzMbmfrkunXA== X-CSE-MsgGUID: ix4nVGJ6TdGq3Xn8j52rQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,186,1763452800"; d="scan'208";a="205829433" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa004.fm.intel.com with ESMTP; 29 Dec 2025 06:23:53 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 2E79C9E; Mon, 29 Dec 2025 15:23:51 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-kernel@vger.kernel.org Cc: Andy Shevchenko , Geert Uytterhoeven Subject: [PATCH v1 5/7] auxdisplay: arm-charlcd: Use readl_poll_timeout Date: Mon, 29 Dec 2025 14:52:38 +0100 Message-ID: <20251229142349.1251843-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251229142349.1251843-1-andriy.shevchenko@linux.intel.com> References: <20251229142349.1251843-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use readl_poll_timeout_atomic() from instead of using custom poll loops. The timeout settings are different, but that shouldn't be much of a problem. Instead of polling 10 times in a close loop, it polls for one millisecond. Signed-off-by: Andy Shevchenko --- drivers/auxdisplay/arm-charlcd.c | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/auxdisplay/arm-charlcd.c b/drivers/auxdisplay/arm-char= lcd.c index ac8604d3b9a0..a537126f5d6a 100644 --- a/drivers/auxdisplay/arm-charlcd.c +++ b/drivers/auxdisplay/arm-charlcd.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include @@ -115,20 +115,14 @@ static u8 charlcd_4bit_read_char(struct charlcd *lcd) { u8 data; u32 val; - int i; =20 /* If we can, use an IRQ to wait for the data, else poll */ if (lcd->irq >=3D 0) charlcd_wait_complete_irq(lcd); else { - i =3D 0; - val =3D 0; - while (!(val & CHAR_RAW_VALID) && i < 10) { - udelay(100); - val =3D readl(lcd->virtbase + CHAR_RAW); - i++; - } - + udelay(100); + readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val, + val & CHAR_RAW_VALID, 100, 1000); writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); } msleep(1); @@ -140,13 +134,9 @@ static u8 charlcd_4bit_read_char(struct charlcd *lcd) * The second read for the low bits does not trigger an IRQ * so in this case we have to poll for the 4 lower bits */ - i =3D 0; - val =3D 0; - while (!(val & CHAR_RAW_VALID) && i < 10) { - udelay(100); - val =3D readl(lcd->virtbase + CHAR_RAW); - i++; - } + udelay(100); + readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val, + val & CHAR_RAW_VALID, 100, 1000); writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); msleep(1); =20 --=20 2.50.1