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Sun, 28 Dec 2025 20:56:22 -0800 (PST) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7ff7dfac29bsm27902080b3a.39.2025.12.28.20.56.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Dec 2025 20:56:22 -0800 (PST) From: Praveen Talari To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , Praveen Talari , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alexey.klimov@linaro.org, krzk@kernel.org, bryan.odonoghue@linaro.org, jorge.ramirez@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com Cc: psodagud@quicinc.com, djaggi@quicinc.com, quic_msavaliy@quicinc.com, quic_vtanuku@quicinc.com, quic_arandive@quicinc.com, quic_shazhuss@quicinc.com, quic_cchiluve@quicinc.com Subject: [PATCH v2 12/12] i2c: qcom-geni: Enable I2C on SA8255p Qualcomm platforms Date: Mon, 29 Dec 2025 10:24:46 +0530 Message-Id: <20251229045446.3227667-13-praveen.talari@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251229045446.3227667-1-praveen.talari@oss.qualcomm.com> References: <20251229045446.3227667-1-praveen.talari@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjI5MDA0MiBTYWx0ZWRfX+8wp6YzaAvnT eyOZYwP5E0VavxM6EIYmQhVJUxFwamS2+BlutmCRY8ScRgV7l6tdnK9YJMzb46DZN/IEaHQmzLe /fXkfZ+BezYv3CS5YGRYFxkZiQjtr5dirZwEgRDtsEVYwwvAD37dkc24sd7bQ6ksXGc3ljkzY6d X2HjppouU+/xH1LeBHZgP3H+YNe8NK6JN6IeAGZ0BYujQg3/IYWiyfsx6+J1DJBEkmtcvSrspCK DvGFbojiavZaV4hdJdE+RJyFQAibQFhV4PTSUbOUu6Y0MZkno7PcWoLOmTWFFIrEbMcrVCyWJAf oUPKpZeB1ZjzoAd5mwbaKPJ4OFStQ8gDtiaHjCpC7SmXOwCurmojBf0OVkAtBfpb1fm37eXUbAO HaklDiwlfopkNlcnTdreIDNz8e/Q+W1aB4I6u3YhPTmAalA4UKm798PrDLiHTm6G7l4zcM17N4O K1zseSVsNehOsjifEPQ== X-Proofpoint-ORIG-GUID: nLv8dQkstSkTidT77kEvRXCq74Pgw1yz X-Proofpoint-GUID: nLv8dQkstSkTidT77kEvRXCq74Pgw1yz X-Authority-Analysis: v=2.4 cv=CK4nnBrD c=1 sm=1 tr=0 ts=695209f8 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=zgZzUwpPmSg69XYvEVoA:9 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-29_01,2025-12-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 adultscore=0 suspectscore=0 priorityscore=1501 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512290042 Content-Type: text/plain; charset="utf-8" The Qualcomm automotive SA8255p SoC relies on firmware to configure platform resources, including clocks, interconnects and TLMM. The driver requests resources operations over SCMI using power and performance protocols. The SCMI power protocol enables or disables resources like clocks, interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, such as resume/suspend, to control power on/off. The SCMI performance protocol manages I2C frequency, with each frequency rate represented by a performance level. The driver uses geni_se_set_perf_opp() API to request the desired frequency rate.. As part of geni_se_set_perf_opp(), the OPP for the requested frequency is obtained using dev_pm_opp_find_freq_floor() and the performance level is set using dev_pm_opp_set_opp(). Signed-off-by: Praveen Talari --- V1->v2: From kernel test robot: - Initialized ret to "0" in resume/suspend callbacks. Bjorn: - Used seperate APIs for the resouces enable/disable. --- drivers/i2c/busses/i2c-qcom-geni.c | 53 ++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 13 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 1c9356e13b97..72457b98f155 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -82,6 +82,10 @@ struct geni_i2c_desc { char *icc_ddr; bool no_dma_support; unsigned int tx_fifo_depth; + int (*resources_init)(struct geni_se *se); + int (*set_rate)(struct geni_se *se, unsigned long freq); + int (*power_on)(struct geni_se *se); + int (*power_off)(struct geni_se *se); }; =20 #define QCOM_I2C_MIN_NUM_OF_MSGS_MULTI_DESC 2 @@ -203,8 +207,9 @@ static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi= 2c) return -EINVAL; } =20 -static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2c) +static int qcom_geni_i2c_conf(struct geni_se *se, unsigned long freq) { + struct geni_i2c_dev *gi2c =3D dev_get_drvdata(se->dev); const struct geni_i2c_clk_fld *itr =3D gi2c->clk_fld; u32 val; =20 @@ -217,6 +222,7 @@ static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2= c) val |=3D itr->t_low_cnt << LOW_COUNTER_SHFT; val |=3D itr->t_cycle_cnt; writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); + return 0; } =20 static void geni_i2c_err_misc(struct geni_i2c_dev *gi2c) @@ -908,7 +914,9 @@ static int geni_i2c_xfer(struct i2c_adapter *adap, return ret; } =20 - qcom_geni_i2c_conf(gi2c); + ret =3D gi2c->dev_data->set_rate(&gi2c->se, gi2c->clk_freq_out); + if (ret) + return ret; =20 if (gi2c->gpi_mode) ret =3D geni_i2c_gpi_xfer(gi2c, msgs, num); @@ -1041,8 +1049,9 @@ static int geni_i2c_init(struct geni_i2c_dev *gi2c) return ret; } =20 -static int geni_i2c_resources_init(struct geni_i2c_dev *gi2c) +static int geni_i2c_resources_init(struct geni_se *se) { + struct geni_i2c_dev *gi2c =3D dev_get_drvdata(se->dev); int ret; =20 ret =3D geni_se_resources_init(&gi2c->se); @@ -1095,7 +1104,7 @@ static int geni_i2c_probe(struct platform_device *pde= v) spin_lock_init(&gi2c->lock); platform_set_drvdata(pdev, gi2c); =20 - ret =3D geni_i2c_resources_init(gi2c); + ret =3D gi2c->dev_data->resources_init(&gi2c->se); if (ret) return ret; =20 @@ -1154,15 +1163,17 @@ static void geni_i2c_shutdown(struct platform_devic= e *pdev) =20 static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev) { - int ret; + int ret =3D 0; struct geni_i2c_dev *gi2c =3D dev_get_drvdata(dev); =20 disable_irq(gi2c->irq); =20 - ret =3D geni_se_resources_deactivate(&gi2c->se); - if (ret) { - enable_irq(gi2c->irq); - return ret; + if (gi2c->dev_data->power_off) { + ret =3D gi2c->dev_data->power_off(&gi2c->se); + if (ret) { + enable_irq(gi2c->irq); + return ret; + } } =20 gi2c->suspended =3D 1; @@ -1171,12 +1182,14 @@ static int __maybe_unused geni_i2c_runtime_suspend(= struct device *dev) =20 static int __maybe_unused geni_i2c_runtime_resume(struct device *dev) { - int ret; + int ret =3D 0; struct geni_i2c_dev *gi2c =3D dev_get_drvdata(dev); =20 - ret =3D geni_se_resources_activate(&gi2c->se); - if (ret) - return ret; + if (gi2c->dev_data->power_on) { + ret =3D gi2c->dev_data->power_on(&gi2c->se); + if (ret) + return ret; + } =20 enable_irq(gi2c->irq); gi2c->suspended =3D 0; @@ -1215,6 +1228,10 @@ static const struct dev_pm_ops geni_i2c_pm_ops =3D { =20 static const struct geni_i2c_desc geni_i2c =3D { .icc_ddr =3D "qup-memory", + .resources_init =3D geni_i2c_resources_init, + .set_rate =3D qcom_geni_i2c_conf, + .power_on =3D geni_se_resources_activate, + .power_off =3D geni_se_resources_deactivate, }; =20 static const struct geni_i2c_desc i2c_master_hub =3D { @@ -1222,11 +1239,21 @@ static const struct geni_i2c_desc i2c_master_hub = =3D { .icc_ddr =3D NULL, .no_dma_support =3D true, .tx_fifo_depth =3D 16, + .resources_init =3D geni_i2c_resources_init, + .set_rate =3D qcom_geni_i2c_conf, + .power_on =3D geni_se_resources_activate, + .power_off =3D geni_se_resources_deactivate, +}; + +static const struct geni_i2c_desc sa8255p_geni_i2c =3D { + .resources_init =3D geni_se_domain_attach, + .set_rate =3D geni_se_set_perf_opp, }; =20 static const struct of_device_id geni_i2c_dt_match[] =3D { { .compatible =3D "qcom,geni-i2c", .data =3D &geni_i2c }, { .compatible =3D "qcom,geni-i2c-master-hub", .data =3D &i2c_master_hub }, + { .compatible =3D "qcom,sa8255p-geni-i2c", .data =3D &sa8255p_geni_i2c }, {} }; MODULE_DEVICE_TABLE(of, geni_i2c_dt_match); --=20 2.34.1