From nobody Mon Feb 9 13:10:55 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 872572E36F8; Mon, 29 Dec 2025 20:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041273; cv=none; b=d2Qw3uu2/bFrvY5veqbxVjbrrUHCM0oO5idTiVdu/RBGgNPS6JKYjzng6j40yXAbCfimzQvEZ8mCCftqkeJzsybmd8C1Z5o4GO3basFrKSu7IV+DnfQRnkg0Ys9NBiiDog1fGjZ7K6gHKlY4wikbR3Wy4xH6uUg3J0Urd7TGeOE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041273; c=relaxed/simple; bh=xeDHdBw6Z9IxbUwL9tNS7SfoXiVCCTdRx9idJI1bq90=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F6Jwq2bs0h/eGPMRBEQwM/maCB0VDVTzfMMiZLwb/3nK4pLjaMUdyWRg9u5V/cwZuRxNbrncq/0tMvBJdG+5uQ3tXnlee2vSmx0pwwy6RpsIzGdPECSzx4bn8Eqyn5pERLT/t1CLcDZ0KMF9TzLpeldNr7UL4NOzKtlvGc0XsKM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PKdciKtm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PKdciKtm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 533E8C116D0; Mon, 29 Dec 2025 20:47:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767041273; bh=xeDHdBw6Z9IxbUwL9tNS7SfoXiVCCTdRx9idJI1bq90=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PKdciKtmj4uQbRnMhACxml7papZkHbaGgjVtDBt2CAThENV7DTQr2GByWaxytTGU4 o+3G/7xdLquym47UxHIQOcy3uKmOVp/Ex9K2dTL/RuFTzFZtuk6HiEApay4zd6NcPZ UdJvjMifew+kw9QRi/HLfejDtNNlX5AHWt7sm4YJ6ld3fi2nzKsgRYUGSpB6UetgQr mjSA/pvABG1/B0LEjdXNtW5q8IOsbV0HgzF2lK4pWwaR2rHVG2C7BUqPTpHOMhJ6u7 fqGFlGNkFVE8AJ/AcvSOB0R88OYPxewrcIPGwgU3/R4YWyBBGyQTUfNZVHMCRUQ1wV KaW0mowdMlZGQ== From: Konrad Dybcio Date: Mon, 29 Dec 2025 21:47:39 +0100 Subject: [PATCH RFT 1/3] dt-bindings: display/msm/gpu: Straighten out reg-names on A619L/610/702 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251229-topic-6115_2290_gpu_dbgc-v1-1-4a24d196389c@oss.qualcomm.com> References: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> In-Reply-To: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Rob Clark , Sean Paul , Akhil P Oommen , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767041261; l=923; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=tnz6B2TtaT2aU9yFmk2ctbrpYfclO0IOnelOYfpxa9s=; b=WQq3hghXXJlgk9eWpIuBFD3joeVYCl5qPq6M963a4PmIpB4GGAOW9QMGJGSSPqb2yGvncuO+G TpkspVYjyXcCyn0WfM35iI0IM+gFI3e7G7R1C8hEFfwMIjsaufeufx4 X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio These GPUs have physically have the same regions as the base case ("main" + "cx_mem" + "cx_dbgc"). Remove the specific override. Signed-off-by: Konrad Dybcio Acked-by: Rob Herring (Arm) Reviewed-by: Akhil P Oommen --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 6 ------ 1 file changed, 6 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Docum= entation/devicetree/bindings/display/msm/gpu.yaml index 826aafdcc20b..ae8f76136fa2 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -378,12 +378,6 @@ allOf: - const: xo description: GPUCC clocksource clock =20 - reg-names: - minItems: 1 - items: - - const: kgsl_3d0_reg_memory - - const: cx_dbgc - required: - clocks - clock-names --=20 2.52.0 From nobody Mon Feb 9 13:10:55 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F14842E62C6; Mon, 29 Dec 2025 20:48:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041282; cv=none; b=WhPCVR7c+r36IHy0GJoOuHwNsZ9+sajnayxYVTR1tyXF9UK13MTWh0jrXGJf3CPvZMdsMn1oYo2C5L2zi3FtP4+9IE9Z/VhPq5TZV8fWBm96Y9m/41E8Q8g6m0TpuFhMPLeqFOU8dsOg+JD62qraddM1UDxKQ6cPUW9C3KAHSBI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041282; c=relaxed/simple; bh=gkumClht7zx29/B83YcBFN/GkuT84+EDxn57FN6zFdQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=p+5JLvuZC5ql1XWmTzQZ102tYr10VmoTSE1VkuSFQSwZx3fSFAIEURyCQn55hzx0xAoXA+bhdVbji0wcK6nzw1UegJh94sa96103bQI1kK+V8d2DmaodFGo/nuymyTK6s9hSyE4v8+nPVgAw7FPyJYBG0QVypUlvYjafqhQfjiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G/h7Hyry; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G/h7Hyry" Received: by smtp.kernel.org (Postfix) with ESMTPSA id ECAF7C19422; Mon, 29 Dec 2025 20:47:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767041280; bh=gkumClht7zx29/B83YcBFN/GkuT84+EDxn57FN6zFdQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=G/h7HyryUvZcoKMptS8kbGgGQ9+s1B+cakwpQNO3HtOdKrgnupY4Ud3uVBTXVRc8f ah1tKTcX7iJVMMz9XLjGnS2AHLZCItFT47x3xD1NuHfci5A0D7sXRk55r+sRU+q2LF FdY8gd0aQtpBJ4XOuKcd+aJPGUDMzEYnzaZtCEKSYmq/v6jM/JU/ABu//RyZd0tl94 kkD4qGehHHlotIkHlyR40yU22NPK+8WkjTCvKbQqZdYqiyVDY+91OW1jHdF+gZXfNI MLrvSefqfDhjWE/Fmh4oB1C9UcreOj8HVOXkuqG4HnNAF29F/S9cvnp5Mc787cHR1r gMaZ9Uf6Vm0nA== From: Konrad Dybcio Date: Mon, 29 Dec 2025 21:47:40 +0100 Subject: [PATCH RFT 2/3] arm64: dts: qcom: agatti: Add CX_MEM/DBGC GPU regions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251229-topic-6115_2290_gpu_dbgc-v1-2-4a24d196389c@oss.qualcomm.com> References: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> In-Reply-To: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Rob Clark , Sean Paul , Akhil P Oommen , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767041261; l=1394; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=Ed7Ru8FNSvUGpqMZKedhA/ib/MjVW4zSC6WOqEnGhNA=; b=v4b2pWQAuvOjUDK1ag4LiaU9auMc0cvoffcLp6BUuedNnFylLKDQbwGMr232B7NiqdpXSURum 1cNGpbp2mbvC+sFaqtAqArmmv4zZQNLnZzoxCL8QwIm5MPzmhjtAkdr X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio Describe the GPU register regions, with the former existing but not being used much if at all on this silicon, and the latter containing various debugging levers generally related to dumping the state of the IP upon a crash. Fixes: 4faeef52c8e6 ("arm64: dts: qcom: qcm2290: Add GPU nodes") Reported-by: Krzysztof Kozlowski Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015c= f357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063 Signed-off-by: Konrad Dybcio Reviewed-by: Akhil P Oommen Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/agatti.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qco= m/agatti.dtsi index 8bf5c5583fc2..969ae1378db2 100644 --- a/arch/arm64/boot/dts/qcom/agatti.dtsi +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi @@ -1591,8 +1591,12 @@ usb_dwc3_ss: endpoint { =20 gpu: gpu@5900000 { compatible =3D "qcom,adreno-07000200", "qcom,adreno"; - reg =3D <0x0 0x05900000 0x0 0x40000>; - reg-names =3D "kgsl_3d0_reg_memory"; + reg =3D <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names =3D "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; =20 interrupts =3D ; =20 --=20 2.52.0 From nobody Mon Feb 9 13:10:55 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1672E6CAA; Mon, 29 Dec 2025 20:48:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041288; cv=none; b=qBofrX9wyzKvPznuTXCRvaR8V+4bdbOwbPBti8u/ndWYhdNOeexO1ML2neeOs8rxXTZsDqXn3tFeas87cRGsWDa9xiuoONn9b+2V5Pi7LY1G0P4P/6Bfi/xRAWbvfXN1iNDJ5mEu9CkQUZf1OS2Stw0PzhntcbTIkjXIpmreyuA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767041288; c=relaxed/simple; bh=/HcHUKH9WOn4u11rA/8fd9MG7H3ox7CxfRjWpVBqbEo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OcBb3cbsMkZenap3ZCVoCF1E/a8zxRikR0u2YsBnY6XaxLmXuEvInKvUEEipZKpwNcjvG1STuU1YtT7/GVKCYtWuC6egaoh9ooOsliFknP7MoYCfWZobl4ItLiWvhpGKykI4ZGe48LPC1u1UEFYFhIzyJKUx9rnqNxExNnXL8/o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=d3NoOfFo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="d3NoOfFo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A0D87C4CEF7; Mon, 29 Dec 2025 20:48:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767041285; bh=/HcHUKH9WOn4u11rA/8fd9MG7H3ox7CxfRjWpVBqbEo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=d3NoOfFoKEMjGZmhbXTwwY7EDS6Ku7T3w492GkGseh+K35d9e4P6f+N2x6J+ni8Zq UBN7sD7unM2e8R9CR7F+Sblj0SX4q9EevF+dx0atb+u/Ld7nkz71lHTspu0ODi1gCn oStxDhEIiBGTzU7cre4vfPqp26lm/AAYu5XLJfIw1D5J8UxTsECl0TjotckY3NU/0a vkAtHZOuwRrVgw69Oc8JeJbxe0RVc6xDGfzv2BOm/0IgiYd8LhNradgrGJuKykzR5J R96paUuGljh+Il6QQEn1dtZ1fOzSIeViLWc80+w3OLpdmmGiwa5BWvLYGGnhhuZcOq gJS2PSjSElhkw== From: Konrad Dybcio Date: Mon, 29 Dec 2025 21:47:41 +0100 Subject: [PATCH RFT 3/3] arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251229-topic-6115_2290_gpu_dbgc-v1-3-4a24d196389c@oss.qualcomm.com> References: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> In-Reply-To: <20251229-topic-6115_2290_gpu_dbgc-v1-0-4a24d196389c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Rob Clark , Sean Paul , Akhil P Oommen , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767041261; l=1458; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=aO7/EdvbRTHMZ0mluFQ6+MO7rNiL4vfNS224/qLOXj8=; b=LN4bsZucaHqv8euXO3Ye/44gUvEgjH4WpNQ20/BaxYkzodXoPiNWwdV9m0PnkoNAG1vr+UaIO pboJrQisvoEBfNunZ6zbLNk5mrai9x5uA8zhE5CRjKzWNmjfiLRlSD1 X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio Describe the GPU register regions, with the former existing but not being used much if at all on this silicon, and the latter containing various debugging levers generally related to dumping the state of the IP upon a crash. Fixes: 11750af256f8 ("arm64: dts: qcom: sm6115: Add GPU nodes") Reported-by: Krzysztof Kozlowski Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015c= f357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063 Signed-off-by: Konrad Dybcio Reviewed-by: Akhil P Oommen Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index 5e2032c26ea3..4dba724f2c75 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1715,8 +1715,12 @@ usb_dwc3_ss: endpoint { =20 gpu: gpu@5900000 { compatible =3D "qcom,adreno-610.0", "qcom,adreno"; - reg =3D <0x0 0x05900000 0x0 0x40000>; - reg-names =3D "kgsl_3d0_reg_memory"; + reg =3D <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names =3D "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; =20 /* There's no (real) GMU, so we have to handle quite a bunch of clocks!= */ clocks =3D <&gpucc GPU_CC_GX_GFX3D_CLK>, --=20 2.52.0