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Mon, 29 Dec 2025 02:42:55 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2f3d4cbb7sm273412365ad.59.2025.12.29.02.42.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 02:42:54 -0800 (PST) From: Krishna Chaitanya Chundru Date: Mon, 29 Dec 2025 16:12:42 +0530 Subject: [PATCH v2 2/3] PCI: dwc: Correct iATU index increment for MSG TLP region Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251229-ecam_io_fix-v2-2-41a0e56a6faa@oss.qualcomm.com> References: <20251229-ecam_io_fix-v2-0-41a0e56a6faa@oss.qualcomm.com> In-Reply-To: <20251229-ecam_io_fix-v2-0-41a0e56a6faa@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Frank Li , Serge Semin Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, macro@orcam.me.uk, Krishna Chaitanya Chundru , stable@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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However, the code incorrectly assigned pp->msg_atu_index =3D i without incrementing i first, causing the MSG TLP region to reuse the last configured outbound window instead of the next available one. This can cause issue with IO transfers as this can over write iATU configured for IO memory. Fix this by incrementing i before assigning it to msg_atu_index so that the MSG TLP region uses a dedicated iATU entry. Added error logs in dw_pcie_pme_turn_off(). Fixes: e1a4ec1a9520 ("PCI: dwc: Add generic MSG TLP support for sending PME= _Turn_Off when system suspend") Tested-by: Maciej W. Rozycki Reviewed-by: Frank Li Cc: stable@vger.kernel.org Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/dwc/pcie-designware-host.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 32a26458ed8f1696fe2fdcf9df6b795c4c761f1f..88b6ace0607e97bf6dd6bf7886b= aaa13bf267e6e 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -942,7 +942,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) dev_warn(pci->dev, "Ranges exceed outbound iATU size (%d)\n", pci->num_ob_windows); =20 - pp->msg_atu_index =3D i; + pp->msg_atu_index =3D ++i; =20 i =3D 0; resource_list_for_each_entry(entry, &pp->bridge->dma_ranges) { @@ -1113,11 +1113,15 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci) void __iomem *mem; int ret; =20 - if (pci->num_ob_windows <=3D pci->pp.msg_atu_index) + if (pci->num_ob_windows <=3D pci->pp.msg_atu_index) { + dev_err(pci->dev, "No available iATU enteries\n"); return -ENOSPC; + } =20 - if (!pci->pp.msg_res) + if (!pci->pp.msg_res) { + dev_err(pci->dev, "Msg resource is not allocated\n"); return -ENOSPC; + } =20 atu.code =3D PCIE_MSG_CODE_PME_TURN_OFF; atu.routing =3D PCIE_MSG_TYPE_R_BC; --=20 2.34.1