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Mon, 29 Dec 2025 02:42:51 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2f3d4cbb7sm273412365ad.59.2025.12.29.02.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 02:42:50 -0800 (PST) From: Krishna Chaitanya Chundru Date: Mon, 29 Dec 2025 16:12:41 +0530 Subject: [PATCH v2 1/3] PCI: dwc: Fix skipped index 0 in outbound ATU setup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251229-ecam_io_fix-v2-1-41a0e56a6faa@oss.qualcomm.com> References: <20251229-ecam_io_fix-v2-0-41a0e56a6faa@oss.qualcomm.com> In-Reply-To: <20251229-ecam_io_fix-v2-0-41a0e56a6faa@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Frank Li , Serge Semin Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, macro@orcam.me.uk, Krishna Chaitanya Chundru , stable@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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This results in the first outbound window never being configured. Update the logic to start from index 0 and use post-increment (i++) when assigning atu.index. Fixes: ce06bf570390f ("PCI: dwc: Check iATU in/outbound range setup status") Cc: stable@vger.kernel.org Signed-off-by: Krishna Chaitanya Chundru --- Note:- The fix tag shown above is for applying this patch cleanly, further below versions we need to manually apply them, If any one intrested to apply this fix then we can submit another patch based on that kernel version. --- drivers/pci/controller/dwc/pcie-designware-host.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index e92513c5bda51bde3a7157033ddbd73afa370d78..32a26458ed8f1696fe2fdcf9df6= b795c4c761f1f 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -896,10 +896,10 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) if (resource_type(entry->res) !=3D IORESOURCE_MEM) continue; =20 - if (pci->num_ob_windows <=3D ++i) + if (pci->num_ob_windows < i) break; =20 - atu.index =3D i; + atu.index =3D i++; atu.type =3D PCIE_ATU_TYPE_MEM; atu.parent_bus_addr =3D entry->res->start - pci->parent_bus_offset; atu.pci_addr =3D entry->res->start - entry->offset; @@ -920,7 +920,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) } =20 if (pp->io_size) { - if (pci->num_ob_windows > ++i) { + if (pci->num_ob_windows > i) { atu.index =3D i; atu.type =3D PCIE_ATU_TYPE_IO; atu.parent_bus_addr =3D pp->io_base - pci->parent_bus_offset; --=20 2.34.1