From nobody Mon Feb 9 08:19:55 2026 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CFF62C029D for ; Sun, 28 Dec 2025 09:22:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766913755; cv=none; b=DweDNzERilBbF6JrvoMwLZDA8DbkjQQYnEEaxiBFG2qdQEkGZT9CaCm0DkCocXvc776qr+hu4f9cSBOZa0aJTSdoSwq8HyAt20NebVHpfLEDC+LA7/cFJMKqFx+OE1KDfpimpwgx5YhKH5shi8u3UUuiZ/JQJojKetxStwpRl4g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766913755; c=relaxed/simple; bh=fwoFwoOwZ79brO3bjK4dcnd+sMd5nFLEFPSURVCAeM8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=ZXi1VPDNuPAgR4KEI++giPSXkxBNpDsqtfCijTftmpy+Wedd1Yud2mC50Xf1tYAebREymDdABKlQwSO4PdZV2KPR7ceeffaCpk0BOqnR2fN4ZUc4ezapVAcrBg2Tp760HDNhih87u2V+AOwR22Ddp8Gy7vcCMt73E2cD1UIikIE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=shenghaoyang.info; spf=pass smtp.mailfrom=shenghaoyang.info; dkim=pass (2048-bit key) header.d=shenghaoyang.info header.i=@shenghaoyang.info header.b=E/37fXED; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=shenghaoyang.info Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=shenghaoyang.info Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=shenghaoyang.info header.i=@shenghaoyang.info header.b="E/37fXED" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2a08cb5e30eso14851735ad.1 for ; Sun, 28 Dec 2025 01:22:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=shenghaoyang.info; s=google; t=1766913753; x=1767518553; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=btGrbjMukhkE9Huw3B46VPetYheSVmss50T7F8K/NzU=; b=E/37fXEDYXY3oAx8hmtxgG/edTwSRlCExMUE8Azrb7NK1wExgT2Njsl979bs8QFWe4 +w8qvE5MypD/7xCS72bxhGiXD+QpMTbL46OHV7JIi/P4MFIpWJxZJH1Yg5IM6ks6Lpw1 hBe4pAZLJuMxlfL9CR3L5efHebx7zldSUangh7A9j1ri2pfeXLTdYXdf0PmDCYvj4COI TZ1scNWf6wgb4mOzjUx9Lte2O5Ld+FftuewHaI7JSxJ5kb8KQtM/B3vgzb/5NtdeN5qD mPvJ0zH6ySzFBoNjfh1vqqS7VvLoKG/0JvaGd0X6iDLO3de1gz/P822iV+W113gBb6ft WAmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766913753; x=1767518553; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=btGrbjMukhkE9Huw3B46VPetYheSVmss50T7F8K/NzU=; b=ZUcK8mA0pWOOcRctqFoHZ8QEA70J2SNLKsnbzW3qIJVzTkF/9YNuvA62uB6fw57d9S ZIDQ6xAefBT69MBcB1x8GpB0u8sHYIE11X49xX28mlJ4feh0Deog8T9Q9bVn/O+6fq8X 7AoNLAOYCZNGGmuTtMe5TWJ4LEm6xolce089y65jpRXagoxR3C/CHwXQj2XlhWhAJ2eD pmrs0DTlIrEWe1TpxcthaLJ313ZORELCmKNbas7fRxU+C9ECyFCPTtcLlXB5gd07LHts /fjeCtPORf7Ydw3ygoa7Oh9KxT3XgRh4DLDFzflxaBwOaSoOlP5zzDv2WMz7zt07C9Lh BG1A== X-Forwarded-Encrypted: i=1; AJvYcCXXN47dVeqDMf9bHhEEXhaKT0ni6Z7VmdJ9YUFqYtqoAhJT8kunOoSSktmM10BFcicC9YtgU0gprDr9Qqg=@vger.kernel.org X-Gm-Message-State: AOJu0Ywhp9nMazK8ULwjoK9tAI7GgiKeVzLOlw6xplXuQK6SYL71L/IV 8zdu2uAUvujyXCDlYLCKZ8+8H0yTF/mT4V6mkW4M3ZwjkaIH1VFhqYuTd4BxL3WrRRo= X-Gm-Gg: AY/fxX7jWZHeV6JX8BdoltmUlDDTKtJD4fB/pdIm0CoR8ijep8sv52iu81lWy1hRPTw V2zRAMdpisKH6U4IbOVy8oX/E2pwwuTl4qjnCwAc2XnMq73Aj+Ai3l1ynGd8g7dSHQWk5Eynygb EjkyhvpLAfu4GZlZ2BahhPPB3MNcDoR9/7uSdxFxbUFxcyisePd1kJgCAT8YtxkC52LA+WVL7bT 7axOhxruVb6Glx3KaB8dD7oK0gxhc73CS5PW5Is8l9iPA4LM/wqg3ydW5i2Li6txd59ynJ4YetG OHlaudSAcreMs4F6c4OT4ihH6k6QDDvkzHsfbApGqCA7gB3hhROkjSm+XBYKuZOVv8ePR6/ZTbH GZ3lEcuWs8NC/bkq+Wy2lCCQWx7/rlut6UBqwi2qC0ZztQ4rghcOOUarUll7rDiW8bIvO2CadUQ MeSMLAEdYE X-Google-Smtp-Source: AGHT+IGdyJfOW5uro74UetUR3eEqSXEEp/H+D4mywZrRrWNe9MzaUu+kyvmohAZoutwkEfrKSGQ6WA== X-Received: by 2002:a05:6a21:398:b0:35d:1244:177 with SMTP id adf61e73a8af0-376a77f5b4bmr18068554637.1.1766913752615; Sun, 28 Dec 2025 01:22:32 -0800 (PST) Received: from localhost ([132.147.84.99]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-c1e7961c130sm22665096a12.3.2025.12.28.01.22.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 28 Dec 2025 01:22:32 -0800 (PST) From: Shenghao Yang To: x86@kernel.org Cc: Jonathan Corbet , "Rafael J. Wysocki" , Len Brown , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Shenghao Yang Subject: [PATCH] x86/acpi: Add acpi=spcr to use SPCR-provided default console Date: Sun, 28 Dec 2025 17:22:22 +0800 Message-ID: <20251228092222.130954-1-me@shenghaoyang.info> X-Mailer: git-send-email 2.52.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit 0231d00082f6 ("ACPI: SPCR: Make SPCR available to x86") made SPCR available as an earlycon option on x86 but did not add it as a preferred console to avoid breaking existing setups - users have to round trip the dumped console options ("SPCR: console: uart,io,0x3f8,115200") back via their bootloader. Let users opt in so serial console configuration can be made automatic. Signed-off-by: Shenghao Yang --- Documentation/admin-guide/kernel-parameters.txt | 2 ++ arch/x86/kernel/acpi/boot.c | 7 ++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index a8d0afde7f85..f9c5b6e4eda9 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -125,6 +125,8 @@ Kernel parameters may result in duplicate corrected error reports. nospcr -- disable console in ACPI SPCR table as default _serial_ console on ARM64 + spcr -- enable console in ACPI SPCR table as + default _serial_ console on X86 For ARM64, ONLY "acpi=3Doff", "acpi=3Don", "acpi=3Dforce" or "acpi=3Dnospcr" are available For RISCV64, ONLY "acpi=3Doff", "acpi=3Don" or "acpi=3Dforce" diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 9fa321a95eb3..83bbfa1d6f1f 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -47,6 +47,7 @@ EXPORT_SYMBOL(acpi_disabled); =20 int acpi_noirq; /* skip ACPI IRQ initialization */ static int acpi_nobgrt; /* skip ACPI BGRT */ +static int acpi_spcr_add __initdata; /* add SPCR-provided console */ int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ EXPORT_SYMBOL(acpi_pci_disabled); =20 @@ -1666,7 +1667,7 @@ int __init acpi_boot_init(void) x86_init.pci.init =3D pci_acpi_init; =20 /* Do not enable ACPI SPCR console by default */ - acpi_parse_spcr(earlycon_acpi_spcr_enable, false); + acpi_parse_spcr(earlycon_acpi_spcr_enable, acpi_spcr_add); return 0; } =20 @@ -1703,6 +1704,10 @@ static int __init parse_acpi(char *arg) /* "acpi=3Dnocmcff" disables FF mode for corrected errors */ else if (strcmp(arg, "nocmcff") =3D=3D 0) { acpi_disable_cmcff =3D 1; + } + /* "acpi=3Dspcr" adds the SPCR-provided console as a preferred one */ + else if (strcmp(arg, "spcr") =3D=3D 0) { + acpi_spcr_add =3D 1; } else { /* Core will printk when we return error. */ return -EINVAL; --=20 2.52.0