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In shared subsystem code, there is no guarantee that the subsystem functions will only be called after a driver has been attached, nor that they will not be referenced after the managed resources have been released during driver detach. To ensure correct lifetime handling, avoid using devres-based allocations in the reboot-mode and explicitly handle allocation and cleanup of resources. Fixes: 4fcd504edbf7 ("power: reset: add reboot mode driver") Signed-off-by: Shivendra Pratap --- drivers/power/reset/reboot-mode.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot= -mode.c index fba53f638da04655e756b5f8b7d2d666d1379535..3af6bc16a76daee686e8110b74e= 71b0e62b13ef8 100644 --- a/drivers/power/reset/reboot-mode.c +++ b/drivers/power/reset/reboot-mode.c @@ -3,6 +3,8 @@ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd */ =20 +#define pr_fmt(fmt) "reboot-mode: " fmt + #include #include #include @@ -10,6 +12,7 @@ #include #include #include +#include =20 #define PREFIX "mode-" =20 @@ -71,9 +74,11 @@ static int reboot_mode_notify(struct notifier_block *thi= s, int reboot_mode_register(struct reboot_mode_driver *reboot) { struct mode_info *info; + struct mode_info *next; struct property *prop; struct device_node *np =3D reboot->dev->of_node; size_t len =3D strlen(PREFIX); + u32 magic; int ret; =20 INIT_LIST_HEAD(&reboot->head); @@ -82,19 +87,17 @@ int reboot_mode_register(struct reboot_mode_driver *reb= oot) if (strncmp(prop->name, PREFIX, len)) continue; =20 - info =3D devm_kzalloc(reboot->dev, sizeof(*info), GFP_KERNEL); + if (of_property_read_u32(np, prop->name, &magic)) { + pr_err("reboot mode %s without magic number\n", prop->name); + continue; + } + + info =3D kzalloc(sizeof(*info), GFP_KERNEL); if (!info) { ret =3D -ENOMEM; goto error; } =20 - if (of_property_read_u32(np, prop->name, &info->magic)) { - dev_err(reboot->dev, "reboot mode %s without magic number\n", - info->mode); - devm_kfree(reboot->dev, info); - continue; - } - info->mode =3D kstrdup_const(prop->name + len, GFP_KERNEL); if (!info->mode) { ret =3D -ENOMEM; @@ -102,8 +105,7 @@ int reboot_mode_register(struct reboot_mode_driver *reb= oot) } else if (info->mode[0] =3D=3D '\0') { kfree_const(info->mode); ret =3D -EINVAL; - dev_err(reboot->dev, "invalid mode name(%s): too short!\n", - prop->name); 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Some reboot-mode based drivers may require passing two independent 32-bit arguments during a reboot sequence, for uses-cases, where a mode requires an additional argument. Such drivers may not be able to use the reboot-mode driver. For example, ARM PSCI vendor-specific resets, need two arguments for its operation =E2=80=93 reset_type and cookie, to complete the reset operation. If a driver wants to implement this firmware-based reset, it cannot use reboot-mode framework. Introduce 64-bit magic values in reboot-mode driver to accommodate up-to two 32-bit arguments. u64 magic Reviewed-by: Nirmesh Kumar Singh Reviewed-by: Umang Chheda -------------------------------------------- | Higher 32 bit | Lower 32 bit | | arg2 | arg1 | -------------------------------------------- Update current reboot-mode drivers for 64-bit magic. Reviewed-by: Umang Chheda Reviewed-by: Nirmesh Kumar Singh Signed-off-by: Shivendra Pratap --- drivers/power/reset/nvmem-reboot-mode.c | 10 ++++++---- drivers/power/reset/qcom-pon.c | 8 +++++--- drivers/power/reset/reboot-mode.c | 24 ++++++++++++++++++------ drivers/power/reset/syscon-reboot-mode.c | 8 +++++--- include/linux/reboot-mode.h | 6 +++++- 5 files changed, 39 insertions(+), 17 deletions(-) diff --git a/drivers/power/reset/nvmem-reboot-mode.c b/drivers/power/reset/= nvmem-reboot-mode.c index 41530b70cfc48c2a83fbbd96f523d5816960a0d1..b3d21d39b0f732254c40103db1b= 51fb7045ce344 100644 --- a/drivers/power/reset/nvmem-reboot-mode.c +++ b/drivers/power/reset/nvmem-reboot-mode.c @@ -16,15 +16,17 @@ struct nvmem_reboot_mode { struct nvmem_cell *cell; }; =20 -static int nvmem_reboot_mode_write(struct reboot_mode_driver *reboot, - unsigned int magic) +static int nvmem_reboot_mode_write(struct reboot_mode_driver *reboot, u64 = magic) { - int ret; struct nvmem_reboot_mode *nvmem_rbm; + u32 magic_arg1; + int ret; =20 + /* Use low 32 bits of magic for argument_1 */ + magic_arg1 =3D FIELD_GET(GENMASK_ULL(31, 0), magic); nvmem_rbm =3D container_of(reboot, struct nvmem_reboot_mode, reboot); =20 - ret =3D nvmem_cell_write(nvmem_rbm->cell, &magic, sizeof(magic)); + ret =3D nvmem_cell_write(nvmem_rbm->cell, &magic_arg1, sizeof(magic_arg1)= ); if (ret < 0) dev_err(reboot->dev, "update reboot mode bits failed\n"); =20 diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c index 7e108982a582e8243c5c806bd4a793646b87189f..ccce1673b2ec47d02524edd4481= 1d4f528c243e8 100644 --- a/drivers/power/reset/qcom-pon.c +++ b/drivers/power/reset/qcom-pon.c @@ -27,17 +27,19 @@ struct qcom_pon { long reason_shift; }; =20 -static int qcom_pon_reboot_mode_write(struct reboot_mode_driver *reboot, - unsigned int magic) +static int qcom_pon_reboot_mode_write(struct reboot_mode_driver *reboot, u= 64 magic) { struct qcom_pon *pon =3D container_of (reboot, struct qcom_pon, reboot_mode); + u32 magic_arg1; int ret; =20 + /* Use low 32 bits of magic for argument_1 */ + magic_arg1 =3D FIELD_GET(GENMASK_ULL(31, 0), magic); ret =3D regmap_update_bits(pon->regmap, pon->baseaddr + PON_SOFT_RB_SPARE, GENMASK(7, pon->reason_shift), - magic << pon->reason_shift); + magic_arg1 << pon->reason_shift); if (ret < 0) dev_err(pon->dev, "update reboot mode bits failed\n"); =20 diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot= -mode.c index 3af6bc16a76daee686e8110b74e71b0e62b13ef8..1e85f2c052c916e153c7c9ac0b1= 84c91d7153402 100644 --- a/drivers/power/reset/reboot-mode.c +++ b/drivers/power/reset/reboot-mode.c @@ -18,12 +18,11 @@ =20 struct mode_info { const char *mode; - u32 magic; + u64 magic; struct list_head list; }; =20 -static unsigned int get_reboot_mode_magic(struct reboot_mode_driver *reboo= t, - const char *cmd) +static u64 get_reboot_mode_magic(struct reboot_mode_driver *reboot, const = char *cmd) { const char *normal =3D "normal"; struct mode_info *info; @@ -55,7 +54,7 @@ static int reboot_mode_notify(struct notifier_block *this, unsigned long mode, void *cmd) { struct reboot_mode_driver *reboot; - unsigned int magic; + u64 magic; =20 reboot =3D container_of(this, struct reboot_mode_driver, reboot_notifier); magic =3D get_reboot_mode_magic(reboot, cmd); @@ -78,7 +77,8 @@ int reboot_mode_register(struct reboot_mode_driver *reboo= t) struct property *prop; struct device_node *np =3D reboot->dev->of_node; size_t len =3D strlen(PREFIX); - u32 magic; + u32 magic_arg1; + u32 magic_arg2; int ret; =20 INIT_LIST_HEAD(&reboot->head); @@ -87,10 +87,13 @@ int reboot_mode_register(struct reboot_mode_driver *reb= oot) if (strncmp(prop->name, PREFIX, len)) continue; =20 - if (of_property_read_u32(np, prop->name, &magic)) { + if (of_property_read_u32(np, prop->name, &magic_arg1)) { pr_err("reboot mode %s without magic number\n", prop->name); continue; } + /* Default magic_arg2 to zero */ + if (of_property_read_u32_index(np, prop->name, 1, &magic_arg2)) + magic_arg2 =3D 0; =20 info =3D kzalloc(sizeof(*info), GFP_KERNEL); if (!info) { @@ -98,6 +101,15 @@ int reboot_mode_register(struct reboot_mode_driver *reb= oot) goto error; } =20 + /** + * Format of u64 magic + *------------------------------------------- + *| Higher 32 bit | Lower 32 bit | + *| arg2 | arg1 | + *------------------------------------------- + */ + info->magic =3D FIELD_PREP(GENMASK_ULL(63, 32), magic_arg2) | + FIELD_PREP(GENMASK_ULL(31, 0), magic_arg1); info->mode =3D kstrdup_const(prop->name + len, GFP_KERNEL); if (!info->mode) { ret =3D -ENOMEM; diff --git a/drivers/power/reset/syscon-reboot-mode.c b/drivers/power/reset= /syscon-reboot-mode.c index e0772c9f70f7a19cd8ec8a0b7fdbbaa7ba44afd0..eb7fc5b7d6a7ed8a833d4920991= c4c40b5b13ca7 100644 --- a/drivers/power/reset/syscon-reboot-mode.c +++ b/drivers/power/reset/syscon-reboot-mode.c @@ -20,16 +20,18 @@ struct syscon_reboot_mode { u32 mask; }; =20 -static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, - unsigned int magic) +static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, u64= magic) { struct syscon_reboot_mode *syscon_rbm; + u32 magic_arg1; int ret; =20 + /* Use low 32 bits of magic for argument_1 */ + magic_arg1 =3D FIELD_GET(GENMASK_ULL(31, 0), magic); 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This limits such drivers, to define any predefined reboot-modes statically within the driver and creates a dependency on device-tree. Introduce a list for predefined modes in the reboot-mode framework and process the predefined reboot-modes along with the device-tree defined reboot-modes. Modify existing reboot-mode based drivers to initialize the predefined list-head as empty. This patch enables a reboot mode driver to define reboot-modes through a predefined static list, in addition to the device-tree based reboot-modes. Signed-off-by: Shivendra Pratap --- drivers/power/reset/nvmem-reboot-mode.c | 1 + drivers/power/reset/qcom-pon.c | 1 + drivers/power/reset/reboot-mode.c | 28 ++++++++++++++++++++++------ drivers/power/reset/syscon-reboot-mode.c | 1 + include/linux/reboot-mode.h | 9 +++++++++ 5 files changed, 34 insertions(+), 6 deletions(-) diff --git a/drivers/power/reset/nvmem-reboot-mode.c b/drivers/power/reset/= nvmem-reboot-mode.c index b3d21d39b0f732254c40103db1b51fb7045ce344..b02a2af31aac52cb0ab19cf5d4d= 315d17c208f6e 100644 --- a/drivers/power/reset/nvmem-reboot-mode.c +++ b/drivers/power/reset/nvmem-reboot-mode.c @@ -44,6 +44,7 @@ static int nvmem_reboot_mode_probe(struct platform_device= *pdev) =20 nvmem_rbm->reboot.dev =3D &pdev->dev; nvmem_rbm->reboot.write =3D nvmem_reboot_mode_write; + INIT_LIST_HEAD(&nvmem_rbm->reboot.predefined_modes); =20 nvmem_rbm->cell =3D devm_nvmem_cell_get(&pdev->dev, "reboot-mode"); if (IS_ERR(nvmem_rbm->cell)) { diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c index ccce1673b2ec47d02524edd44811d4f528c243e8..bf7b9f0bcdcc4c168aa7ff8d649= 4122d898814b5 100644 --- a/drivers/power/reset/qcom-pon.c +++ b/drivers/power/reset/qcom-pon.c @@ -75,6 +75,7 @@ static int qcom_pon_probe(struct platform_device *pdev) pon->reboot_mode.dev =3D &pdev->dev; pon->reason_shift =3D reason_shift; pon->reboot_mode.write =3D qcom_pon_reboot_mode_write; + INIT_LIST_HEAD(&pon->reboot_mode.predefined_modes); error =3D devm_reboot_mode_register(&pdev->dev, &pon->reboot_mode); if (error) { dev_err(&pdev->dev, "can't register reboot mode\n"); diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot= -mode.c index 1e85f2c052c916e153c7c9ac0b184c91d7153402..877c2459a3b2e47679ee2e9fbb9= b0329dc3b1e0f 100644 --- a/drivers/power/reset/reboot-mode.c +++ b/drivers/power/reset/reboot-mode.c @@ -16,12 +16,6 @@ =20 #define PREFIX "mode-" =20 -struct mode_info { - const char *mode; - u64 magic; - struct list_head list; -}; - static u64 get_reboot_mode_magic(struct reboot_mode_driver *reboot, const = char *cmd) { const char *normal =3D "normal"; @@ -72,6 +66,7 @@ static int reboot_mode_notify(struct notifier_block *this, */ int reboot_mode_register(struct reboot_mode_driver *reboot) { + struct mode_info *info_predef; struct mode_info *info; struct mode_info *next; struct property *prop; @@ -83,6 +78,9 @@ int reboot_mode_register(struct reboot_mode_driver *reboo= t) =20 INIT_LIST_HEAD(&reboot->head); =20 + if (!np) + goto predefined_modes; + for_each_property_of_node(np, prop) { if (strncmp(prop->name, PREFIX, len)) continue; @@ -124,6 +122,24 @@ int reboot_mode_register(struct reboot_mode_driver *re= boot) list_add_tail(&info->list, &reboot->head); } =20 +predefined_modes: + list_for_each_entry(info_predef, &reboot->predefined_modes, list) { + info =3D kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) { + ret =3D -ENOMEM; + goto error; + } + + info->mode =3D kstrdup_const(info_predef->mode, GFP_KERNEL); + if (!info->mode) { + ret =3D -ENOMEM; + goto error; + } + + info->magic =3D info_predef->magic; + list_add_tail(&info->list, &reboot->head); + } + reboot->reboot_notifier.notifier_call =3D reboot_mode_notify; register_reboot_notifier(&reboot->reboot_notifier); =20 diff --git a/drivers/power/reset/syscon-reboot-mode.c b/drivers/power/reset= /syscon-reboot-mode.c index eb7fc5b7d6a7ed8a833d4920991c4c40b5b13ca7..74e2e14c5d87c54ac24ef63c790= 5b3266d736439 100644 --- a/drivers/power/reset/syscon-reboot-mode.c +++ b/drivers/power/reset/syscon-reboot-mode.c @@ -50,6 +50,7 @@ static int syscon_reboot_mode_probe(struct platform_devic= e *pdev) syscon_rbm->reboot.dev =3D &pdev->dev; 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Sun, 28 Dec 2025 09:21:04 -0800 (PST) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2f3d776ebsm255743965ad.99.2025.12.28.09.20.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Dec 2025 09:21:04 -0800 (PST) From: Shivendra Pratap Date: Sun, 28 Dec 2025 22:50:22 +0530 Subject: [PATCH v19 04/10] firmware: psci: Introduce command-based reset in psci_sys_reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251228-arm-psci-system_reset2-vendor-reboots-v19-4-ebb956053098@oss.qualcomm.com> References: <20251228-arm-psci-system_reset2-vendor-reboots-v19-0-ebb956053098@oss.qualcomm.com> In-Reply-To: <20251228-arm-psci-system_reset2-vendor-reboots-v19-0-ebb956053098@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Andy Yan , John Stultz , Matthias Brugger , Moritz Fischer , Mark Rutland , Conor Dooley , Konrad Dybcio , Bartosz Golaszewski Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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The PSCI specification now includes SYSTEM_RESET2 for vendor-specific resets, but there's no mechanism to issue these through psci_sys_reset. Add a command-based reset mechanism that allows external drivers to set the psci reset command via a new psci_set_reset_cmd() function. The psci command-based reset is disabled by default and the psci_sys_reset follows its original flow until a psci_reset command is set or a kernel panic is in progress. Signed-off-by: Shivendra Pratap --- drivers/firmware/psci/psci.c | 46 ++++++++++++++++++++++++++++++++++++++++= ++-- include/linux/psci.h | 2 ++ 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..ad7a3267276f9e26740aea99c11= f171ac715f9ba 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -51,6 +51,15 @@ static int resident_cpu =3D -1; struct psci_operations psci_ops; static enum arm_smccc_conduit psci_conduit =3D SMCCC_CONDUIT_NONE; =20 +struct psci_sys_reset_params { + u32 system_reset; + u32 reset_type; + u32 cookie; + bool cmd; +}; + +static struct psci_sys_reset_params psci_reset; + bool psci_tos_resident_on(int cpu) { return cpu =3D=3D resident_cpu; @@ -80,6 +89,29 @@ static u32 psci_cpu_suspend_feature; static bool psci_system_reset2_supported; static bool psci_system_off2_hibernate_supported; =20 +/** + * psci_set_reset_cmd - Sets the psci_reset_cmd for command-based + * reset which will be used in psci_sys_reset call. + * + * @cmd_sys_rst2: Set to true for SYSTEM_RESET2 based resets. + * @cmd_reset_type: Set the reset_type argument for psci_sys_reset. + * @cmd_cookie: Set the cookie argument for psci_sys_reset. + */ +void psci_set_reset_cmd(bool cmd_sys_rst2, u32 cmd_reset_type, u32 cmd_coo= kie) +{ + if (cmd_sys_rst2 && psci_system_reset2_supported) { + psci_reset.system_reset =3D PSCI_FN_NATIVE(1_1, SYSTEM_RESET2); + psci_reset.reset_type =3D cmd_reset_type; + psci_reset.cookie =3D cmd_cookie; + } else { + psci_reset.system_reset =3D PSCI_0_2_FN_SYSTEM_RESET; + psci_reset.reset_type =3D 0; + psci_reset.cookie =3D 0; + } + psci_reset.cmd =3D true; +} +EXPORT_SYMBOL_GPL(psci_set_reset_cmd); + static inline bool psci_has_ext_power_state(void) { return psci_cpu_suspend_feature & @@ -309,14 +341,24 @@ static int get_set_conduit_method(const struct device= _node *np) static int psci_sys_reset(struct notifier_block *nb, unsigned long action, void *data) { - if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && - psci_system_reset2_supported) { + if (((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && + psci_system_reset2_supported) && (panic_in_progress() || !psci_reset= .cmd)) { /* * reset_type[31] =3D 0 (architectural) * reset_type[30:0] =3D 0 (SYSTEM_WARM_RESET) * cookie =3D 0 (ignored by the implementation) */ invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0); 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Values here correspond to valid parameters to vendor-specific reset types in PSCI SYSTEM_RESET2 call. Reviewed-by: Rob Herring (Arm) Signed-off-by: Shivendra Pratap --- Documentation/devicetree/bindings/arm/psci.yaml | 42 +++++++++++++++++++++= ++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentatio= n/devicetree/bindings/arm/psci.yaml index 6e2e0c551841111fbb0aa8c0951dca411b94035c..5fdcbf331ea5620363638feb6f8= 105427a87c00f 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -98,6 +98,26 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/cpu/idle-states.yaml =20 + reboot-mode: + type: object + $ref: /schemas/power/reset/reboot-mode.yaml# + unevaluatedProperties: false + properties: + # "mode-normal" is just SYSTEM_RESET + mode-normal: false + patternProperties: + "^mode-.*$": + minItems: 1 + maxItems: 2 + description: | + Describes a vendor-specific reset type. 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Currently there is no common driver that handles all supported psci resets at one place. Additionally, there is no common mechanism to issue the supported psci resets from userspace. Add a PSCI reboot mode driver and define two types of PSCI resets in the driver as reboot-modes: predefined resets controlled by Linux reboot_mode and customizable resets defined by SoC vendors in their device tree under the psci:reboot-mode node. Register the driver with the reboot-mode framework to interface these resets to userspace. When userspace initiates a supported command, pass the reset arguments to the PSCI driver to enable command-based reset. This change allows userspace to issue supported PSCI reset commands using the standard reboot system calls while enabling SoC vendors to define their specific resets for PSCI. Signed-off-by: Shivendra Pratap --- drivers/power/reset/Kconfig | 10 +++ drivers/power/reset/Makefile | 1 + drivers/power/reset/psci-reboot-mode.c | 111 +++++++++++++++++++++++++++++= ++++ 3 files changed, 122 insertions(+) diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index f6c1bcbb57deff3568d6b1b326454add3b3bbf06..529d6c7d3555601f7b7e6199acd= 29838030fcef2 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -348,6 +348,16 @@ config NVMEM_REBOOT_MODE then the bootloader can read it and take different action according to the mode. =20 +config PSCI_REBOOT_MODE + bool "PSCI reboot mode driver" + depends on OF && ARM_PSCI_FW + select REBOOT_MODE + help + Say y here will enable PSCI reboot mode driver. This gets + the PSCI reboot mode arguments and passes them to psci + driver. psci driver uses these arguments for issuing + device reset into different boot states. + config POWER_MLXBF tristate "Mellanox BlueField power handling driver" depends on (GPIO_MLXBF2 || GPIO_MLXBF3) && ACPI diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index 0e4ae6f6b5c55729cf60846d47e6fe0fec24f3cc..49774b42cdf61fd57a5b70f286c= 65c9d66bbc0cb 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -40,4 +40,5 @@ obj-$(CONFIG_REBOOT_MODE) +=3D reboot-mode.o obj-$(CONFIG_SYSCON_REBOOT_MODE) +=3D syscon-reboot-mode.o obj-$(CONFIG_POWER_RESET_SC27XX) +=3D sc27xx-poweroff.o obj-$(CONFIG_NVMEM_REBOOT_MODE) +=3D nvmem-reboot-mode.o +obj-$(CONFIG_PSCI_REBOOT_MODE) +=3D psci-reboot-mode.o obj-$(CONFIG_POWER_MLXBF) +=3D pwr-mlxbf.o diff --git a/drivers/power/reset/psci-reboot-mode.c b/drivers/power/reset/p= sci-reboot-mode.c new file mode 100644 index 0000000000000000000000000000000000000000..499cf504071e88022fa5b5b32e2= 6b7a674da8691 --- /dev/null +++ b/drivers/power/reset/psci-reboot-mode.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Predefined reboot-modes: + * reset_type(arg1) is zero; cookie(arg2) is stored in magic. + * psci_reboot_mode_set_predefined_modes to move values to higher 32 bit o= f magic. + */ +static struct mode_info psci_resets[] =3D { + { .mode =3D "warm", .magic =3D REBOOT_WARM}, + { .mode =3D "soft", .magic =3D REBOOT_SOFT}, + { .mode =3D "cold", .magic =3D REBOOT_COLD}, +}; + +static void psci_reboot_mode_set_predefined_modes(struct reboot_mode_drive= r *reboot) +{ + INIT_LIST_HEAD(&reboot->predefined_modes); + for (u32 i =3D 0; i < ARRAY_SIZE(psci_resets); i++) { + /* Move values to higher 32 bit of magic */ + psci_resets[i].magic =3D FIELD_PREP(GENMASK_ULL(63, 32), psci_resets[i].= magic); + INIT_LIST_HEAD(&psci_resets[i].list); + list_add_tail(&psci_resets[i].list, &reboot->predefined_modes); + } +} + +/* + * magic is 64 bit. + * arg1 - reset_type(Low 32 bit of magic). + * arg2 - cookie(High 32 bit of magic). + * arg2(cookie) decides the mode, If arg1(reset_type) is 0; + */ +static int psci_reboot_mode_write(struct reboot_mode_driver *reboot, u64 m= agic) +{ + u32 reset_type =3D FIELD_GET(GENMASK_ULL(31, 0), magic); + u32 cookie =3D FIELD_GET(GENMASK_ULL(63, 32), magic); + + if (reset_type =3D=3D 0) { + if (cookie =3D=3D REBOOT_WARM || cookie =3D=3D REBOOT_SOFT) + psci_set_reset_cmd(true, 0, 0); + else + psci_set_reset_cmd(false, 0, 0); + } else { + psci_set_reset_cmd(true, reset_type, cookie); + } + + return NOTIFY_DONE; +} + +static int psci_reboot_mode_probe(struct faux_device *fdev) +{ + struct reboot_mode_driver *reboot; + struct device_node *psci_np; + struct device_node *np; + int ret; + + psci_np =3D of_find_compatible_node(NULL, NULL, "arm,psci-1.0"); + if (!psci_np) + return -ENODEV; + + /* + * Find the psci:reboot-mode node. + * If NULL, continue to register predefined modes. + * np refcount to be handled by dev; + * psci_np refcount is decremented by of_find_node_by_name; + */ + np =3D of_find_node_by_name(psci_np, "reboot-mode"); + fdev->dev.of_node =3D np; + + reboot =3D devm_kzalloc(&fdev->dev, sizeof(*reboot), GFP_KERNEL); + if (!reboot) + return -ENOMEM; + + psci_reboot_mode_set_predefined_modes(reboot); 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The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent and not available across all sc7280 based boards. Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +++++++ arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 +++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index c2ccbb67f800cb9927627f991e3d97174cc73c64..e319a1894901cc9c56a89cb8b8a= d0acb7a18dc99 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -858,7 +858,7 @@ pmu-a78 { interrupts =3D ; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts= /qcom/qcm6490-idp.dts index 089a027c57d5caed103f41f20c01fe1294b4c950..5816cc1c033c396f49fddbbcd4b= 09e5a633bc804 100644 --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts @@ -695,6 +695,13 @@ &pon_resin { status =3D "okay"; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; 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The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/lemans.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 0b154d57ba24e69a9d900f06bbb22baa2781cc3f..cc70316d6949c8a36280b85931c= 4adec9cd60f62 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -698,6 +698,11 @@ system_pd: power-domain-system { #power-domain-cells =3D <0>; domain-idle-states =3D <&cluster_sleep_apss_rsc_pc>; }; + + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; }; =20 reserved-memory { --=20 2.34.1 From nobody Mon Feb 9 16:26:24 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A82B239562 for ; Sun, 28 Dec 2025 17:21:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/monaco.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 816fa2af8a9a663b8ad176f93d2f18284a08c3d1..9c8087f870fc8889edffda63c62= f4d5167729cbc 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -732,6 +732,11 @@ system_pd: power-domain-system { #power-domain-cells =3D <0>; domain-idle-states =3D <&system_sleep>; }; + + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; }; =20 reserved-memory { --=20 2.34.1 From nobody Mon Feb 9 16:26:24 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3FB42D3EE5 for ; Sun, 28 Dec 2025 17:21:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Signed-off-by: Song Xue Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/talos.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index 95d26e3136229f9015d49e2be22f6b28f1e842f4..11a2cfa209065776a8ae61c6e66= 1c09bb871c400 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -613,6 +613,11 @@ cluster_pd: power-domain-cluster { &cluster_sleep_1 &cluster_sleep_2>; }; + + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; }; =20 reserved-memory { --=20 2.34.1