From nobody Sun Feb 8 15:53:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67DC6A41; Sat, 27 Dec 2025 00:04:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; cv=none; b=i6M7J7EgtewF/QbsVqpL2rzULVufbYbI2ms9ANP2ZFT2SwY4OSJycbv3FSQNwH+/VpIIvgGA3OFdBPfFBI6EZ6IczWB0jZUwNLBTju2aAzx7l/cON8MF8zX/eG9v62Lv60QYpNVom65P+V+q/p7NR7YnsAEpig6f1CSG/X69QX0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; c=relaxed/simple; bh=E4vpV8dA24wd0RN1Q8K2x3/E2u3fzxRNDtwrsUcSQZ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=a9RSf/GiXCq2Ym8EcFfWDFw1ZDbWp5TS6DifkmZAoy1iUTl+45Y1Ae/AWYO0wf4DIy3g7PBoBgAWsSNafawZYBcCAbp/WNueewVo7l2pHh9/nA2CyHJmGqX1m7673hvcsdf0sgm+jysIgkU+lCw84aHm/LsF+aZFfujbF8cAv2U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sJskyn/p; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sJskyn/p" Received: by smtp.kernel.org (Postfix) with ESMTPS id E4621C16AAE; Sat, 27 Dec 2025 00:04:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766793899; bh=E4vpV8dA24wd0RN1Q8K2x3/E2u3fzxRNDtwrsUcSQZ8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=sJskyn/pbXkPbDeuRR0IV8SemUpXikGEgwtvU47/CK3blT4HMOmHkm7ImGWQwmB7/ n/yqJvKxQKw7shHJ+tSlvBG9/VCNrCiG9azJYVT3fy0d6cDmdI+5r/6/cyNBtWb7la nQQ012ycZT1JAb+M8hCjHdgD7siY4puJWlgYQcn2Wro/eVlDYS2GGz79A+cC00DxcN lUIw1u7ZL+9jJiN1Ra2jNytQg7ICYK+4Zjie9Bx5Aj8ySyxWlo9P8cOjm05e4BOItb sBr1P64Jnh2O8ajzMompMDoEAKK3t6l3uK9/AXLXHD/3N1e+L9EhPAY6oBktIamMki HgHh9m8naGocw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAAC4E8FDB8; Sat, 27 Dec 2025 00:04:58 +0000 (UTC) From: Amit Sunil Dhamne via B4 Relay Date: Sat, 27 Dec 2025 00:04:21 +0000 Subject: [PATCH v3 1/5] dt-bindings: mfd: maxim,max77759: reference power-supply schema and add regulator property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251227-max77759-charger-v3-1-54e664f5ca92@google.com> References: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> In-Reply-To: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Draszik?= , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso , Amit Sunil Dhamne X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766793897; l=1768; i=amitsd@google.com; s=20241031; h=from:subject:message-id; bh=CE42oYoNrplygMzTNiDxOQcFZJE+nR+C9cWKUNNQJSk=; b=3nHfaOeMdXmyDbES/EYFEJxDUlJj2ia5MIfjr0bLC+pSPc0EWK092aBUiqFECkLsrCkAWIY1w emdyn7UTQPWBl3en0Mw+atF/37pzsBdficyx2WgQ+g+EZDaw/GBylYV X-Developer-Key: i=amitsd@google.com; a=ed25519; pk=wD+XZSST4dmnNZf62/lqJpLm7fiyT8iv462zmQ3H6bI= X-Endpoint-Received: by B4 Relay for amitsd@google.com/20241031 with auth_id=262 X-Original-From: Amit Sunil Dhamne Reply-To: amitsd@google.com From: Amit Sunil Dhamne Extend the max77759 binding to reference power-supply schema, so that PMIC node can reference its supplier. Also, add regulator property to control CHGIN (OTG) voltage. Signed-off-by: Amit Sunil Dhamne Reviewed-by: Andr=C3=A9 Draszik Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mfd/maxim,max77759.yaml | 16 ++++++++++++= +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml b/Do= cumentation/devicetree/bindings/mfd/maxim,max77759.yaml index 525de9ab3c2b..42e4a84d5204 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml @@ -16,6 +16,9 @@ description: | The MAX77759 includes Battery Charger, Fuel Gauge, temperature sensors, = USB Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. =20 +allOf: + - $ref: /schemas/power/supply/power-supply.yaml# + properties: compatible: const: maxim,max77759 @@ -37,12 +40,18 @@ properties: nvmem-0: $ref: /schemas/nvmem/maxim,max77759-nvmem.yaml =20 + chgin-otg-regulator: + type: object + description: Provides Boost for sourcing VBUS. + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + required: - compatible - interrupts - reg =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | @@ -59,6 +68,11 @@ examples: =20 interrupt-controller; #interrupt-cells =3D <2>; + power-supplies =3D <&maxtcpci>; + + chgin-otg-regulator { + regulator-name =3D "chgin-otg"; + }; =20 gpio { compatible =3D "maxim,max77759-gpio"; --=20 2.52.0.351.gbe84eed79e-goog From nobody Sun Feb 8 15:53:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 694F93A1E61; Sat, 27 Dec 2025 00:04:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; cv=none; b=RcwI6PPq7aqZJIS/XtsmpdYKC3gNA0b88/RcGx0a2RBzJj/lQA3GqqgStyxhtdWtY1pZf/OHmvWgA7zJiSYpnCU3+FSWZ+pHbN6T0TCXcdN1kq8x1ax7FpHqiPPbHndg7LNzrw/G2sJxqLfoFY+tijecBGSPgT9uvm2mXFnRhAo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; c=relaxed/simple; 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Sat, 27 Dec 2025 00:04:58 +0000 (UTC) From: Amit Sunil Dhamne via B4 Relay Date: Sat, 27 Dec 2025 00:04:22 +0000 Subject: [PATCH v3 2/5] dt-bindings: usb: maxim,max33359: Add supply property for vbus Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251227-max77759-charger-v3-2-54e664f5ca92@google.com> References: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> In-Reply-To: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Draszik?= , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso , Amit Sunil Dhamne , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766793897; l=1272; i=amitsd@google.com; s=20241031; h=from:subject:message-id; bh=se1BBXMzMiGyHHxl8V9uYfi3fuGUD7ZAOyoCsNRuyYw=; b=j4AA0FrIGm1HEYo0CXoXtdTb+vvKwbAD9xxssJeiOwX2BQ6A57QbUZ8vr3jlJi3ZIqzmcJ1l8 oA3oGt70JXjC2GzCIGeuSSqPgScZPh/qwtAEopAxDxslOJ2RXhmXvUA X-Developer-Key: i=amitsd@google.com; a=ed25519; pk=wD+XZSST4dmnNZf62/lqJpLm7fiyT8iv462zmQ3H6bI= X-Endpoint-Received: by B4 Relay for amitsd@google.com/20241031 with auth_id=262 X-Original-From: Amit Sunil Dhamne Reply-To: amitsd@google.com From: Amit Sunil Dhamne Add a regulator supply property for vbus. This notifies the regulator provider to source vbus when Type-C operates in Source power mode, while turn off sourcing vbus when operating in Sink mode or disconnected. Signed-off-by: Amit Sunil Dhamne Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/usb/maxim,max33359.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/maxim,max33359.yaml b/Do= cumentation/devicetree/bindings/usb/maxim,max33359.yaml index 3de4dc40b791..e652a24902ea 100644 --- a/Documentation/devicetree/bindings/usb/maxim,max33359.yaml +++ b/Documentation/devicetree/bindings/usb/maxim,max33359.yaml @@ -32,6 +32,9 @@ properties: description: Properties for usb c connector. =20 + vbus-supply: + description: Regulator to control sourcing Vbus. + required: - compatible - reg @@ -53,6 +56,7 @@ examples: reg =3D <0x25>; interrupt-parent =3D <&gpa8>; interrupts =3D <2 IRQ_TYPE_LEVEL_LOW>; + vbus-supply =3D <&chgin_otg_reg>; =20 connector { compatible =3D "usb-c-connector"; --=20 2.52.0.351.gbe84eed79e-goog From nobody Sun Feb 8 15:53:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FCFA20ED; Sat, 27 Dec 2025 00:04:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; cv=none; b=C8sS7Qx1vengrbrtAfrMN3ea822NkQJVYE74Bn0eEKH1ZqwzNCTuHUDHAwVnmUwhXJORn1+//92gkqu+SOZRijrzEe0orXxAO7N3hgOqnZhY8VR/u1SGcEaFul2yK9q93GmGkwwm1MZNJphgMKzHEmFyo0kZfwHRC+zkySowBqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766793899; c=relaxed/simple; bh=gwaRHT+MOnTtK51ERsrG/B6GXsJAYfHd3vOs/1XJBPU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QIGJgdYZrOfYnkKuCIO+yi4a5OFu54CTSGIOX/cE7Ww7SIE7LNACASA8qhYdc3Jm1EaxbQLDI+llA35pIOQaYYX8mm3/aiFkFhmvwMwuc3mq3yO3PtDlwrPZFxbLKlo38Vo20MHgr9v4OLTIti4Pz7B6My3JVbmVnv/LnLfo4lc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aJCOYjXy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aJCOYjXy" Received: by smtp.kernel.org (Postfix) with ESMTPS id 18F23C2BC87; Sat, 27 Dec 2025 00:04:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766793899; bh=gwaRHT+MOnTtK51ERsrG/B6GXsJAYfHd3vOs/1XJBPU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aJCOYjXyntqHbgr8x7WupHD1SqZc4/rgkNRg54TyZFdYzHJZDuHcUJqHxLXpdinPu vyWY+qVwezLzupPyCQh0ji64umR2ViB1/BHClQC/Bb0Snx/rKqqOfcK6QFelesZrto 9uCjmEtSWbg/x3dYSIXH9oYIcBabCDV9czl421yqtZn+HrU90i5T7EFglFaGJ/euIx 5QidynlinhOYFatakUuxo9jcaOL8+XyfczGySgTjAflqgYyYpBkpGEydFdKV8mGwxj /KJ1K9kWR/vJ0Yupkx4NaV064Yzmo8QuXpjakdi921c+NoFyWkSUIko/0pfaZcLvZK IrTI9l9WlxpHA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B4CBE8FDBF; Sat, 27 Dec 2025 00:04:59 +0000 (UTC) From: Amit Sunil Dhamne via B4 Relay Date: Sat, 27 Dec 2025 00:04:23 +0000 Subject: [PATCH v3 3/5] mfd: max77759: add register bitmasks and modify irq configs for charger Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251227-max77759-charger-v3-3-54e664f5ca92@google.com> References: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> In-Reply-To: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Draszik?= , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso , Amit Sunil Dhamne X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766793897; l=16454; i=amitsd@google.com; s=20241031; h=from:subject:message-id; bh=hjxW0no9WlP1uBudRvJWP5EXGw5a6hgyGox2HEjcBfY=; b=GvpeWUF0r0rPyNjkuClrGJOO1bzHzk4XCNidqog/oGC3rnpLbDsCJ1kqf/O0tEakB0BG41qjp 6dVhTv/ryoxBo3GzGyrmkUN8Q+cQDsA/z9OU5/SMdS3haDWvw9LncPe X-Developer-Key: i=amitsd@google.com; a=ed25519; pk=wD+XZSST4dmnNZf62/lqJpLm7fiyT8iv462zmQ3H6bI= X-Endpoint-Received: by B4 Relay for amitsd@google.com/20241031 with auth_id=262 X-Original-From: Amit Sunil Dhamne Reply-To: amitsd@google.com From: Amit Sunil Dhamne Add register bitmasks for charger function. In addition split the charger IRQs further such that each bit represents an IRQ downstream of charger regmap irq chip. In addition populate the ack_base to offload irq ack to the regmap irq chip framework. Signed-off-by: Amit Sunil Dhamne Reviewed-by: Andr=C3=A9 Draszik --- drivers/mfd/max77759.c | 91 +++++++++++++++++-- include/linux/mfd/max77759.h | 202 ++++++++++++++++++++++++++++++++++++---= ---- 2 files changed, 256 insertions(+), 37 deletions(-) diff --git a/drivers/mfd/max77759.c b/drivers/mfd/max77759.c index 6cf6306c4a3b..a5f7da003edd 100644 --- a/drivers/mfd/max77759.c +++ b/drivers/mfd/max77759.c @@ -201,8 +201,24 @@ static const struct regmap_config max77759_regmap_conf= ig_charger =3D { * - SYSUVLO_INT * - FSHIP_NOT_RD * - CHGR_INT: charger - * - CHG_INT - * - CHG_INT2 + * - INT1 + * - AICL + * - CHGIN + * - WCIN + * - CHG + * - BAT + * - INLIM + * - THM2 + * - BYP + * - INT2 + * - INSEL + * - SYS_UVLO1 + * - SYS_UVLO2 + * - BAT_OILO + * - CHG_STA_CC + * - CHG_STA_CV + * - CHG_STA_TO + * - CHG_STA_DONE */ enum { MAX77759_INT_MAXQ, @@ -228,8 +244,22 @@ enum { }; =20 enum { - MAX77759_CHARGER_INT_1, - MAX77759_CHARGER_INT_2, + MAX77759_CHGR_INT1_AICL, + MAX77759_CHGR_INT1_CHGIN, + MAX77759_CHGR_INT1_WCIN, + MAX77759_CHGR_INT1_CHG, + MAX77759_CHGR_INT1_BAT, + MAX77759_CHGR_INT1_INLIM, + MAX77759_CHGR_INT1_THM2, + MAX77759_CHGR_INT1_BYP, + MAX77759_CHGR_INT2_INSEL, + MAX77759_CHGR_INT2_SYS_UVLO1, + MAX77759_CHGR_INT2_SYS_UVLO2, + MAX77759_CHGR_INT2_BAT_OILO, + MAX77759_CHGR_INT2_CHG_STA_CC, + MAX77759_CHGR_INT2_CHG_STA_CV, + MAX77759_CHGR_INT2_CHG_STA_TO, + MAX77759_CHGR_INT2_CHG_STA_DONE, }; =20 static const struct regmap_irq max77759_pmic_irqs[] =3D { @@ -256,8 +286,38 @@ static const struct regmap_irq max77759_topsys_irqs[] = =3D { }; =20 static const struct regmap_irq max77759_chgr_irqs[] =3D { - REGMAP_IRQ_REG(MAX77759_CHARGER_INT_1, 0, GENMASK(7, 0)), - REGMAP_IRQ_REG(MAX77759_CHARGER_INT_2, 1, GENMASK(7, 0)), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_AICL, 0, + MAX77759_CHGR_REG_CHG_INT_AICL), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_CHGIN, 0, + MAX77759_CHGR_REG_CHG_INT_CHGIN), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_WCIN, 0, + MAX77759_CHGR_REG_CHG_INT_WCIN), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_CHG, 0, + MAX77759_CHGR_REG_CHG_INT_CHG), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_BAT, 0, + MAX77759_CHGR_REG_CHG_INT_BAT), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_INLIM, 0, + MAX77759_CHGR_REG_CHG_INT_INLIM), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_THM2, 0, + MAX77759_CHGR_REG_CHG_INT_THM2), + REGMAP_IRQ_REG(MAX77759_CHGR_INT1_BYP, 0, + MAX77759_CHGR_REG_CHG_INT_BYP), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_INSEL, 1, + MAX77759_CHGR_REG_CHG_INT2_INSEL), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_SYS_UVLO1, 1, + MAX77759_CHGR_REG_CHG_INT2_SYS_UVLO1), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_SYS_UVLO2, 1, + MAX77759_CHGR_REG_CHG_INT2_SYS_UVLO2), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_BAT_OILO, 1, + MAX77759_CHGR_REG_CHG_INT2_BAT_OILO), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_CHG_STA_CC, 1, + MAX77759_CHGR_REG_CHG_INT2_CHG_STA_CC), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_CHG_STA_CV, 1, + MAX77759_CHGR_REG_CHG_INT2_CHG_STA_CV), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_CHG_STA_TO, 1, + MAX77759_CHGR_REG_CHG_INT2_CHG_STA_TO), + REGMAP_IRQ_REG(MAX77759_CHGR_INT2_CHG_STA_DONE, 1, + MAX77759_CHGR_REG_CHG_INT2_CHG_STA_DONE), }; =20 static const struct regmap_irq_chip max77759_pmic_irq_chip =3D { @@ -302,6 +362,7 @@ static const struct regmap_irq_chip max77759_chrg_irq_c= hip =3D { .domain_suffix =3D "CHGR", .status_base =3D MAX77759_CHGR_REG_CHG_INT, .mask_base =3D MAX77759_CHGR_REG_CHG_INT_MASK, + .ack_base =3D MAX77759_CHGR_REG_CHG_INT, .num_regs =3D 2, .irqs =3D max77759_chgr_irqs, .num_irqs =3D ARRAY_SIZE(max77759_chgr_irqs), @@ -325,8 +386,22 @@ static const struct resource max77759_gpio_resources[]= =3D { }; =20 static const struct resource max77759_charger_resources[] =3D { - DEFINE_RES_IRQ_NAMED(MAX77759_CHARGER_INT_1, "INT1"), - DEFINE_RES_IRQ_NAMED(MAX77759_CHARGER_INT_2, "INT2"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_AICL, "AICL"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_CHGIN, "CHGIN"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_WCIN, "WCIN"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_CHG, "CHG"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_BAT, "BAT"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_INLIM, "INLIM"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_THM2, "THM2"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT1_BYP, "BYP"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_INSEL, "INSEL"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_SYS_UVLO1, "SYS_UVLO1"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_SYS_UVLO2, "SYS_UVLO2"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_BAT_OILO, "BAT_OILO"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_CHG_STA_CC, "CHG_STA_CC"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_CHG_STA_CV, "CHG_STA_CV"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_CHG_STA_TO, "CHG_STA_TO"), + DEFINE_RES_IRQ_NAMED(MAX77759_CHGR_INT2_CHG_STA_DONE, "CHG_STA_DONE"), }; =20 static const struct mfd_cell max77759_cells[] =3D { diff --git a/include/linux/mfd/max77759.h b/include/linux/mfd/max77759.h index c6face34e385..e674a519e782 100644 --- a/include/linux/mfd/max77759.h +++ b/include/linux/mfd/max77759.h @@ -59,35 +59,65 @@ #define MAX77759_MAXQ_REG_AP_DATAIN0 0xb1 #define MAX77759_MAXQ_REG_UIC_SWRST 0xe0 =20 -#define MAX77759_CHGR_REG_CHG_INT 0xb0 -#define MAX77759_CHGR_REG_CHG_INT2 0xb1 -#define MAX77759_CHGR_REG_CHG_INT_MASK 0xb2 -#define MAX77759_CHGR_REG_CHG_INT2_MASK 0xb3 -#define MAX77759_CHGR_REG_CHG_INT_OK 0xb4 -#define MAX77759_CHGR_REG_CHG_DETAILS_00 0xb5 -#define MAX77759_CHGR_REG_CHG_DETAILS_01 0xb6 -#define MAX77759_CHGR_REG_CHG_DETAILS_02 0xb7 -#define MAX77759_CHGR_REG_CHG_DETAILS_03 0xb8 -#define MAX77759_CHGR_REG_CHG_CNFG_00 0xb9 -#define MAX77759_CHGR_REG_CHG_CNFG_01 0xba -#define MAX77759_CHGR_REG_CHG_CNFG_02 0xbb -#define MAX77759_CHGR_REG_CHG_CNFG_03 0xbc -#define MAX77759_CHGR_REG_CHG_CNFG_04 0xbd -#define MAX77759_CHGR_REG_CHG_CNFG_05 0xbe -#define MAX77759_CHGR_REG_CHG_CNFG_06 0xbf -#define MAX77759_CHGR_REG_CHG_CNFG_07 0xc0 -#define MAX77759_CHGR_REG_CHG_CNFG_08 0xc1 -#define MAX77759_CHGR_REG_CHG_CNFG_09 0xc2 -#define MAX77759_CHGR_REG_CHG_CNFG_10 0xc3 -#define MAX77759_CHGR_REG_CHG_CNFG_11 0xc4 -#define MAX77759_CHGR_REG_CHG_CNFG_12 0xc5 -#define MAX77759_CHGR_REG_CHG_CNFG_13 0xc6 -#define MAX77759_CHGR_REG_CHG_CNFG_14 0xc7 -#define MAX77759_CHGR_REG_CHG_CNFG_15 0xc8 -#define MAX77759_CHGR_REG_CHG_CNFG_16 0xc9 -#define MAX77759_CHGR_REG_CHG_CNFG_17 0xca -#define MAX77759_CHGR_REG_CHG_CNFG_18 0xcb -#define MAX77759_CHGR_REG_CHG_CNFG_19 0xcc +#define MAX77759_CHGR_REG_CHG_INT 0xb0 +#define MAX77759_CHGR_REG_CHG_INT_AICL BIT(7) +#define MAX77759_CHGR_REG_CHG_INT_CHGIN BIT(6) +#define MAX77759_CHGR_REG_CHG_INT_WCIN BIT(5) +#define MAX77759_CHGR_REG_CHG_INT_CHG BIT(4) +#define MAX77759_CHGR_REG_CHG_INT_BAT BIT(3) +#define MAX77759_CHGR_REG_CHG_INT_INLIM BIT(2) +#define MAX77759_CHGR_REG_CHG_INT_THM2 BIT(1) +#define MAX77759_CHGR_REG_CHG_INT_BYP BIT(0) +#define MAX77759_CHGR_REG_CHG_INT2 0xb1 +#define MAX77759_CHGR_REG_CHG_INT2_INSEL BIT(7) +#define MAX77759_CHGR_REG_CHG_INT2_SYS_UVLO1 BIT(6) +#define MAX77759_CHGR_REG_CHG_INT2_SYS_UVLO2 BIT(5) +#define MAX77759_CHGR_REG_CHG_INT2_BAT_OILO BIT(4) +#define MAX77759_CHGR_REG_CHG_INT2_CHG_STA_CC BIT(3) +#define MAX77759_CHGR_REG_CHG_INT2_CHG_STA_CV BIT(2) +#define MAX77759_CHGR_REG_CHG_INT2_CHG_STA_TO BIT(1) +#define MAX77759_CHGR_REG_CHG_INT2_CHG_STA_DONE BIT(0) +#define MAX77759_CHGR_REG_CHG_INT_MASK 0xb2 +#define MAX77759_CHGR_REG_CHG_INT2_MASK 0xb3 +#define MAX77759_CHGR_REG_CHG_INT_OK 0xb4 +#define MAX77759_CHGR_REG_CHG_DETAILS_00 0xb5 +#define MAX77759_CHGR_REG_CHG_DETAILS_OO_CHGIN_DTLS GENMASK(6, 5) +#define MAX77759_CHGR_REG_CHG_DETAILS_01 0xb6 +#define MAX77759_CHGR_REG_CHG_DETAILS_01_BAT_DTLS GENMASK(6, 4) +#define MAX77759_CHGR_REG_CHG_DETAILS_01_CHG_DTLS GENMASK(3, 0) +#define MAX77759_CHGR_REG_CHG_DETAILS_02 0xb7 +#define MAX77759_CHGR_REG_CHG_DETAILS_02_CHGIN_STS BIT(5) +#define MAX77759_CHGR_REG_CHG_DETAILS_03 0xb8 +#define MAX77759_CHGR_REG_CHG_CNFG_00 0xb9 +#define MAX77759_CHGR_REG_CHG_CNFG_00_MODE GENMASK(3, 0) +#define MAX77759_CHGR_REG_CHG_CNFG_01 0xba +#define MAX77759_CHGR_REG_CHG_CNFG_02 0xbb +#define MAX77759_CHGR_REG_CHG_CNFG_02_CHGCC GENMASK(5, 0) +#define MAX77759_CHGR_REG_CHG_CNFG_03 0xbc +#define MAX77759_CHGR_REG_CHG_CNFG_04 0xbd +#define MAX77759_CHGR_REG_CHG_CNFG_04_CHG_CV_PRM GENMASK(5, 0) +#define MAX77759_CHGR_REG_CHG_CNFG_05 0xbe +#define MAX77759_CHGR_REG_CHG_CNFG_06 0xbf +#define MAX77759_CHGR_REG_CHG_CNFG_06_CHGPROT GENMASK(3, 2) +#define MAX77759_CHGR_REG_CHG_CNFG_07 0xc0 +#define MAX77759_CHGR_REG_CHG_CNFG_08 0xc1 +#define MAX77759_CHGR_REG_CHG_CNFG_09 0xc2 +#define MAX77759_CHGR_REG_CHG_CNFG_09_CHGIN_ILIM GENMASK(6, 0) +#define MAX77759_CHGR_REG_CHG_CNFG_10 0xc3 +#define MAX77759_CHGR_REG_CHG_CNFG_11 0xc4 +#define MAX77759_CHGR_REG_CHG_CNFG_12 0xc5 +/* Wireless Charging input channel select */ +#define MAX77759_CHGR_REG_CHG_CNFG_12_WCINSEL BIT(6) +/* CHGIN/USB input channel select */ +#define MAX77759_CHGR_REG_CHG_CNFG_12_CHGINSEL BIT(5) +#define MAX77759_CHGR_REG_CHG_CNFG_13 0xc6 +#define MAX77759_CHGR_REG_CHG_CNFG_14 0xc7 +#define MAX77759_CHGR_REG_CHG_CNFG_15 0xc8 +#define MAX77759_CHGR_REG_CHG_CNFG_16 0xc9 +#define MAX77759_CHGR_REG_CHG_CNFG_17 0xca +#define MAX77759_CHGR_REG_CHG_CNFG_18 0xcb +#define MAX77759_CHGR_REG_CHG_CNFG_18_WDTEN BIT(0) +#define MAX77759_CHGR_REG_CHG_CNFG_19 0xcc =20 /* MaxQ opcodes for max77759_maxq_command() */ #define MAX77759_MAXQ_OPCODE_MAXLENGTH (MAX77759_MAXQ_REG_AP_DATAOUT32 - \ @@ -101,6 +131,120 @@ #define MAX77759_MAXQ_OPCODE_USER_SPACE_READ 0x81 #define MAX77759_MAXQ_OPCODE_USER_SPACE_WRITE 0x82 =20 +/* + * Charger Input Status + * @MAX77759_CHGR_CHGIN_DTLS_VBUS_UNDERVOLTAGE: + * Charger input voltage (Vchgin) < Under Voltage Threshold (Vuvlo) + * @MAX77759_CHGR_CHGIN_DTLS_VBUS_MARGINAL_VOLTAGE: Vchgin > Vuvlo and + * Vchgin < (Battery Voltage (Vbatt) + system voltage (Vsys)) + * @MAX77759_CHGR_CHGIN_DTLS_VBUS_OVERVOLTAGE: + * Vchgin > Over Voltage threshold (Vovlo) + * @MAX77759_CHGR_CHGIN_DTLS_VBUS_VALID: + * Vchgin > Vuvlo, Vchgin < Vovlo and Vchgin > (Vsys + Vbatt) + */ +enum max77759_chgr_chgin_dtls_status { + MAX77759_CHGR_CHGIN_DTLS_VBUS_UNDERVOLTAGE, + MAX77759_CHGR_CHGIN_DTLS_VBUS_MARGINAL_VOLTAGE, + MAX77759_CHGR_CHGIN_DTLS_VBUS_OVERVOLTAGE, + MAX77759_CHGR_CHGIN_DTLS_VBUS_VALID, +}; + +/* + * Battery Details + * @MAX77759_CHGR_BAT_DTLS_NO_BATT_CHG_SUSP: + * No battery and the charger suspended + * @MAX77759_CHGR_BAT_DTLS_DEAD_BATTERY: Vbatt < Vtrickle + * @MAX77759_CHGR_BAT_DTLS_BAT_CHG_TIMER_FAULT: + * Charging suspended due to timer fault + * @MAX77759_CHGR_BAT_DTLS_BAT_OKAY: + * Battery okay and Vbatt > Min Sys Voltage (Vsysmin) + * @MAX77759_CHGR_BAT_DTLS_BAT_UNDERVOLTAGE: + * Battery is okay. Vtrickle < Vbatt < Vsysmin + * @MAX77759_CHGR_BAT_DTLS_BAT_OVERVOLTAGE: + * Battery voltage > Overvoltage threshold + * @MAX77759_CHGR_BAT_DTLS_BAT_OVERCURRENT: + * Battery current exceeds overcurrent threshold + * @MAX77759_CHGR_BAT_DTLS_BAT_ONLY_MODE: + * Battery only mode and battery level not available + */ +enum max77759_chgr_bat_dtls_states { + MAX77759_CHGR_BAT_DTLS_NO_BATT_CHG_SUSP, + MAX77759_CHGR_BAT_DTLS_DEAD_BATTERY, + MAX77759_CHGR_BAT_DTLS_BAT_CHG_TIMER_FAULT, + MAX77759_CHGR_BAT_DTLS_BAT_OKAY, + MAX77759_CHGR_BAT_DTLS_BAT_UNDERVOLTAGE, + MAX77759_CHGR_BAT_DTLS_BAT_OVERVOLTAGE, + MAX77759_CHGR_BAT_DTLS_BAT_OVERCURRENT, + MAX77759_CHGR_BAT_DTLS_BAT_ONLY_MODE, +}; + +/* + * Charger Details + * @MAX77759_CHGR_CHG_DTLS_PREQUAL: Charger in prequalification mode + * @MAX77759_CHGR_CHG_DTLS_CC: Charger in fast charge const curr mode + * @MAX77759_CHGR_CHG_DTLS_CV: Charger in fast charge const voltage m= ode + * @MAX77759_CHGR_CHG_DTLS_TO: Charger is in top off mode + * @MAX77759_CHGR_CHG_DTLS_DONE: Charger is done + * @MAX77759_CHGR_CHG_DTLS_RSVD_1: Reserved + * @MAX77759_CHGR_CHG_DTLS_TIMER_FAULT: Charger is in timer fault mode + * @MAX77759_CHGR_CHG_DTLS_SUSP_BATT_THM: + * Charger is suspended as bettery removal detected + * @MAX77759_CHGR_CHG_DTLS_OFF: + * Charger is off. Input invalid or charger disabled + * @MAX77759_CHGR_CHG_DTLS_RSVD_2: Reserved + * @MAX77759_CHGR_CHG_DTLS_RSVD_3: Reserved + * @MAX77759_CHGR_CHG_DTLS_OFF_WDOG_TIMER: + * Charger is off as watchdog timer expired + * @MAX77759_CHGR_CHG_DTLS_SUSP_JEITA: Charger is in JEITA control mode + */ +enum max77759_chgr_chg_dtls_states { + MAX77759_CHGR_CHG_DTLS_PREQUAL, + MAX77759_CHGR_CHG_DTLS_CC, + MAX77759_CHGR_CHG_DTLS_CV, + MAX77759_CHGR_CHG_DTLS_TO, + MAX77759_CHGR_CHG_DTLS_DONE, + MAX77759_CHGR_CHG_DTLS_RSVD_1, + MAX77759_CHGR_CHG_DTLS_TIMER_FAULT, + MAX77759_CHGR_CHG_DTLS_SUSP_BATT_THM, + MAX77759_CHGR_CHG_DTLS_OFF, + MAX77759_CHGR_CHG_DTLS_RSVD_2, + MAX77759_CHGR_CHG_DTLS_RSVD_3, + MAX77759_CHGR_CHG_DTLS_OFF_WDOG_TIMER, + MAX77759_CHGR_CHG_DTLS_SUSP_JEITA, +}; + +enum max77759_chgr_mode { + MAX77759_CHGR_MODE_OFF, + MAX77759_CHGR_MODE_CHG_BUCK_ON =3D 0x5, + MAX77759_CHGR_MODE_OTG_BOOST_ON =3D 0xA, +}; + +/* Fast charge current limits */ +#define MAX77759_CHGR_CHGCC_MIN_UA 133330 +#define MAX77759_CHGR_CHGCC_MAX_UA 4000000 +#define MAX77759_CHGR_CHGCC_STEP_UA 66670 +#define MAX77759_CHGR_CHGCC_REG_OFFSET 0x2 + +/* Charge Termination Voltage Limits (in 2 ranges) */ +/* [3.8, 3.9] V range */ +#define MAX77759_CHGR_CHG_CV_PRM_LO_MIN_MV 3800 +#define MAX77759_CHGR_CHG_CV_PRM_LO_MAX_MV 3900 +#define MAX77759_CHGR_CHG_CV_PRM_LO_STEP_MV 100 +#define MAX77759_CHGR_CHG_CV_PRM_LO_MIN_REG 0x38 +#define MAX77759_CHGR_CHG_CV_PRM_LO_MAX_REG 0x39 +/* [4, 4.5] V range */ +#define MAX77759_CHGR_CHG_CV_PRM_HI_MIN_MV 4000 +#define MAX77759_CHGR_CHG_CV_PRM_HI_MAX_MV 4500 +#define MAX77759_CHGR_CHG_CV_PRM_HI_STEP_MV 10 +#define MAX77759_CHGR_CHG_CV_PRM_HI_MIN_REG 0x0 +#define MAX77759_CHGR_CHG_CV_PRM_HI_MAX_REG 0x32 + +/* USB input current limits */ +#define MAX77759_CHGR_CHGIN_ILIM_MIN_UA 100000 +#define MAX77759_CHGR_CHGIN_ILIM_MAX_UA 3200000 +#define MAX77759_CHGR_CHGIN_ILIM_STEP_UA 25000 +#define MAX77759_CHGR_CHGIN_ILIM_REG_OFFSET 0x3 + /** * struct max77759 - core max77759 internal data structure * --=20 2.52.0.351.gbe84eed79e-goog From nobody Sun Feb 8 15:53:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A495B1BC41; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251227-max77759-charger-v3-4-54e664f5ca92@google.com> References: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> In-Reply-To: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Draszik?= , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso , Amit Sunil Dhamne X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766793897; l=24293; i=amitsd@google.com; s=20241031; h=from:subject:message-id; bh=5Yn31u5TNM1gSPQ55gF06NDnNAKuFj8Et7lxotkOHjk=; b=w8utABqUarLM/pERluL7xSoj2SVAfeNF84qCb78wPuR1gvOAR9NW+HHfD08sPv2ufv8h1VJY6 UJhFtTZBENLC7PfMQatjy+9vjHJxH9IkX1VzQvzsFAndyGMETxwsUmp X-Developer-Key: i=amitsd@google.com; a=ed25519; pk=wD+XZSST4dmnNZf62/lqJpLm7fiyT8iv462zmQ3H6bI= X-Endpoint-Received: by B4 Relay for amitsd@google.com/20241031 with auth_id=262 X-Original-From: Amit Sunil Dhamne Reply-To: amitsd@google.com From: Amit Sunil Dhamne Add support for MAX77759 battery charger driver. This is a 4A 1-Cell Li+/LiPoly dual input switch mode charger. While the device can support USB & wireless charger inputs, this implementation only supports USB input. This implementation supports both buck and boost modes. Signed-off-by: Amit Sunil Dhamne --- MAINTAINERS | 6 + drivers/power/supply/Kconfig | 11 + drivers/power/supply/Makefile | 1 + drivers/power/supply/max77759_charger.c | 764 ++++++++++++++++++++++++++++= ++++ 4 files changed, 782 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index dc731d37c8fe..26a9654ab75e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15539,6 +15539,12 @@ F: drivers/mfd/max77759.c F: drivers/nvmem/max77759-nvmem.c F: include/linux/mfd/max77759.h =20 +MAXIM MAX77759 BATTERY CHARGER DRIVER +M: Amit Sunil Dhamne +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/power/supply/max77759_charger.c + MAXIM MAX77802 PMIC REGULATOR DEVICE DRIVER M: Javier Martinez Canillas L: linux-kernel@vger.kernel.org diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 92f9f7aae92f..e172fd980fde 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -1132,4 +1132,15 @@ config FUEL_GAUGE_MM8013 the state of charge, temperature, cycle count, actual and design capacity, etc. =20 +config CHARGER_MAX77759 + tristate "MAX77759 Charger Driver" + depends on MFD_MAX77759 && REGULATOR + default MFD_MAX77759 + help + Say M or Y here to enable the MAX77759 Charger Driver. MAX77759 + charger is a function of the MAX77759 PMIC. This is a dual input + switch-mode charger. This driver supports buck and OTG boost modes. + + If built as a module, it will be called max77759_charger. + endif # POWER_SUPPLY diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index 4b79d5abc49a..6af905875ad5 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -128,3 +128,4 @@ obj-$(CONFIG_CHARGER_SURFACE) +=3D surface_charger.o obj-$(CONFIG_BATTERY_UG3105) +=3D ug3105_battery.o obj-$(CONFIG_CHARGER_QCOM_SMB2) +=3D qcom_smbx.o obj-$(CONFIG_FUEL_GAUGE_MM8013) +=3D mm8013.o +obj-$(CONFIG_CHARGER_MAX77759) +=3D max77759_charger.o diff --git a/drivers/power/supply/max77759_charger.c b/drivers/power/supply= /max77759_charger.c new file mode 100644 index 000000000000..3d255b069fb9 --- /dev/null +++ b/drivers/power/supply/max77759_charger.c @@ -0,0 +1,764 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * max77759_charger.c - Battery charger driver for MAX77759 charger device. + * + * Copyright 2025 Google LLC. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Default values for Fast Charge Current & Float Voltage */ +#define CHG_CC_DEFAULT_UA 2266770 +#define CHG_FV_DEFAULT_MV 4300 + +#define FOREACH_IRQ(S) \ + S(AICL), \ + S(CHGIN), \ + S(CHG), \ + S(INLIM), \ + S(BAT_OILO), \ + S(CHG_STA_CC), \ + S(CHG_STA_CV), \ + S(CHG_STA_TO), \ + S(CHG_STA_DONE) + +#define GENERATE_ENUM(e) e +#define GENERATE_STRING(s) #s + +enum { + FOREACH_IRQ(GENERATE_ENUM) +}; + +static const char *const chgr_irqs_str[] =3D { + FOREACH_IRQ(GENERATE_STRING) +}; + +static int irqs[ARRAY_SIZE(chgr_irqs_str)]; + +struct max77759_charger { + struct device *dev; + struct regmap *regmap; + struct power_supply *psy; + struct regulator_dev *chgin_otg_rdev; + struct notifier_block nb; + struct power_supply *tcpm_psy; + struct work_struct psy_work; + struct mutex lock; /* protects the state below */ + enum max77759_chgr_mode mode; +}; + +static inline int regval_to_val(int reg, int reg_offset, int step, int min= val) +{ + return ((reg - reg_offset) * step) + minval; +} + +static inline int val_to_regval(int val, int minval, int step, int reg_off= set) +{ + s64 dividend; + + if (unlikely(step =3D=3D 0)) + return reg_offset; + + dividend =3D (s64)val - minval; + return DIV_S64_ROUND_CLOSEST(dividend, step) + reg_offset; +} + +static inline int unlock_prot_regs(struct max77759_charger *chg, bool unlo= ck) +{ + return regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_06, + MAX77759_CHGR_REG_CHG_CNFG_06_CHGPROT, unlock + ? MAX77759_CHGR_REG_CHG_CNFG_06_CHGPROT : 0); +} + +static int charger_input_valid(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_INT_OK, &val); + if (ret) + return ret; + + return (val & MAX77759_CHGR_REG_CHG_INT_CHG) && + (val & MAX77759_CHGR_REG_CHG_INT_CHGIN); +} + +static int get_online(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D charger_input_valid(chg); + if (ret <=3D 0) + return ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_DETAILS_02, &val); + if (ret) + return ret; + + guard(mutex)(&chg->lock); + return (val & MAX77759_CHGR_REG_CHG_DETAILS_02_CHGIN_STS) && + (chg->mode =3D=3D MAX77759_CHGR_MODE_CHG_BUCK_ON); +} + +static int get_status(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_DETAILS_01, &val); + if (ret) + return ret; + + switch (FIELD_GET(MAX77759_CHGR_REG_CHG_DETAILS_01_CHG_DTLS, val)) { + case MAX77759_CHGR_CHG_DTLS_PREQUAL: + case MAX77759_CHGR_CHG_DTLS_CC: + case MAX77759_CHGR_CHG_DTLS_CV: + case MAX77759_CHGR_CHG_DTLS_TO: + return POWER_SUPPLY_STATUS_CHARGING; + case MAX77759_CHGR_CHG_DTLS_DONE: + return POWER_SUPPLY_STATUS_FULL; + case MAX77759_CHGR_CHG_DTLS_TIMER_FAULT: + case MAX77759_CHGR_CHG_DTLS_SUSP_BATT_THM: + case MAX77759_CHGR_CHG_DTLS_OFF_WDOG_TIMER: + case MAX77759_CHGR_CHG_DTLS_SUSP_JEITA: + return POWER_SUPPLY_STATUS_NOT_CHARGING; + case MAX77759_CHGR_CHG_DTLS_OFF: + return POWER_SUPPLY_STATUS_DISCHARGING; + default: + break; + } + + return POWER_SUPPLY_STATUS_UNKNOWN; +} + +static int get_charge_type(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_DETAILS_01, &val); + if (ret) + return ret; + + switch (FIELD_GET(MAX77759_CHGR_REG_CHG_DETAILS_01_CHG_DTLS, val)) { + case MAX77759_CHGR_CHG_DTLS_PREQUAL: + return POWER_SUPPLY_CHARGE_TYPE_TRICKLE; + case MAX77759_CHGR_CHG_DTLS_CC: + case MAX77759_CHGR_CHG_DTLS_CV: + return POWER_SUPPLY_CHARGE_TYPE_FAST; + case MAX77759_CHGR_CHG_DTLS_TO: + return POWER_SUPPLY_CHARGE_TYPE_STANDARD; + case MAX77759_CHGR_CHG_DTLS_DONE: + case MAX77759_CHGR_CHG_DTLS_TIMER_FAULT: + case MAX77759_CHGR_CHG_DTLS_SUSP_BATT_THM: + case MAX77759_CHGR_CHG_DTLS_OFF_WDOG_TIMER: + case MAX77759_CHGR_CHG_DTLS_SUSP_JEITA: + case MAX77759_CHGR_CHG_DTLS_OFF: + return POWER_SUPPLY_CHARGE_TYPE_NONE; + default: + break; + } + + return POWER_SUPPLY_CHARGE_TYPE_UNKNOWN; +} + +static int get_chg_health(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_DETAILS_00, &val); + if (ret) + return ret; + + switch (FIELD_GET(MAX77759_CHGR_REG_CHG_DETAILS_OO_CHGIN_DTLS, val)) { + case MAX77759_CHGR_CHGIN_DTLS_VBUS_UNDERVOLTAGE: + case MAX77759_CHGR_CHGIN_DTLS_VBUS_MARGINAL_VOLTAGE: + return POWER_SUPPLY_HEALTH_UNDERVOLTAGE; + case MAX77759_CHGR_CHGIN_DTLS_VBUS_OVERVOLTAGE: + return POWER_SUPPLY_HEALTH_OVERVOLTAGE; + case MAX77759_CHGR_CHGIN_DTLS_VBUS_VALID: + return POWER_SUPPLY_HEALTH_GOOD; + default: + break; + } + + return POWER_SUPPLY_HEALTH_UNKNOWN; +} + +static int get_batt_health(struct max77759_charger *chg) +{ + u32 val; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_DETAILS_01, &val); + if (ret) + return ret; + + switch (FIELD_GET(MAX77759_CHGR_REG_CHG_DETAILS_01_BAT_DTLS, val)) { + case MAX77759_CHGR_BAT_DTLS_NO_BATT_CHG_SUSP: + return POWER_SUPPLY_HEALTH_NO_BATTERY; + case MAX77759_CHGR_BAT_DTLS_DEAD_BATTERY: + return POWER_SUPPLY_HEALTH_DEAD; + case MAX77759_CHGR_BAT_DTLS_BAT_CHG_TIMER_FAULT: + return POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE; + case MAX77759_CHGR_BAT_DTLS_BAT_OKAY: + case MAX77759_CHGR_BAT_DTLS_BAT_ONLY_MODE: + return POWER_SUPPLY_HEALTH_GOOD; + case MAX77759_CHGR_BAT_DTLS_BAT_UNDERVOLTAGE: + return POWER_SUPPLY_HEALTH_UNDERVOLTAGE; + case MAX77759_CHGR_BAT_DTLS_BAT_OVERVOLTAGE: + return POWER_SUPPLY_HEALTH_OVERVOLTAGE; + case MAX77759_CHGR_BAT_DTLS_BAT_OVERCURRENT: + return POWER_SUPPLY_HEALTH_OVERCURRENT; + default: + break; + } + + return POWER_SUPPLY_HEALTH_UNKNOWN; +} + +static int get_health(struct max77759_charger *chg) +{ + int ret; + + ret =3D get_online(chg); + if (ret < 0) + return ret; + + if (ret) { + ret =3D get_chg_health(chg); + if (ret < 0 || ret !=3D POWER_SUPPLY_HEALTH_GOOD) + return ret; + } + + return get_batt_health(chg); +} + +static int get_fast_charge_current(struct max77759_charger *chg) +{ + u32 regval; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_02, ®val); + if (ret) + return ret; + + ret =3D FIELD_GET(MAX77759_CHGR_REG_CHG_CNFG_02_CHGCC, regval); + if (ret <=3D MAX77759_CHGR_CHGCC_REG_OFFSET) + return MAX77759_CHGR_CHGCC_MIN_UA; + + return regval_to_val(ret, MAX77759_CHGR_CHGCC_REG_OFFSET, + MAX77759_CHGR_CHGCC_STEP_UA, + MAX77759_CHGR_CHGCC_MIN_UA); +} + +static int set_fast_charge_current_limit(struct max77759_charger *chg, + u32 cc_max_ua) +{ + u32 val; + + if (cc_max_ua < MAX77759_CHGR_CHGCC_MIN_UA || + cc_max_ua > MAX77759_CHGR_CHGCC_MAX_UA) + return -EINVAL; + + val =3D val_to_regval(cc_max_ua, MAX77759_CHGR_CHGCC_MIN_UA, + MAX77759_CHGR_CHGCC_STEP_UA, + MAX77759_CHGR_CHGCC_REG_OFFSET); + return regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_02, + MAX77759_CHGR_REG_CHG_CNFG_02_CHGCC, val); +} + +static int get_float_voltage(struct max77759_charger *chg) +{ + u32 regval; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_04, ®val); + if (ret) + return ret; + + ret =3D FIELD_GET(MAX77759_CHGR_REG_CHG_CNFG_04_CHG_CV_PRM, regval); + switch (ret) { + case MAX77759_CHGR_CHG_CV_PRM_HI_MIN_REG ... MAX77759_CHGR_CHG_CV_PRM_HI_= MAX_REG: + return regval_to_val(ret, MAX77759_CHGR_CHG_CV_PRM_HI_MIN_REG, + MAX77759_CHGR_CHG_CV_PRM_HI_STEP_MV, + MAX77759_CHGR_CHG_CV_PRM_HI_MIN_MV); + case MAX77759_CHGR_CHG_CV_PRM_LO_MIN_REG ... MAX77759_CHGR_CHG_CV_PRM_LO_= MAX_REG: + return regval_to_val(ret, MAX77759_CHGR_CHG_CV_PRM_LO_MIN_REG, + MAX77759_CHGR_CHG_CV_PRM_LO_STEP_MV, + MAX77759_CHGR_CHG_CV_PRM_LO_MIN_MV); + default: + return -EINVAL; + } + + return 0; +} + +static int set_float_voltage_limit(struct max77759_charger *chg, u32 fv_mv) +{ + u32 regval; + + if (fv_mv >=3D MAX77759_CHGR_CHG_CV_PRM_LO_MIN_MV && + fv_mv <=3D MAX77759_CHGR_CHG_CV_PRM_LO_MAX_MV) { + regval =3D val_to_regval(fv_mv, + MAX77759_CHGR_CHG_CV_PRM_LO_MIN_MV, + MAX77759_CHGR_CHG_CV_PRM_LO_STEP_MV, + MAX77759_CHGR_CHG_CV_PRM_LO_MIN_REG); + } else if (fv_mv >=3D MAX77759_CHGR_CHG_CV_PRM_HI_MIN_MV && + fv_mv <=3D MAX77759_CHGR_CHG_CV_PRM_HI_MAX_MV) { + regval =3D val_to_regval(fv_mv, + MAX77759_CHGR_CHG_CV_PRM_HI_MIN_MV, + MAX77759_CHGR_CHG_CV_PRM_HI_STEP_MV, + MAX77759_CHGR_CHG_CV_PRM_HI_MIN_REG); + } else { + return -EINVAL; + } + + return regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_04, + MAX77759_CHGR_REG_CHG_CNFG_04_CHG_CV_PRM, + regval); +} + +static int get_input_current_limit(struct max77759_charger *chg) +{ + u32 regval; + int ret; + + ret =3D regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_09, ®val); + if (ret) + return ret; + + ret =3D FIELD_GET(MAX77759_CHGR_REG_CHG_CNFG_09_CHGIN_ILIM, regval); + if (ret <=3D MAX77759_CHGR_CHGIN_ILIM_REG_OFFSET) + return MAX77759_CHGR_CHGIN_ILIM_MIN_UA; + + return regval_to_val(ret, MAX77759_CHGR_CHGIN_ILIM_REG_OFFSET, + MAX77759_CHGR_CHGIN_ILIM_STEP_UA, + MAX77759_CHGR_CHGIN_ILIM_MIN_UA); +} + +static int set_input_current_limit(struct max77759_charger *chg, int ilim_= ua) +{ + u32 regval; + + if (ilim_ua < 0) + return -EINVAL; + + if (ilim_ua =3D=3D 0) + ilim_ua =3D MAX77759_CHGR_CHGIN_ILIM_MIN_UA; + else if (ilim_ua > MAX77759_CHGR_CHGIN_ILIM_MAX_UA) + ilim_ua =3D MAX77759_CHGR_CHGIN_ILIM_MAX_UA; + + regval =3D val_to_regval(ilim_ua, MAX77759_CHGR_CHGIN_ILIM_MIN_UA, + MAX77759_CHGR_CHGIN_ILIM_STEP_UA, + MAX77759_CHGR_CHGIN_ILIM_REG_OFFSET); + return regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_09, + MAX77759_CHGR_REG_CHG_CNFG_09_CHGIN_ILIM, + regval); +} + +static const enum power_supply_property max77759_charger_props[] =3D { + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, + POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, +}; + +static int max77759_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *pval) +{ + struct max77759_charger *chg =3D power_supply_get_drvdata(psy); + int ret; + + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: + ret =3D get_online(chg); + break; + case POWER_SUPPLY_PROP_PRESENT: + ret =3D charger_input_valid(chg); + break; + case POWER_SUPPLY_PROP_STATUS: + ret =3D get_status(chg); + break; + case POWER_SUPPLY_PROP_CHARGE_TYPE: + ret =3D get_charge_type(chg); + break; + case POWER_SUPPLY_PROP_HEALTH: + ret =3D get_health(chg); + break; + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + ret =3D get_fast_charge_current(chg); + break; + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: + ret =3D get_float_voltage(chg); + break; + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + ret =3D get_input_current_limit(chg); + break; + default: + ret =3D -EINVAL; + } + + pval->intval =3D ret; + return ret < 0 ? ret : 0; +} + +static const struct power_supply_desc max77759_charger_desc =3D { + .name =3D "max77759-charger", + .type =3D POWER_SUPPLY_TYPE_USB, + .properties =3D max77759_charger_props, + .num_properties =3D ARRAY_SIZE(max77759_charger_props), + .get_property =3D max77759_charger_get_property, +}; + +static int charger_set_mode(struct max77759_charger *chg, + enum max77759_chgr_mode mode) +{ + int ret; + + guard(mutex)(&chg->lock); + + if (chg->mode =3D=3D mode) + return 0; + + if ((mode =3D=3D MAX77759_CHGR_MODE_CHG_BUCK_ON || + mode =3D=3D MAX77759_CHGR_MODE_OTG_BOOST_ON) && + chg->mode !=3D MAX77759_CHGR_MODE_OFF) { + dev_err(chg->dev, "Invalid mode transition from %d to %d", + chg->mode, mode); + return -EINVAL; + } + + ret =3D regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_00, + MAX77759_CHGR_REG_CHG_CNFG_00_MODE, mode); + if (ret) + return ret; + + chg->mode =3D mode; + return 0; +} + +static int enable_chgin_otg(struct regulator_dev *rdev) +{ + struct max77759_charger *chg =3D rdev_get_drvdata(rdev); + + return charger_set_mode(chg, MAX77759_CHGR_MODE_OTG_BOOST_ON); +} + +static int disable_chgin_otg(struct regulator_dev *rdev) +{ + struct max77759_charger *chg =3D rdev_get_drvdata(rdev); + + return charger_set_mode(chg, MAX77759_CHGR_MODE_OFF); +} + +static int chgin_otg_status(struct regulator_dev *rdev) +{ + struct max77759_charger *chg =3D rdev_get_drvdata(rdev); + + guard(mutex)(&chg->lock); + return chg->mode =3D=3D MAX77759_CHGR_MODE_OTG_BOOST_ON; +} + +static const struct regulator_ops chgin_otg_reg_ops =3D { + .enable =3D enable_chgin_otg, + .disable =3D disable_chgin_otg, + .is_enabled =3D chgin_otg_status, +}; + +static const struct regulator_desc chgin_otg_reg_desc =3D { + .name =3D "chgin-otg", + .of_match =3D of_match_ptr("chgin-otg-regulator"), + .owner =3D THIS_MODULE, + .ops =3D &chgin_otg_reg_ops, + .fixed_uV =3D 5000000, + .n_voltages =3D 1, +}; + +static irqreturn_t irq_handler(int irq, void *data) +{ + struct max77759_charger *chg =3D data; + struct device *dev =3D chg->dev; + u32 chgint_ok; + int i; + + regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_INT_OK, &chgint_ok); + + for (i =3D 0; i < ARRAY_SIZE(irqs); i++) { + if (irqs[i] =3D=3D irq) + break; + } + + switch (i) { + case AICL: + dev_dbg(dev, "AICL mode: %s", + str_no_yes(chgint_ok & MAX77759_CHGR_REG_CHG_INT_AICL)); + break; + case CHGIN: + dev_dbg(dev, "CHGIN input valid: %s", + str_yes_no(chgint_ok & MAX77759_CHGR_REG_CHG_INT_CHGIN)); + break; + case CHG: + dev_dbg(dev, "CHG status okay/off: %s", + str_yes_no(chgint_ok & MAX77759_CHGR_REG_CHG_INT_CHG)); + break; + case INLIM: + dev_dbg(dev, "Current Limit reached: %s", + str_no_yes(chgint_ok & MAX77759_CHGR_REG_CHG_INT_INLIM)); + break; + case BAT_OILO: + dev_dbg(dev, "Battery over-current threshold crossed"); + break; + case CHG_STA_CC: + dev_dbg(dev, "Charger reached CC stage"); + break; + case CHG_STA_CV: + dev_dbg(dev, "Charger reached CV stage"); + break; + case CHG_STA_TO: + dev_dbg(dev, "Charger reached TO stage"); + break; + case CHG_STA_DONE: + dev_dbg(dev, "Charger reached TO stage"); + break; + default: + dev_err(dev, "Unrecognized irq: %d", i); + return IRQ_HANDLED; + } + + power_supply_changed(chg->psy); + return IRQ_HANDLED; +} + +static int max77759_init_irqhandler(struct max77759_charger *chg) +{ + struct device *dev =3D chg->dev; + unsigned long irq_flags; + struct irq_data *irqd; + int i, ret; + + for (i =3D 0; i < ARRAY_SIZE(chgr_irqs_str); i++) { + ret =3D platform_get_irq_byname(to_platform_device(dev), + chgr_irqs_str[i]); + if (ret < 0) { + dev_err(dev, + "Failed to get irq resource for %s, ret=3D%d", + chgr_irqs_str[i], ret); + return ret; + } + + irqs[i] =3D ret; + irq_flags =3D IRQF_ONESHOT; + irqd =3D irq_get_irq_data(irqs[i]); + if (irqd) + irq_flags |=3D irqd_get_trigger_type(irqd); + + ret =3D devm_request_threaded_irq(dev, irqs[i], NULL, irq_handler, + irq_flags, dev_name(dev), chg); + if (ret) { + dev_err(dev, + "Unable to register irq handler for %s, ret=3D%d", + chgr_irqs_str[i], ret); + return ret; + } + } + + return 0; +} + +static int max77759_charger_init(struct max77759_charger *chg) +{ + struct power_supply_battery_info *info; + u32 regval, fast_chg_curr, fv; + int ret; + + regmap_read(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_00, ®val); + chg->mode =3D FIELD_GET(MAX77759_CHGR_REG_CHG_CNFG_00_MODE, regval); + ret =3D charger_set_mode(chg, MAX77759_CHGR_MODE_OFF); + if (ret) + return ret; + + if (power_supply_get_battery_info(chg->psy, &info)) { + fv =3D CHG_FV_DEFAULT_MV; + fast_chg_curr =3D CHG_CC_DEFAULT_UA; + } else { + fv =3D info->constant_charge_voltage_max_uv / 1000; + fast_chg_curr =3D info->constant_charge_current_max_ua; + } + + ret =3D set_fast_charge_current_limit(chg, fast_chg_curr); + if (ret) + return ret; + + ret =3D set_float_voltage_limit(chg, fv); + if (ret) + return ret; + + ret =3D unlock_prot_regs(chg, true); + if (ret) + return ret; + + /* Disable wireless charging input */ + regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_12, + MAX77759_CHGR_REG_CHG_CNFG_12_WCINSEL, 0); + + regmap_update_bits(chg->regmap, MAX77759_CHGR_REG_CHG_CNFG_18, + MAX77759_CHGR_REG_CHG_CNFG_18_WDTEN, 0); + + return unlock_prot_regs(chg, false); +} + +static void psy_work_item(struct work_struct *work) +{ + struct max77759_charger *chg =3D + container_of(work, struct max77759_charger, psy_work); + union power_supply_propval current_limit =3D { 0 }, online =3D { 0 }; + int ret; + + power_supply_get_property(chg->tcpm_psy, POWER_SUPPLY_PROP_CURRENT_MAX, + ¤t_limit); + power_supply_get_property(chg->tcpm_psy, POWER_SUPPLY_PROP_ONLINE, + &online); + + if (online.intval && current_limit.intval) { + ret =3D set_input_current_limit(chg, current_limit.intval); + if (ret) + dev_err(chg->dev, + "Unable to set current limit, ret=3D%d", ret); + + charger_set_mode(chg, MAX77759_CHGR_MODE_CHG_BUCK_ON); + } else { + charger_set_mode(chg, MAX77759_CHGR_MODE_OFF); + } +} + +static int psy_changed(struct notifier_block *nb, unsigned long evt, void = *data) +{ + struct max77759_charger *chg =3D container_of(nb, struct max77759_charger, + nb); + const char *psy_name =3D "tcpm-source"; + struct power_supply *psy =3D data; + + if (!strnstr(psy->desc->name, psy_name, strlen(psy_name)) || + evt !=3D PSY_EVENT_PROP_CHANGED) + return NOTIFY_OK; + + chg->tcpm_psy =3D psy; + schedule_work(&chg->psy_work); + return NOTIFY_OK; +} + +static void max_tcpci_unregister_psy_notifier(void *nb) +{ + power_supply_unreg_notifier(nb); +} + +static int max77759_charger_probe(struct platform_device *pdev) +{ + struct regulator_config chgin_otg_reg_cfg; + struct power_supply_config psy_cfg; + struct device *dev =3D &pdev->dev; + struct max77759_charger *chg; + int ret; + + device_set_of_node_from_dev(dev, dev->parent); + chg =3D devm_kzalloc(dev, sizeof(*chg), GFP_KERNEL); + if (!chg) + return -ENOMEM; + + platform_set_drvdata(pdev, chg); + chg->dev =3D dev; + chg->regmap =3D dev_get_regmap(dev->parent, "charger"); + if (!chg->regmap) + return dev_err_probe(dev, -ENODEV, "Missing regmap"); + + ret =3D devm_mutex_init(dev, &chg->lock); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize lock"); + + psy_cfg.fwnode =3D dev_fwnode(dev); + psy_cfg.drv_data =3D chg; + chg->psy =3D devm_power_supply_register(dev, &max77759_charger_desc, + &psy_cfg); + if (IS_ERR(chg->psy)) + return dev_err_probe(dev, -EPROBE_DEFER, + "Failed to register psy, ret=3D%ld", + PTR_ERR(chg->psy)); + + ret =3D max77759_charger_init(chg); + if (ret) + return dev_err_probe(dev, ret, + "Failed to initialize max77759 charger"); + + chgin_otg_reg_cfg.dev =3D dev; + chgin_otg_reg_cfg.driver_data =3D chg; + chgin_otg_reg_cfg.of_node =3D dev_of_node(dev); + chg->chgin_otg_rdev =3D devm_regulator_register(dev, &chgin_otg_reg_desc, + &chgin_otg_reg_cfg); + if (IS_ERR(chg->chgin_otg_rdev)) + return dev_err_probe(dev, PTR_ERR(chg->chgin_otg_rdev), + "Failed to register chgin otg regulator"); + + ret =3D devm_work_autocancel(dev, &chg->psy_work, psy_work_item); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize psy work"); + + chg->nb.notifier_call =3D psy_changed; + ret =3D power_supply_reg_notifier(&chg->nb); + if (ret) + return dev_err_probe(dev, ret, + "Unable to register psy notifier"); + + ret =3D devm_add_action_or_reset(dev, max_tcpci_unregister_psy_notifier, + &chg->nb); + if (ret) + return ret; + + ret =3D max77759_init_irqhandler(chg); + if (ret) + return dev_err_probe(dev, ret, + "Unable to initialize irq handler"); + return 0; +} + +static const struct platform_device_id max77759_charger_id[] =3D { + {"max77759-charger",}, + { } +}; +MODULE_DEVICE_TABLE(platform, max77759_charger_id); + +static struct platform_driver max77759_charger_driver =3D { + .driver =3D { + .name =3D "max77759-charger", + }, + .probe =3D max77759_charger_probe, + .id_table =3D max77759_charger_id, +}; +module_platform_driver(max77759_charger_driver); + +MODULE_AUTHOR("Amit Sunil Dhamne "); +MODULE_DESCRIPTION("Maxim MAX77759 charger driver"); +MODULE_LICENSE("GPL"); --=20 2.52.0.351.gbe84eed79e-goog From nobody Sun Feb 8 15:53:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8F432A1AA; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251227-max77759-charger-v3-5-54e664f5ca92@google.com> References: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> In-Reply-To: <20251227-max77759-charger-v3-0-54e664f5ca92@google.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Draszik?= , Lee Jones , Greg Kroah-Hartman , Badhri Jagan Sridharan , Heikki Krogerus , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, RD Babiera , Kyle Tso , Amit Sunil Dhamne X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766793897; l=3811; i=amitsd@google.com; s=20241031; h=from:subject:message-id; bh=MT44N2zv9M1kJDU04IDvsZ4Ub4KamRLbZfq7XeF0PrU=; b=Z/afSjmgIdyXCBiail76lX4kKhQKrYUwnFb0dimHzrbD1ik3XAzmX3xKyBoKQHPnTHiU9mwqH qUSUNLCIRhmBAYeWbCC3E73Si/t/lmitnuEB15+C1tOGF2K/6JJmGcf X-Developer-Key: i=amitsd@google.com; a=ed25519; pk=wD+XZSST4dmnNZf62/lqJpLm7fiyT8iv462zmQ3H6bI= X-Endpoint-Received: by B4 Relay for amitsd@google.com/20241031 with auth_id=262 X-Original-From: Amit Sunil Dhamne Reply-To: amitsd@google.com From: Amit Sunil Dhamne TCPCI maxim driver directly writes to the charger's register space to set charger mode depending on the power role. As MAX77759 chg driver exists, this WAR is not required. Instead, use a regulator interface to source vbus when typec is in source power mode. In other power modes, this regulator will be turned off if active. Signed-off-by: Amit Sunil Dhamne Reviewed-by: Andr=C3=A9 Draszik Reviewed-by: Heikki Krogerus --- drivers/usb/typec/tcpm/tcpci_maxim.h | 1 + drivers/usb/typec/tcpm/tcpci_maxim_core.c | 54 +++++++++++++++++++--------= ---- 2 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/usb/typec/tcpm/tcpci_maxim.h b/drivers/usb/typec/tcpm/= tcpci_maxim.h index b33540a42a95..b314606eb0f6 100644 --- a/drivers/usb/typec/tcpm/tcpci_maxim.h +++ b/drivers/usb/typec/tcpm/tcpci_maxim.h @@ -60,6 +60,7 @@ struct max_tcpci_chip { struct tcpm_port *port; enum contamiant_state contaminant_state; bool veto_vconn_swap; + struct regulator *vbus_reg; }; =20 static inline int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned i= nt reg, u16 *val) diff --git a/drivers/usb/typec/tcpm/tcpci_maxim_core.c b/drivers/usb/typec/= tcpm/tcpci_maxim_core.c index 19f638650796..e9e2405c5ca0 100644 --- a/drivers/usb/typec/tcpm/tcpci_maxim_core.c +++ b/drivers/usb/typec/tcpm/tcpci_maxim_core.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -35,12 +36,6 @@ */ #define TCPC_RECEIVE_BUFFER_LEN 32 =20 -#define MAX_BUCK_BOOST_SID 0x69 -#define MAX_BUCK_BOOST_OP 0xb9 -#define MAX_BUCK_BOOST_OFF 0 -#define MAX_BUCK_BOOST_SOURCE 0xa -#define MAX_BUCK_BOOST_SINK 0x5 - static const struct regmap_range max_tcpci_tcpci_range[] =3D { regmap_reg_range(0x00, 0x95) }; @@ -202,32 +197,49 @@ static void process_rx(struct max_tcpci_chip *chip, u= 16 status) tcpm_pd_receive(chip->port, &msg, rx_type); } =20 +static int get_vbus_regulator_handle(struct max_tcpci_chip *chip) +{ + if (IS_ERR_OR_NULL(chip->vbus_reg)) { + chip->vbus_reg =3D devm_regulator_get_exclusive(chip->dev, + "vbus"); + if (IS_ERR_OR_NULL(chip->vbus_reg)) { + dev_err(chip->dev, + "Failed to get vbus regulator handle"); + return -ENODEV; + } + } + + return 0; +} + static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdat= a, bool source, bool sink) { struct max_tcpci_chip *chip =3D tdata_to_max_tcpci(tdata); - u8 buffer_source[2] =3D {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE}; - u8 buffer_sink[2] =3D {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK}; - u8 buffer_none[2] =3D {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF}; - struct i2c_client *i2c =3D chip->client; int ret; =20 - struct i2c_msg msgs[] =3D { - { - .addr =3D MAX_BUCK_BOOST_SID, - .flags =3D i2c->flags & I2C_M_TEN, - .len =3D 2, - .buf =3D source ? buffer_source : sink ? buffer_sink : buffer_none, - }, - }; - if (source && sink) { dev_err(chip->dev, "Both source and sink set\n"); return -EINVAL; } =20 - ret =3D i2c_transfer(i2c->adapter, msgs, 1); + ret =3D get_vbus_regulator_handle(chip); + if (ret) { + /* + * Regulator is not necessary for sink only applications. Return + * success in cases where sink mode is being modified. + */ + return source ? ret : 1; + } + + if (source) { + if (!regulator_is_enabled(chip->vbus_reg)) + ret =3D regulator_enable(chip->vbus_reg); + } else { + if (regulator_is_enabled(chip->vbus_reg)) + ret =3D regulator_disable(chip->vbus_reg); + } =20 - return ret < 0 ? ret : 1; + return ret < 0 ? ret : 1; } =20 static void process_power_status(struct max_tcpci_chip *chip) --=20 2.52.0.351.gbe84eed79e-goog