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Thu, 25 Dec 2025 12:11:34 -0500 (EST) From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= To: Mauro Carvalho Chehab , Kuninori Morimoto , Jacopo Mondi , Laurent Pinchart , linux-media@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Niklas=20S=C3=B6derlund?= , Marek Vasut' Subject: [PATCH v5 04/12] media: rppx1: Add support for AWB gain settings Date: Thu, 25 Dec 2025 18:10:46 +0100 Message-ID: <20251225171054.1370856-5-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251225171054.1370856-1-niklas.soderlund+renesas@ragnatech.se> References: <20251225171054.1370856-1-niklas.soderlund+renesas@ragnatech.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Extend the RPPX1 driver to allow setting the AWB gains using the RkISP1 parameter buffer format. This is the second function block inside the RPPX1 to be enabled and it uses the RPPX1 framework for parameters and its writer abstraction to allow the user to control how (and when) configuration is applied to the RPPX1. As the RkISP1 parameters buffer have lower precision then the RPPX1 hardware the values needs to be scaled. Signed-off-by: Niklas S=C3=B6derlund Tested-by: Marek Vasut' --- .../platform/dreamchip/rppx1/rpp_params.c | 3 ++ .../platform/dreamchip/rppx1/rppx1_awbg.c | 37 +++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/drivers/media/platform/dreamchip/rppx1/rpp_params.c b/drivers/= media/platform/dreamchip/rppx1/rpp_params.c index 6e49f0e90c41..443eac0d8924 100644 --- a/drivers/media/platform/dreamchip/rppx1/rpp_params.c +++ b/drivers/media/platform/dreamchip/rppx1/rpp_params.c @@ -26,6 +26,9 @@ int rppx1_params_rkisp1(struct rppx1 *rpp, struct rkisp1_= ext_params_cfg *cfg, block_offset +=3D block->header.size; =20 switch (block->header.type) { + case RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_GAIN: + module =3D &rpp->pre1.awbg; + break; case RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_MEAS: module =3D &rpp->post.wbmeas; break; diff --git a/drivers/media/platform/dreamchip/rppx1/rppx1_awbg.c b/drivers/= media/platform/dreamchip/rppx1/rppx1_awbg.c index e20bc369ca8c..da5ae3cfadb8 100644 --- a/drivers/media/platform/dreamchip/rppx1/rppx1_awbg.c +++ b/drivers/media/platform/dreamchip/rppx1/rppx1_awbg.c @@ -25,6 +25,43 @@ static int rppx1_awbg_probe(struct rpp_module *mod) return 0; } =20 +static int +rppx1_awbg_param_rkisp1(struct rpp_module *mod, + const union rppx1_params_rkisp1_config *block, + rppx1_reg_write write, void *priv) +{ + const struct rkisp1_ext_params_awb_gain_config *cfg =3D &block->awbg; + + /* If the modules is disabled, simply bypass it. */ + if (cfg->header.flags & RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE) { + write(priv, mod->base + AWB_ENABLE_REG, 0); + return 0; + } + + /* + * RkISP1 gains are 10-bit with 8 bit fractional part and 0x100 =3D 1.0, + * giving a possible range of 0.0 to 4.0. + * + * RPP gains are 18-bit with 12 bit fractional part and 0x1000 =3D 1.0, + * giving a possible range of 0.0 to 64.0. NOTE: RPP documentation is + * contradictory this is the register definition, the function + * description states 0x400 =3D 1.0 AND 18-bit with 12 fractional bits, + * which is not possible... + * + * Map the RkISP1 value range (0.0 - 4.0) by left shifting by 4. + */ + + write(priv, mod->base + AWB_GAIN_GR_REG, cfg->config.gain_green_r << 4); + write(priv, mod->base + AWB_GAIN_GB_REG, cfg->config.gain_green_b << 4); + write(priv, mod->base + AWB_GAIN_R_REG, cfg->config.gain_red << 4); + write(priv, mod->base + AWB_GAIN_B_REG, cfg->config.gain_blue << 4); + + write(priv, mod->base + AWB_ENABLE_REG, AWB_ENABLE_AWB_GAIN_EN); + + return 0; +} + const struct rpp_module_ops rppx1_awbg_ops =3D { .probe =3D rppx1_awbg_probe, + .param_rkisp1 =3D rppx1_awbg_param_rkisp1, }; --=20 2.52.0