From nobody Sun Feb 8 20:17:39 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A2F722A4D8; Wed, 24 Dec 2025 03:17:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546278; cv=none; b=DVPmCCHO+cTFusoOiekm7MwkpKjBrVjm8ooj8rUml+OIZaP8pykk3svxlHjdC6TjE+8YETw8Lb1ehzaI/WgKNuDUGGiXL7Ry3j4E2VN40eKusf+DHfVytb+vN9Ec/P+SVuXf2VZWGt9XLOVBfI0vW5/gugdZuM0EiJ8Y4f8TpEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546278; c=relaxed/simple; bh=ZtWGLGkmOi7UqWql8rQSiZ7XHZ1PJIPzj/K8Sy/tBvE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=g0AvwCXlCTpYlhvUp9Dtl9vh+WfGp2xhQLwstgTl5Owa+EtL3bNRi3GV5vKsp3Sn4OLmiiY6TQmhn6s3gQ5+Ntk0DiFZKSf4AiHdaLDM+sMOhff3QqjLYFkQwJXJ2i6KjNJHa0rwsgeVesMv5e9zZlRjCcHNX6HhdBR2jbASNf8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Z5MS1C76; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Z5MS1C76" X-UUID: 1e0cbfdae07711f08a742f2735aaa5e5-20251224 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=NiZxc43IjHBA+/wzLD458ncrHI4s1rgsJ+lbgDIgSAE=; b=Z5MS1C76NWCkF79p8xWHdTrknhmgBXhNSWYUxQ7SF/XywUE818p9UF+Ud8Yc7JzupX6Dpuoc9OwvdW4+zNh/IQ53sMGnGQRr0Zr4xes4zwURFCz4qiRu5CZPCAhP4XNshfwj42gaqMp/YjiKML1fmQsGjqoMbLoDNID1eMtYLow=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.9,REQID:6a165091-3850-44cc-911e-df0db6d3b648,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:5047765,CLOUDID:adc01b03-1fa9-44eb-b231-4afc61466396,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 1e0cbfdae07711f08a742f2735aaa5e5-20251224 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1137724256; Wed, 24 Dec 2025 11:17:45 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Wed, 24 Dec 2025 11:17:44 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 24 Dec 2025 11:17:43 +0800 From: Jianhua Lin To: , , , , , CC: , , , , , , , , , Jianhua Lin Subject: [PATCH v2 1/4] arm64: dts: mt8188: update JPEG encoder/decoder compatible Date: Wed, 24 Dec 2025 11:17:18 +0800 Message-ID: <20251224031721.9942-2-jianhua.lin@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251224031721.9942-1-jianhua.lin@mediatek.com> References: <20251224031721.9942-1-jianhua.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The JPEG encoder and decoder of MT8188 share the same architecture and features as those of MT8189, both use a 34-bit iova address-space (16GB) and a single clock configuration. Previously, MT8188 was incorrectly defined alongside SoCs with 32-bit iova address-space (4GB), such as "mediatek,mt2701-jpgdec" and "mediatek,mtk-jpgenc". This mismatch results in an ABI break, as MT8188 cannot function correctly under the 32-bit iova address-space (4GB) configuration. Therefore, MT8188 needs to inherit from MT8189. Update "mediatek,mtk-jpgenc" to "mediatek,mt8189-jpgenc", update "mediatek,mt2701-jpgdec" to "mediatek,mt8189-jpgdec". Signed-off-by: Jianhua Lin --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts= /mediatek/mt8188.dtsi index 90c388f1890f..ff9a774f5911 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -2846,7 +2846,7 @@ video_encoder: video-encoder@1a020000 { }; =20 jpeg_encoder: jpeg-encoder@1a030000 { - compatible =3D "mediatek,mt8188-jpgenc", "mediatek,mtk-jpgenc"; + compatible =3D "mediatek,mt8188-jpgenc", "mediatek,mt8189-jpgenc"; reg =3D <0 0x1a030000 0 0x10000>; clocks =3D <&vencsys CLK_VENC1_JPGENC>; clock-names =3D "jpgenc"; @@ -2859,11 +2859,10 @@ jpeg_encoder: jpeg-encoder@1a030000 { }; =20 jpeg_decoder: jpeg-decoder@1a040000 { - compatible =3D "mediatek,mt8188-jpgdec", "mediatek,mt2701-jpgdec"; + compatible =3D "mediatek,mt8188-jpgdec", "mediatek,mt8189-jpgdec"; reg =3D <0 0x1a040000 0 0x10000>; - clocks =3D <&vencsys CLK_VENC1_LARB>, - <&vencsys CLK_VENC1_JPGDEC>; - clock-names =3D "jpgdec-smi", "jpgdec"; + clocks =3D <&vencsys CLK_VENC1_JPGDEC>; + clock-names =3D "jpgdec"; interrupts =3D ; iommus =3D <&vdo_iommu M4U_PORT_L19_JPGDEC_WDMA_0>, <&vdo_iommu M4U_PORT_L19_JPGDEC_BSDMA_0>, --=20 2.45.2 From nobody Sun Feb 8 20:17:39 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 898E430C60E; Wed, 24 Dec 2025 03:17:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546284; cv=none; b=W8uiUdpb3liwlaU6y0Ol+EEOC6cBBDn6EbgGQrkRpZkPdqVMxZp9WLNkB0aZXnC5pJFoCiyMRRyh4hq02NeWdNAJ1j4s4i2d1yD17sPoG4VLfc43JDKqNlJOHMzt/pj0Zs/+tGSkczoqXC7pqESnpyRcVMiNV8aNJBjIwmQEzKg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546284; c=relaxed/simple; bh=pSGIlmkIQKrPG5nJDHC8rJrBg1mffCpJF05XgpGx0do=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pddkKjGPkBDjKsAQrVsI/RdTsKcue8EpU86ojwnjeZ+hlHZTLEAVWW5SgUjSDiXTYAzGQDJRl9wIXV/mTsskVtGsvkRe3Zfj65PycmU8r1W58ZCCL1AuJ36A0KLofwb0+wxpRn8tnLL48P4D+LaPxano3KDiAt0XGjB2aWLQabs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=TTTMzjes; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="TTTMzjes" X-UUID: 1ead81d6e07711f0b33aeb1e7f16c2b6-20251224 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=rM+YHKGVmwJ/Pk2fHwI/gsJzacwSeKmWBO+yWoQfwt0=; b=TTTMzjesyBvW7MrwJgss81m43HKcrP5+bg3iQ+li8v32vojoQ8dTWmg4ASlyljRRtcrfNMjwT/MI055IB+qUuwL0bgeoSMJHGYSYbjwqDdqYjI4gQ1uKRPa8JEMupeyTAYMtE2Kgaybwb41C3dVXLGWOXXSBwF3LAoLYc49UEoI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.9,REQID:5cd12d11-93d0-4946-8813-bfdf2c683680,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:5047765,CLOUDID:80e587aa-6421-45b1-b8b8-e73e3dc9a90f,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 1ead81d6e07711f0b33aeb1e7f16c2b6-20251224 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 423097831; Wed, 24 Dec 2025 11:17:46 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.26; Wed, 24 Dec 2025 11:17:45 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 24 Dec 2025 11:17:44 +0800 From: Jianhua Lin To: , , , , , CC: , , , , , , , , , Jianhua Lin Subject: [PATCH v2 2/4] dt-bindings: media: mediatek-jpeg-decoder: add MT8189 compatible string Date: Wed, 24 Dec 2025 11:17:19 +0800 Message-ID: <20251224031721.9942-3-jianhua.lin@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251224031721.9942-1-jianhua.lin@mediatek.com> References: <20251224031721.9942-1-jianhua.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Compared to the previous generation IC, the MT8189 uses 34-bit iova address-space (16GB) and requires a single clock configuration. Therefore, add "mediatek,mt8189-jpgdec" compatible to the binding document. Additionally, it corrects the inheritance for MT8188, aligning it with MT8189 due to their shared architecture and 34-bit iova address space (16GB) and singlesingle clock requirement. Previously, MT8188 was incorrectly defined alongside SoCs with 32-bit iova address-space (4GB), such as "mediatek,mt2701-jpgdec". This mismatch results in an ABI break, as MT8188 cannot function correctly under the 32-bit iova address-space (4GB) configuration. Key changes include: - Introducing "mediatek,mt8189-jpgdec" as a new compatible string to represent the correct architecture. - Updating MT8188 to inherit from MT8189, ensuring proper support for 34-bit iova address-space (16GB) and simplifying clock configuration. - Add property "mediatek,larb" for MT8189 requirements. - Improved formatting for better readability and consistency. These changes ensure that both MT8188 and MT8189 are correctly supported with the necessary 34-bit iova address-space (16GB), while maintaining compatibility with their shared architecture. Extensive internal review and testing have been conducted to validate these changes and ensure compliance with DT binding standards. Signed-off-by: Jianhua Lin --- .../bindings/media/mediatek-jpeg-decoder.yaml | 50 ++++++++++++++++--- 1 file changed, 44 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.= yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml index a4aacd3eb189..814b53ef46e7 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml @@ -17,13 +17,19 @@ properties: oneOf: - items: - enum: - - mediatek,mt8173-jpgdec - mediatek,mt2701-jpgdec + - mediatek,mt8173-jpgdec + - items: + - enum: + - mediatek,mt8189-jpgdec - items: - enum: - mediatek,mt7623-jpgdec - - mediatek,mt8188-jpgdec - const: mediatek,mt2701-jpgdec + - items: + - enum: + - mediatek,mt8188-jpgdec + - const: mediatek,mt8189-jpgdec =20 reg: maxItems: 1 @@ -32,13 +38,16 @@ properties: maxItems: 1 =20 clocks: + minItems: 1 maxItems: 2 - minItems: 2 =20 clock-names: - items: - - const: jpgdec-smi - - const: jpgdec + minItems: 1 + maxItems: 2 + + mediatek,larb: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the smi_larb node. =20 power-domains: maxItems: 1 @@ -51,6 +60,35 @@ properties: Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for deta= ils. Ports are according to the HW. =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt2701-jpgdec + - mediatek,mt8173-jpgdec + + then: + properties: + clock-names: + items: + - const: jpgdec-smi + - const: jpgdec + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8189-jpgdec + + then: + properties: + clock-names: + items: + - const: jpgdec + required: - compatible - reg --=20 2.45.2 From nobody Sun Feb 8 20:17:39 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D99FD2F3624; Wed, 24 Dec 2025 03:17:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546282; cv=none; b=t0P4zKH22t+0nRVTgpHk1Vnch4LZdaxoGr5O5kiDRycgWI4dsWqTHnu7gD0BhGrVSVYXkl9avzxXHJcN3Lwm/+Gr184AOW9AF9qWaQoS+ViQJzMfsjj2uww4bsPfV1jJ0JM0gCrmTwCuI/bvV4f+ZuFE5lVF7f7WnIsdVdQuHLo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546282; c=relaxed/simple; bh=x2Qz9fnqWW2ujyytawWHsSTpWVlY+EaQMCIFD1iQnQw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kk0QXezf1xPy8h2Q30hiepDQrRKod9hz24wVVMLNqdyrQJiWoh7cuA40xiVakpdDmDLVdvYuZjvY5HPievn/D3BdvoA9rNuZylEM7MzbYqbvelNBseZZ6YNdXfdu8MzkF7z+oUuyMhseIu7XpQWyt93utQ3fUzjiChJnLQHf1hw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=NXBATxqP; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="NXBATxqP" X-UUID: 1f2f2236e07711f0b33aeb1e7f16c2b6-20251224 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qSgk/ff5P9uae5l/SgNDf/rlxP+ki/jm4cke2+z9AIw=; b=NXBATxqPUeSg0DGuUehIpmVwWsl4yGuNpYaGj+bN8GiQIL+NuumywREhlxfBIxvJrR9XWPzveb8jg+jGgSiFEJ0h2MGf79O8uwmB41/uM7owShinw/430M2ohKmTB7w1ivBGHYaAd1o2/dOJdEPNO1YTlDtqmmgAoA83oa2mRns=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.9,REQID:a1d6779b-4fd9-4811-9fba-922e84d0d632,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:5047765,CLOUDID:7fe587aa-6421-45b1-b8b8-e73e3dc9a90f,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 1f2f2236e07711f0b33aeb1e7f16c2b6-20251224 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2030907299; Wed, 24 Dec 2025 11:17:47 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Wed, 24 Dec 2025 11:17:46 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 24 Dec 2025 11:17:45 +0800 From: Jianhua Lin To: , , , , , CC: , , , , , , , , , Jianhua Lin Subject: [PATCH v2 3/4] dt-bindings: media: mediatek-jpeg-encoder: add MT8189 compatible string Date: Wed, 24 Dec 2025 11:17:20 +0800 Message-ID: <20251224031721.9942-4-jianhua.lin@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251224031721.9942-1-jianhua.lin@mediatek.com> References: <20251224031721.9942-1-jianhua.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Compared to the previous generation IC, the MT8189 uses 34-bit iova address-space (16GB) and requires a single clock configuration. Therefore, add "mediatek,mt8189-jpgenc" compatible to the binding document. Additionally, it corrects the inheritance for MT8188, aligning it with MT8189 due to their shared architecture and 34-bit iova address space (16GB) requirements. Previously, MT8188 was incorrectly defined alongside SoCs with 32-bit iova address-space (4GB), such as "mediatek,mtk-jpgenc". This mismatch results in an ABI break, as MT8188 cannot function correctly under the 32-bit iova address-space (4GB) configuration. Key changes include: - Introducing "mediatek,mt8189-jpgenc" as a new compatible string to represent the correct architecture. - Updating MT8188 to inherit from MT8189, ensuring proper support for 34-bit iova address-space (16GB). - Add property "mediatek,larb" for MT8189 requirements. - Improved formatting for better readability and consistency. These changes ensure that both MT8188 and MT8189 are correctly supported with the necessary 34-bit iova address-space (16GB), while maintaining compatibility with their shared architecture. Extensive internal review and testing have been conducted to validate these changes and ensure compliance with DT binding standards. Signed-off-by: Jianhua Lin --- .../bindings/media/mediatek-jpeg-encoder.yaml | 29 ++++++++++++++----- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.= yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml index 5b15f8977f67..3205ecbaa6c5 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml @@ -14,13 +14,24 @@ description: |- =20 properties: compatible: - items: - - enum: - - mediatek,mt2701-jpgenc - - mediatek,mt8183-jpgenc - - mediatek,mt8186-jpgenc - - mediatek,mt8188-jpgenc - - const: mediatek,mtk-jpgenc + oneOf: + - items: + - enum: + - mediatek,mtk-jpgenc + - items: + - enum: + - mediatek,mt8189-jpgenc + - items: + - enum: + - mediatek,mt2701-jpgenc + - mediatek,mt8183-jpgenc + - mediatek,mt8186-jpgenc + - const: mediatek,mtk-jpgenc + - items: + - enum: + - mediatek,mt8188-jpgenc + - const: mediatek,mt8189-jpgenc + reg: maxItems: 1 =20 @@ -34,6 +45,10 @@ properties: items: - const: jpgenc =20 + mediatek,larb: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the smi_larb node. + power-domains: maxItems: 1 =20 --=20 2.45.2 From nobody Sun Feb 8 20:17:39 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 341C829D28F; Wed, 24 Dec 2025 03:17:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546286; cv=none; b=W5Vidp1b8+sb7l9RfbIuV1uZ8zVMz5zcMNwnteMYxBet47h+kVUduxJjJS+cgMW7ayrna3Sf59/xznNb46IVMNcKrTZXGV1yTp70Z6CpZZYTroT4bV6VQEIIFPxxOFtDJws+vyFTkvva1j3bJ8XitCC4rqx3mJiD5Z3I7h+Jo4w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766546286; c=relaxed/simple; bh=po4eacbZrce7aS6SgmILgRp8m6QQIm+DmRBdVUyE5Ig=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=oK5Po7dVfHXwf3P0XQKoQBZ2CSfRMGVB7jwL5wdjXEtvWk9z0S/TsCO6456edR2IWu5YOfx3ejP1gaQViRW/oPIp3SydP0BWOuNecIogHATVR8yeWWpipqqJBwrXSnyUfrlC6hzgHr8ah948KzPfCDLZbpb39kwbflFxNDgMo5w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=A+K8c9eQ; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="A+K8c9eQ" X-UUID: 1fc0ed9ce07711f0b33aeb1e7f16c2b6-20251224 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=GtRRieOA2bdEtlgmQ2fSLI+37dnACje8UzGWR0JOd3U=; b=A+K8c9eQj7d+PxmoikUnJCy2EJf2pDvX1w/PjS0mTA2yu2jcpCwrTiYuRsZa0Z/WPK1cwEfrdt7IcmHtqLJnTMS6//DW6nyvYlfKc1oGl/RJXOAbg+jP7/cA7xSWVYdjOAuVki6dc55IMBssx90uzwhz7OdVt6PMykYZJmgbtgQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.9,REQID:8012a300-677c-43b5-8a4c-bf62bbec51b7,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:5047765,CLOUDID:cfc01b03-1fa9-44eb-b231-4afc61466396,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 1fc0ed9ce07711f0b33aeb1e7f16c2b6-20251224 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 608175768; Wed, 24 Dec 2025 11:17:48 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Wed, 24 Dec 2025 11:17:47 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 24 Dec 2025 11:17:46 +0800 From: Jianhua Lin To: , , , , , CC: , , , , , , , , , Jianhua Lin Subject: [PATCH v2 4/4] media: mediatek: jpeg: add compatible for MT8189 SoC Date: Wed, 24 Dec 2025 11:17:21 +0800 Message-ID: <20251224031721.9942-5-jianhua.lin@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251224031721.9942-1-jianhua.lin@mediatek.com> References: <20251224031721.9942-1-jianhua.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Compared to the previous generation IC, the MT8189 uses 34-bit iova address-space (16GB) and requires a single clock configuration. Therefore, add new compatible to support the JPEG encoder and decoder of MT8189 SoC. Signed-off-by: Jianhua Lin Reviewed-by: Nicolas Dufresne --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index d08fe365cbb2..9ea8d8f56e9b 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1866,6 +1866,10 @@ static struct clk_bulk_data mt8173_jpeg_dec_clocks[]= =3D { { .id =3D "jpgdec" }, }; =20 +static struct clk_bulk_data mtk_jpeg_dec_clocks[] =3D { + { .id =3D "jpgdec" }, +}; + static const struct mtk_jpeg_variant mt8173_jpeg_drvdata =3D { .clks =3D mt8173_jpeg_dec_clocks, .num_clks =3D ARRAY_SIZE(mt8173_jpeg_dec_clocks), @@ -1897,6 +1901,38 @@ static const struct mtk_jpeg_variant mtk_jpeg_drvdat= a =3D { .multi_core =3D false, }; =20 +static const struct mtk_jpeg_variant mtk8189_jpegenc_drvdata =3D { + .clks =3D mtk_jpeg_clocks, + .num_clks =3D ARRAY_SIZE(mtk_jpeg_clocks), + .formats =3D mtk_jpeg_enc_formats, + .num_formats =3D MTK_JPEG_ENC_NUM_FORMATS, + .qops =3D &mtk_jpeg_enc_qops, + .irq_handler =3D mtk_jpeg_enc_irq, + .hw_reset =3D mtk_jpeg_enc_reset, + .m2m_ops =3D &mtk_jpeg_enc_m2m_ops, + .dev_name =3D "mtk-jpeg-enc", + .ioctl_ops =3D &mtk_jpeg_enc_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_YUYV, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .support_34bit =3D true, +}; + +static const struct mtk_jpeg_variant mtk8189_jpegdec_drvdata =3D { + .clks =3D mtk_jpeg_dec_clocks, + .num_clks =3D ARRAY_SIZE(mtk_jpeg_dec_clocks), + .formats =3D mtk_jpeg_dec_formats, + .num_formats =3D MTK_JPEG_DEC_NUM_FORMATS, + .qops =3D &mtk_jpeg_dec_qops, + .irq_handler =3D mtk_jpeg_dec_irq, + .hw_reset =3D mtk_jpeg_dec_reset, + .m2m_ops =3D &mtk_jpeg_dec_m2m_ops, + .dev_name =3D "mtk-jpeg-dec", + .ioctl_ops =3D &mtk_jpeg_dec_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_YUV420M, + .support_34bit =3D true, +}; + static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata =3D { .formats =3D mtk_jpeg_enc_formats, .num_formats =3D MTK_JPEG_ENC_NUM_FORMATS, @@ -1936,6 +1972,14 @@ static const struct of_device_id mtk_jpeg_match[] = =3D { .compatible =3D "mediatek,mtk-jpgenc", .data =3D &mtk_jpeg_drvdata, }, + { + .compatible =3D "mediatek,mt8189-jpgenc", + .data =3D &mtk8189_jpegenc_drvdata, + }, + { + .compatible =3D "mediatek,mt8189-jpgdec", + .data =3D &mtk8189_jpegdec_drvdata, + }, { .compatible =3D "mediatek,mt8195-jpgenc", .data =3D &mtk8195_jpegenc_drvdata, --=20 2.45.2