From nobody Mon Feb 9 18:56:25 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F228332AADC for ; Wed, 24 Dec 2025 10:10:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766571052; cv=none; b=WKUfWshet9LE0+i+dwsABub8aFFbFGfDT6ZCNnEqxXJxLy5KcL4OdokHt7YQiAlno//MHvxWJY2lcjmB6W8vOZXKpuTOTqZioK67vyY4hlyGVtoU9ilwMb+3REYykir8eN535YJGu41MJ6oWQCgIQNNPWncNeidyRkDR/DPAJUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766571052; c=relaxed/simple; bh=Xnv/sBrBqHQV+BvV3+s0nYNYKZOsfD25aEwqAwM49rc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=aiE4lUhulxsZCTxr1T1Us4+Hw9SkpJ66OokakKsV+BdwVek3cj7NmQFCV/uKngzqfYZKoLsRxE16qaOWcYXEmbOk+Jx5CxgstnXn+PpY4wj1icatxz6X1+AWV8DokS84hDPLRYExY4Z01zJD8LrGttymkU1LljJrbpSD2zOT0ac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=d22GcvMT; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=K+NORuH+; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="d22GcvMT"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="K+NORuH+" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BO8EhvR721977 for ; Wed, 24 Dec 2025 10:10:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=XZ3FDxXMHarmPLEBVnXVNx 8cfejAj3WmwsVhyYVYA0k=; b=d22GcvMTuW6GfT9ArSoF4tG0CzRXGxnSx86DNH qpN/YlIXHkr/1u9GD+8EEDrYdjI0BT2nRMBzL+32iQLHqzhF/z53+H6dpzZOq4M2 7DfNzczJx+fiDZqE1tlgAUb+JaB/te4jY8d69ZGNHyJhS720MxUokVukXm3kXs3t zRmZz7YlqEZUR7g2jDlR6LdKmMYL1yufwIKLGV41nXpTq3lrrdAm61XSqSpWJ9+h KD/oMvD8QN0L+48UzpgSSMtzXFzVOk4JP+CwR8Bo/CkP61UCAQn/lW+vXwFrm+4C NloC+hKk4EdfjT4CNISwCtzOs3Oio+PmyErRsgzxvr2eWM3Q== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b81mt9wex-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 24 Dec 2025 10:10:49 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-34cc88eca7eso10485324a91.2 for ; Wed, 24 Dec 2025 02:10:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1766571048; x=1767175848; darn=vger.kernel.org; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:from:to:cc:subject:date:message-id:reply-to; bh=XZ3FDxXMHarmPLEBVnXVNx8cfejAj3WmwsVhyYVYA0k=; b=K+NORuH+LtcYooTScaqRNBOMA8VKodAeRFVOG+XucQ5hp8HTaYbi2Q+zgecAfaijJE ro3Ex+MztSArb9yU1OdGqniGKog96PV+LWiP+/2ASxtaxui6jhTPoV071nS/oJE5j6E5 w4zH47r+n46jC0dGS7cHpy5XavMQSvZ0uY+q3y6NU4bK5sQYFQrneFUyo6IZigTjpqGc HgW7WYnlmt4SnnhB4ALLDQzNNLfnF6mGO/ORl/z8aOprVf1iOR7rKiw1YzXEb1OhW5HL LAVBIEtE4l3JTdwYptzkWzBcJ0mN9q+VzrFdhxa6AyIeUUpLIbW5Ve0VQwEaidEWScrv xdQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766571048; x=1767175848; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=XZ3FDxXMHarmPLEBVnXVNx8cfejAj3WmwsVhyYVYA0k=; b=KJ2jh9mk6geuRMPdlr5XMFbCp3h/ov4B75Wo2Afg2dtmnZr/AZStwrgi7bLZoCYSdh 7lBkHPZtwn0KE3FJX/jAHPvADL9e3SLxTS6I0MB/NpELzaFPbI6yDToPKhXky77CBH4/ EID0cx6l/XfA5P9BtcOs9/kquDomRmsLaAQLoOwMwA9IbVj/kiupXI/HLHDHJ6fU2vue YRAtZzLRAHyX6V8uzyF2mlP5qFQy6jMejSULyWqcNcPAO+J90A6949cq9odmuf6WO18E I5pqp1Is6DTvRYqjLY3KRcv7mVskTefc+RZnyS2/CUO3fHleDseZeSBCio3vEUYUdgyx rP/Q== X-Forwarded-Encrypted: i=1; AJvYcCVmQSB85a4N0ptQESpLzbSukq4pa0llONwPHqWHgJ/NIzL/Kx2LpF7G0qNYA/7cxhcftQs1TWOFTfte0qU=@vger.kernel.org X-Gm-Message-State: AOJu0Yz8NS8GPMEk0TdaKdc2xYuMtbA/ZNZqWgv+gdNQGMJf96in0qGJ LusFmezqFwF4CqguluIyJEcfifb9VB8ZQlYsFv1v1IDAL6zgS0j5ApX5X4O5iWfJz2jzZSctwvw W/U3UuA37qm4lOucqBs/cn+FgZEI1s6Xm0i7fX37/quFu40gqeZU3JLODI7SQGzbAda9Vn6YsNt DIPg== X-Gm-Gg: AY/fxX41BFgWRzF3cbfkSFc/q4RWk4R2Ujs2GL7JvIP6diIeuOl3FNpb0+WhG4+LCv6 ceVDW6TJtNmu1D2i2P5Cjo6zAwSEtf0/XEMAIj1zeXF32wtMHWu+4FYTZHVqlT5WkqkBK1YP+kM XYOwC5Eqds23nApIwbpZ2SVhqTeE+BrqfS/jQpiLU65BxwCqK6rgy1uD5UurnEkbDeayo0fpPl4 ksAiQrjFL+kxD4tREXQsEDe2maZNR1putOSzney8hvtGMWtJ2bOUygqUpSOa9cXiYItSgUfmbx6 tWK/h11asQ4GWAh0ihqS8Ttlf+n5AzpAUOo8Q9wfJlknyXY+Bqu3+LvfCkPXSzxIl/guwp6K2Js aoDdb238H54Yu2LHNY6egr+F7h16eH8FeZ8kQKA2mCXX1r93jY/iJ50Ea X-Received: by 2002:a05:7022:f307:b0:11d:ef84:6cff with SMTP id a92af1059eb24-12172308947mr17530623c88.37.1766571048397; Wed, 24 Dec 2025 02:10:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IHqAiL4jHSU7/9+MwgxQ3qP3nId9JEayrA1C8JJppmIis0sasuK6f1Hyw36MlCj9gYMjatsdA== X-Received: by 2002:a05:7022:f307:b0:11d:ef84:6cff with SMTP id a92af1059eb24-12172308947mr17530605c88.37.1766571047809; Wed, 24 Dec 2025 02:10:47 -0800 (PST) Received: from hu-qianyu-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-121724cfd95sm64523514c88.1.2025.12.24.02.10.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Dec 2025 02:10:47 -0800 (PST) From: Qiang Yu Date: Wed, 24 Dec 2025 02:10:46 -0800 Subject: [PATCH] PCI: dwc: Remove duplicate dw_pcie_ep_hide_ext_capability() function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251224-remove_dw_pcie_ep_hide_ext_capability-v1-1-4302c9cdc316@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIACW8S2kC/x2NwQqDMBAFf0X23IBJlEJ/pZRlTbb1QashEWsR/ 93Q0zCXmZ2KZmihW7NT1hUF81TFXhoKo0wvNYjVybWut851JutnXpXjl1OAsiYeESu3hYMkGfD G8jM+DmL79ireW6qtlPWJ7f+5P47jBBFpZ2p3AAAA X-Change-ID: 20251224-remove_dw_pcie_ep_hide_ext_capability-3dba1507a331 To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Heiko Stuebner Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Niklas Cassel , Qiang Yu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766571047; l=4607; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=Xnv/sBrBqHQV+BvV3+s0nYNYKZOsfD25aEwqAwM49rc=; b=buJx2QJGgffIcLDxa1NPfng5yROlUFJRA1KD//+D3k35OGdkRjY7fl+/aSQpupAMdmodeo8mk XUZ/mNu/OGhD5/2s4OrjIWfRFxaLN8TJIX8z3mhsq7r7326qt3Wd3GU X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Authority-Analysis: v=2.4 cv=e/ILiKp/ c=1 sm=1 tr=0 ts=694bbc29 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Svf4W_lptdzYmPpfBLsA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-GUID: VG1I1cnnkEC_bEw0fHZ8rodHCDWWQaVT X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjI0MDA4NyBTYWx0ZWRfX7joVN6bITFsi UmgXz/Kh67COCcUOVgvSGEfKJ12y3g69VmL0cAVCi9nrmdoSdq8iI3q7UjPF90B69rLmvOYkQ94 rzGM2a01t9O/era6m8LzUhqPEna3atTQkLqFs9LNvR7g/MaUrhfJR8DA+miPC6pUwSLFxabG+GO R/m3onccPd8PzfTrXBfENBXzwVltc8BBa7AzLzOPW64NF2a+UcvJ0zJhCYWCfZzp9azSlOi4KP9 OzvaTvGhbb2bwxNC5KGN/VuEfORGoGngbaq3Z2S1ySEx5GDSc6r8ynLNLB/Up0Xc0C4zHB6qjMs Xd/UTzEzI5qzGq+WUtCyl5FEeGM6Pj2gDx8O/GoClxIklPF7FctuKRLRFeOg41AQV1QO8YprV9/ Oz2HJjF/0S6dcgPnrm3gJczU/NgxF/jeIf+KSN7c2sE4ShmXN6sJBuh0p/7CUPTiE7o349vHSxi bz6USM0P/ggS8hcwhhA== X-Proofpoint-ORIG-GUID: VG1I1cnnkEC_bEw0fHZ8rodHCDWWQaVT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-24_03,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 phishscore=0 adultscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512240087 Remove dw_pcie_ep_hide_ext_capability() and replace its usage with dw_pcie_remove_ext_capability(). Both functions serve the same purpose of hiding PCIe extended capabilities, but dw_pcie_remove_ext_capability() provides a cleaner API that doesn't require the caller to specify the previous capability ID. Compile-tested only. Runtime testing on RK3588 hardware would be appreciated. Suggested-by: Niklas Cassel Signed-off-by: Qiang Yu Tested-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-designware-ep.c | 39 ---------------------= ---- drivers/pci/controller/dwc/pcie-designware.h | 7 ----- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 4 +-- 3 files changed, 1 insertion(+), 49 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 1195d401df19eafbab2fb267f5cda3c24ecdfbd1..cfd59899c7b85fd0dddc9c6ce6b= 9c9fed84ad7a3 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -75,45 +75,6 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie_ep *= ep, u8 func_no, u8 cap) cap, NULL, ep, func_no); } =20 -/** - * dw_pcie_ep_hide_ext_capability - Hide a capability from the linked list - * @pci: DWC PCI device - * @prev_cap: Capability preceding the capability that should be hidden - * @cap: Capability that should be hidden - * - * Return: 0 if success, errno otherwise. - */ -int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci, u8 prev_cap, u8 ca= p) -{ - u16 prev_cap_offset, cap_offset; - u32 prev_cap_header, cap_header; - - prev_cap_offset =3D dw_pcie_find_ext_capability(pci, prev_cap); - if (!prev_cap_offset) - return -EINVAL; - - prev_cap_header =3D dw_pcie_readl_dbi(pci, prev_cap_offset); - cap_offset =3D PCI_EXT_CAP_NEXT(prev_cap_header); - cap_header =3D dw_pcie_readl_dbi(pci, cap_offset); - - /* cap must immediately follow prev_cap. */ - if (PCI_EXT_CAP_ID(cap_header) !=3D cap) - return -EINVAL; - - /* Clear next ptr. */ - prev_cap_header &=3D ~GENMASK(31, 20); - - /* Set next ptr to next ptr of cap. */ - prev_cap_header |=3D cap_header & GENMASK(31, 20); - - dw_pcie_dbi_ro_wr_en(pci); - dw_pcie_writel_dbi(pci, prev_cap_offset, prev_cap_header); - dw_pcie_dbi_ro_wr_dis(pci); - - return 0; -} -EXPORT_SYMBOL_GPL(dw_pcie_ep_hide_ext_capability); - static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfu= nc_no, struct pci_epf_header *hdr) { diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/con= troller/dwc/pcie-designware.h index 3a81d46e60b00f7cb92d9634eba6708244bce976..c5fff03073ea3945a5c38b16268= 38c6a67d21c57 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -909,7 +909,6 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8= func_no, int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no, u16 interrupt_num); void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar); -int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci, u8 prev_cap, u8 ca= p); struct dw_pcie_ep_func * dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no); #else @@ -967,12 +966,6 @@ static inline void dw_pcie_ep_reset_bar(struct dw_pcie= *pci, enum pci_barno bar) { } =20 -static inline int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci, - u8 prev_cap, u8 cap) -{ - return 0; -} - static inline struct dw_pcie_ep_func * dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no) { diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/co= ntroller/dwc/pcie-dw-rockchip.c index 352f513ebf0363ff0ec79fdd8d8b245eeb28474c..77c4e6a4ddead91fe12eb6c727e= 77350207ef5fa 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -347,9 +347,7 @@ static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588= (struct dw_pcie_ep *ep) if (!of_device_is_compatible(dev->of_node, "rockchip,rk3588-pcie-ep")) return; =20 - if (dw_pcie_ep_hide_ext_capability(pci, PCI_EXT_CAP_ID_SECPCI, - PCI_EXT_CAP_ID_ATS)) - dev_err(dev, "failed to hide ATS capability\n"); + dw_pcie_remove_ext_capability(pci, PCI_EXT_CAP_ID_ATS); } =20 static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) --- base-commit: 37781eb814e16c75abb78dec2f9412d2e4d88298 change-id: 20251224-remove_dw_pcie_ep_hide_ext_capability-3dba1507a331 Best regards, --=20 Qiang Yu