From nobody Sun Feb 8 13:17:07 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 536272C3244; Tue, 23 Dec 2025 16:28:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507328; cv=none; b=HkKakANpDcxofCF5eiVT2m2BuZVqPub6FmzxABBEP3sTf6Jv0jT8JkoR/xsTVfYO4a6xv0MPKfhspzEBaqPyIvgNQpfWdplWAOytR5RAr5RZ9+5tpTmMbRVhTxnT5kk6WsLYdqR5vFKCr4B5oW1Q5EadbtwyhGzt8VH7GX+8jiw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507328; c=relaxed/simple; bh=BSsEJxgd8NCNGQR41Rzr1FEvc1jIP1AIAushA+zKdDc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hHI8gh2lsBpNNOgUJFH4ze8J93wyU/iYUpU5B4c/bXzIrRmofiurCzSvTyT9HeccB9l00TBqDL13yLF/WEZF7UWeKQepg6WdFz3+rz5Rfj5kQgSrpUCdmIZ0vY9jJbtjMxNMWuVVLPFgpFjmMi/vUV97mZDFUKLuFwJnva+0QTU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=yWHopKvJ; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="yWHopKvJ" Received: from localhost.localdomain (xcpe-178-82-120-96.dyn.res.sunrise.net [178.82.120.96]) by mail11.truemail.it (Postfix) with ESMTPA id 053571FE0B; Tue, 23 Dec 2025 17:28:41 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1766507322; bh=3oK1IffVG2CPnfvTGGdHy1OT+9sPDiuPZUecdFiwUmc=; h=From:To:Subject; b=yWHopKvJ1ptTLiqfw4v4LBpnD+S2pdhJJKyNhjR4xzwz0wrIOVnUGF/XltwLsQPZA BnSn8AF/kFimgsAwGbvMRMECRan4kHFbZPpOsZEfP0+vG1fYHCABlJSeDwG0uDncBQ O0Y9+9wDibPktgFY0GXUfe+OIWM3BVyj7IJ84EZrntUwu/oSaVo77M1IBBjemguU0r d97v627XQZKWQ2CxkFV7yzszYdujwJTf2JRBfkIvrTd2D/53ZXINjr1x3hCNvt+n2i ROXcczZmbrpMiw8vOqyVYu6zH/vaAw8hVnFcqx1gw3sbGOLDyZXr/lLt0P+5QMMORD gCn0/oDUL4KTw== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Francesco Dolcini , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 1/4] dt-bindings: arm: fsl: Add Apalis iMX8QP Date: Tue, 23 Dec 2025 17:28:27 +0100 Message-ID: <20251223162833.138286-2-francesco@dolcini.it> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251223162833.138286-1-francesco@dolcini.it> References: <20251223162833.138286-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Francesco Dolcini Add binding documentation for the Apalis iMX8QP SoM mated with Apalis Ixora and Apalis Evaluation board. Apalis iMX8QP is a variant of the Apalis iMX8QM, using an NXP i.MX8QP SoC instead of the i.MX8QM. The two SoCs are pin to pin compatible, with the i.MX8QP being a lower end variant, with a slower GPU and one Cortex A72 core instead of two. The two Apalis SoMs variants share the same schematics and PCB, and the iMX8QP variant exists only on revision V1.1 of board. Link: https://www.nxp.com/products/i.MX8 Link: https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx= -8 Signed-off-by: Francesco Dolcini Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 68a2d5fecc43..611fe36c2884 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1333,7 +1333,7 @@ properties: - const: toradex,apalis-imx8 - const: fsl,imx8qm =20 - - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules + - description: i.MX8QM/i.MX8QP Boards with Toradex Apalis iMX8 V1.1 = Modules items: - enum: - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Mod= ule on Apalis Eval. V1.0/V1.1 Board @@ -1341,7 +1341,9 @@ properties: - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Mod= ule on Ixora V1.1 C. Board - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Mod= ule on Ixora V1.2 C. Board - const: toradex,apalis-imx8-v1.1 - - const: fsl,imx8qm + - enum: + - fsl,imx8qm + - fsl,imx8qp =20 - description: i.MX8QXP based Boards items: --=20 2.47.3 From nobody Sun Feb 8 13:17:07 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 197F133A9D7; Tue, 23 Dec 2025 16:28:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507329; cv=none; b=hq2EBez9CP/OFj+wvGkym7LXnzxfcc2yGttKzjp1kfoWMddWr23/B4XBaL3fGbfZibCb3DNykVLw8JuITSTpQIaV+oaSGH7y+GOKzlmgtA7R0ACgpOyAzQqnshxzMucUKSJU83BqgQ1tETsIPF/s+O8tPvS5qjrXp7q3KnjKXyY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507329; c=relaxed/simple; bh=hyau1PCbq35CfU2gKLl0cZE5KAGycWiD9MwmSCBDVUU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DU8kMGGnAjBpjC37drvYgUCRo5Jqb8/xPVm5IzcNB3A8zbvlry/oUNBATZX24FOUSt77amwYWUz6bDcaJ33p3IbFcNgmyY2PaxI9sUm/xSyp3G/05dl1uJVv3VlnT5mRKiyYoORRu+6etP5l+PKwQl7t92TFhBK0V0b1ZV6g3kg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=S2anlDl2; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="S2anlDl2" Received: from localhost.localdomain (xcpe-178-82-120-96.dyn.res.sunrise.net [178.82.120.96]) by mail11.truemail.it (Postfix) with ESMTPA id 9FF411FE0C; Tue, 23 Dec 2025 17:28:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1766507323; bh=jnFb/IX3ljIxWsMngTBtcXekODzwjzg+jILeoqFZb7A=; h=From:To:Subject; b=S2anlDl21dcTQau6eVPjl9xfm98B/lT5hXIhlsNDw+YCmSzVqh/82dBzXtuiRpek0 gxxG7kCCG2MMFLpVrb0PvH79UaSokk3e3OwPDeXPi85rMqaofOdScXk8Fmcq//uzYH EoODPGEwmFHmKR28fGMo/esPiE7QUN4HFOTQvzAN3WfHI7rd9Rjwm3A9n9S1PvSNXn 20OzctLHbbRyOsBw/aEcRh8dwoge05h5KAmnbmCIhoulTXix7pbv4hwXSFq+eMOjzb qFK9vUakDsxxSwz9S7eVBjm477JXAjq6JxsqODgUAoFss7KJ/CKWjSTFAvsILzgQXR /uYp667RrzdCA== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Francesco Dolcini , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 2/4] arm64: dts: imx8qm: Add CPU cluster labels Date: Tue, 23 Dec 2025 17:28:28 +0100 Message-ID: <20251223162833.138286-3-francesco@dolcini.it> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251223162833.138286-1-francesco@dolcini.it> References: <20251223162833.138286-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Francesco Dolcini Add labels to the cpu cluster nodes to prepare for the addition of the i.MX8QP SoC in which these nodes would need to be adjusted from another DT file. Signed-off-by: Francesco Dolcini --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dt= s/freescale/imx8qm.dtsi index cb66853b1cd3..e0046f798eca 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -38,7 +38,7 @@ cpus { #size-cells =3D <0>; =20 cpu-map { - cluster0 { + cluster0: cluster0 { core0 { cpu =3D <&A53_0>; }; @@ -53,7 +53,7 @@ core3 { }; }; =20 - cluster1 { + cluster1: cluster1 { core0 { cpu =3D <&A72_0>; }; --=20 2.47.3 From nobody Sun Feb 8 13:17:07 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8077B33C520; Tue, 23 Dec 2025 16:28:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507327; cv=none; b=S6cHVi8twfjcKeXwgWC9boz3V0NeYLcVbYbQWmaXh1dMtjMz5v8nuwhKWgE4VyWvsD+Y83qSwyPP6y4M8KzV+cQhdQfisQvs50M8Ii4nRW9FiFewz8G8HA0nyts9oWXfzlZqjzurC4Kkkv5wqkGdCBnKL1PVTKwD8JNevadyqMA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507327; c=relaxed/simple; bh=ghbFggSrZg+jlnLOMRMCr3H0zcTIySHg25pJyjn+YrM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TpKiAPw8zsg6fS2GDnkvOvy1pmlaW1I6pB1vHhRRd6vh0aOM/ndeYu0oMVeQH5+iLEy/9f2xyQeaKCNCQxMO2+WZIfbXm6G5Fc9/pCANSRMd/gE8BwlHxd0igzWmX/yOUqzrdR8AaOFPU3BTE4nxSAscqeC8WNMFLdHmSTEDS0I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=w/FkMiIp; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="w/FkMiIp" Received: from localhost.localdomain (xcpe-178-82-120-96.dyn.res.sunrise.net [178.82.120.96]) by mail11.truemail.it (Postfix) with ESMTPA id 360AA1FE66; Tue, 23 Dec 2025 17:28:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1766507323; bh=WRrkmvhzu2YQMk3bdMEXXwokIel0iB14JRo8xu+Pvg0=; h=From:To:Subject; b=w/FkMiIp2fwdn7DuybuT8W46jKLSkE9gX+eGG28zg0ZSuzfdy+wWDyTTg2sm5/xki yDhCisMNpzc7h9EaDJketXxAD8qrv/2FivO0aj7zmiqVNT41fY9yF+IcI6itGSdA0N WbZGsEltrKb3OhNvMDMIJsQEFSeFTk/Q4QtfiwTnbNbaGbMowrtD+HjJXn6No6Wb91 ozaSimlRej36EWQKsgXutNC68m4FVoBhqYfPcN3jLY2v79uQIzs1+hTJEgixBDs9VL E7SI5O5HiFKQfbeF0MwfLU+z0LOgFtEYF4/pD10Ly41i7oz5bN0AyMODu9VHkv05QK JL2r/R9TgRrXA== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Francesco Dolcini , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 3/4] arm64: dts: freescale: Add NXP i.MX8QP SoC dtsi Date: Tue, 23 Dec 2025 17:28:29 +0100 Message-ID: <20251223162833.138286-4-francesco@dolcini.it> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251223162833.138286-1-francesco@dolcini.it> References: <20251223162833.138286-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Francesco Dolcini Add support for NXP i.MX8QP SoC, this is pin to pin compatible variant of the i.MX8QM, with a slower GPU and one Cortex A72 core instead of two. Link: https://www.nxp.com/products/i.MX8 Signed-off-by: Francesco Dolcini --- arch/arm64/boot/dts/freescale/imx8qp.dtsi | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qp.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8qp.dtsi b/arch/arm64/boot/dt= s/freescale/imx8qp.dtsi new file mode 100644 index 000000000000..26af9c5a51c5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) + +#include "imx8qm.dtsi" + +/delete-node/ &A72_1; + +&cluster1 { + /delete-node/ core1; +}; + +&gpu_3d0 { + assigned-clock-rates =3D <625000000>, <625000000>; +}; + +&thermal_zones { + cpu1-thermal { + cooling-maps { + map0 { + cooling-device =3D + <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; --=20 2.47.3 From nobody Sun Feb 8 13:17:07 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0148F33F8BD; Tue, 23 Dec 2025 16:28:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507330; cv=none; b=owkC8L7pKXRogiGKY/pMnY+Zcx5bS+osHhQ9LfW4qCwu0BKPf2vTBvj7+pSl1oO/vsVuAEmOpJEAr27wJZgBqshFb8Pa25rGQO859IAGbksI69zCPQt8WZFL62HKo5pRKCma0lL2iwtyNa3B3xRi4sDui0ZhQDmccoFhZgOPnWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766507330; c=relaxed/simple; bh=CHvs9LJpxYCd2EIw2XM9AxKgdY1E/pkVHpW1EDLkcyk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j/ITxqsxGCOXh+TaQ07yMx1Q6+MV9Zl7wjMKy7INw0G2Z2oRDid3UmqGLt390mLxog7lVEzPGseYLiM3mfLQ77sQqK51+wGw+T89s0uK/2HH2qjra/e16so57ZQ3eewdnb2kWDRGAwHj6SAAzEK6R/uHtEgPOHuhJpRYSOfVfD0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=p7WQcdd+; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="p7WQcdd+" Received: from localhost.localdomain (xcpe-178-82-120-96.dyn.res.sunrise.net [178.82.120.96]) by mail11.truemail.it (Postfix) with ESMTPA id D7ED61FE21; Tue, 23 Dec 2025 17:28:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1766507324; bh=c9uSdWg2W+/jZzpQme78vy46Hfh/geU/9mPnscNwTkg=; h=From:To:Subject; b=p7WQcdd+5mSMJcHI4K53cxzrnluu16Blo5CeVgl7zeD5vaGHGcKO64GKoKq0pNkw3 OnRW73XC0twTfHF3Av8v4l7AGqPlf/SucPo4fEvOMX0InEjrYb1e7Q3W1p+K0WHOW0 brxTy5AYkkc9IsiAR1QA2/B9Zi1uhzIYarSV+xs0wBXrYQVWHA1QZWeolt+g3HHrXe tLkPVx/slXzzv/mZa1myRhnygO77rrvwtUYWaoV20X9bn1EmvT3Ts9kiynYYicZWCs 7CqnT3iUIn0GGiTQp8hebsBmU6lYbcuWIQJb+FfxcXZwgHxizJheqGi5WHqze9v9Sq 2FNAY80a3Noig== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Francesco Dolcini , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 4/4] arm64: dts: freescale: Add Apalis iMX8QP Date: Tue, 23 Dec 2025 17:28:30 +0100 Message-ID: <20251223162833.138286-5-francesco@dolcini.it> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251223162833.138286-1-francesco@dolcini.it> References: <20251223162833.138286-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Francesco Dolcini Add support for the Apalis iMX8QP SoM mated with Apalis Ixora and Apalis Evaluation board. Apalis iMX8QP is a variant of the Apalis iMX8QM, using an NXP i.MX8QP SoC instead of the i.MX8QM. The two SoCs are pin to pin compatible, with the i.MX8QP being a lower end variant, with a slower GPU and one Cortex A72 core instead of two. The two Apalis SoMs variants share the same schematics and PCB, and the iMX8QP variant exists only on revision V1.1 of board. Link: https://www.nxp.com/products/i.MX8 Link: https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx= -8 Signed-off-by: Francesco Dolcini --- arch/arm64/boot/dts/freescale/Makefile | 5 ++++ .../imx8qp-apalis-v1.1-eval-v1.2.dts | 26 +++++++++++++++++++ .../dts/freescale/imx8qp-apalis-v1.1-eval.dts | 16 ++++++++++++ .../imx8qp-apalis-v1.1-ixora-v1.1.dts | 16 ++++++++++++ .../imx8qp-apalis-v1.1-ixora-v1.2.dts | 16 ++++++++++++ .../dts/freescale/imx8qp-apalis-v1.1.dtsi | 16 ++++++++++++ 6 files changed, 95 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval-v= 1.2.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval.d= ts create mode 100644 arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-= v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-= v1.2.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index f30d3fd724d0..61c7f0383f91 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -350,6 +350,11 @@ dtb-${CONFIG_ARCH_MXC} +=3D imx8qm-mek-ov5640-csi1.dtb imx8qm-mek-ov5640-dual-dtbs :=3D imx8qm-mek.dtb imx8qm-mek-ov5640-csi0.dtb= o imx8qm-mek-ov5640-csi1.dtbo dtb-${CONFIG_ARCH_MXC} +=3D imx8qm-mek-ov5640-dual.dtb =20 +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qp-apalis-v1.1-eval.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qp-apalis-v1.1-eval-v1.2.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qp-apalis-v1.1-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qp-apalis-v1.1-ixora-v1.2.dtb + dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-aster.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-eval-v3.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval-v1.2.dts= b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval-v1.2.dts new file mode 100644 index 000000000000..b5318de67cb0 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval-v1.2.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2024 Toradex + */ + +/dts-v1/; + +#include "imx8qp-apalis-v1.1.dtsi" +#include "imx8-apalis-eval-v1.2.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QP V1.1 on Apalis Evaluation Board V1.2"; + compatible =3D "toradex,apalis-imx8-v1.1-eval-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qp"; +}; + +/* Apalis MMC1 */ +&usdhc2 { + /delete-property/ no-1-8-v; +}; + +/* Apalis SD1 */ +&usdhc3 { + /delete-property/ no-1-8-v; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval.dts b/ar= ch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..d558cff2582f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qp-apalis-v1.1.dtsi" +#include "imx8-apalis-eval-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QP V1.1 on Apalis Evaluation Board"; + compatible =3D "toradex,apalis-imx8-v1.1-eval", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.1.dt= s b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.1.dts new file mode 100644 index 000000000000..a73a6324f552 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qp-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QP V1.1 on Apalis Ixora V1.1 Carrier Board"; + compatible =3D "toradex,apalis-imx8-v1.1-ixora-v1.1", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dt= s b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts new file mode 100644 index 000000000000..71568d7ec8e5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qp-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.2.dtsi" + +/ { + model =3D "Toradex Apalis iMX8QP V1.1 on Apalis Ixora V1.2 Carrier Board"; + compatible =3D "toradex,apalis-imx8-v1.1-ixora-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1.dtsi b/arch/a= rm64/boot/dts/freescale/imx8qp-apalis-v1.1.dtsi new file mode 100644 index 000000000000..1e5311512344 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include "imx8qp.dtsi" +#include "imx8-apalis-v1.1.dtsi" + +&cooling_maps_map0 { + cooling-device =3D + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +}; --=20 2.47.3