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([2a02:2f04:620a:8300:4258:c40f:5faf:7af5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d192e88f5sm237921025e9.0.2025.12.23.05.50.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Dec 2025 05:50:40 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: vkoul@kernel.org, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com, geert+renesas@glider.be, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: claudiu.beznea@tuxon.dev, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v6 1/8] dmaengine: sh: rz-dmac: Protect the driver specific lists Date: Tue, 23 Dec 2025 15:49:45 +0200 Message-ID: <20251223134952.460284-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251223134952.460284-1-claudiu.beznea.uj@bp.renesas.com> References: <20251223134952.460284-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The driver lists (ld_free, ld_queue) are used in rz_dmac_free_chan_resources(), rz_dmac_terminate_all(), rz_dmac_issue_pending(), and rz_dmac_irq_handler_thread(), all under the virtual channel lock. Take the same lock in rz_dmac_prep_slave_sg() and rz_dmac_prep_dma_memcpy() as well to avoid concurrency issues, since these functions also check whether the lists are empty and update or remove list entries. Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea --- Changes in v6: - none Changes in v5: - none, this patch is new drivers/dma/sh/rz-dmac.c | 57 ++++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 25 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 9e5f088355e2..c8e3d9f77b8a 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -10,6 +10,7 @@ */ =20 #include +#include #include #include #include @@ -448,6 +449,7 @@ static int rz_dmac_alloc_chan_resources(struct dma_chan= *chan) if (!desc) break; =20 + /* No need to lock. This is called only for the 1st client. */ list_add_tail(&desc->node, &channel->ld_free); channel->descs_allocated++; } @@ -503,18 +505,21 @@ rz_dmac_prep_dma_memcpy(struct dma_chan *chan, dma_ad= dr_t dest, dma_addr_t src, dev_dbg(dmac->dev, "%s channel: %d src=3D0x%pad dst=3D0x%pad len=3D%zu\n", __func__, channel->index, &src, &dest, len); =20 - if (list_empty(&channel->ld_free)) - return NULL; + scoped_guard(spinlock_irqsave, &channel->vc.lock) { + if (list_empty(&channel->ld_free)) + return NULL; + + desc =3D list_first_entry(&channel->ld_free, struct rz_dmac_desc, node); =20 - desc =3D list_first_entry(&channel->ld_free, struct rz_dmac_desc, node); + desc->type =3D RZ_DMAC_DESC_MEMCPY; + desc->src =3D src; + desc->dest =3D dest; + desc->len =3D len; + desc->direction =3D DMA_MEM_TO_MEM; =20 - desc->type =3D RZ_DMAC_DESC_MEMCPY; - desc->src =3D src; - desc->dest =3D dest; - desc->len =3D len; - desc->direction =3D DMA_MEM_TO_MEM; + list_move_tail(channel->ld_free.next, &channel->ld_queue); + } =20 - list_move_tail(channel->ld_free.next, &channel->ld_queue); return vchan_tx_prep(&channel->vc, &desc->vd, flags); } =20 @@ -530,27 +535,29 @@ rz_dmac_prep_slave_sg(struct dma_chan *chan, struct s= catterlist *sgl, int dma_length =3D 0; int i =3D 0; =20 - if (list_empty(&channel->ld_free)) - return NULL; + scoped_guard(spinlock_irqsave, &channel->vc.lock) { + if (list_empty(&channel->ld_free)) + return NULL; =20 - desc =3D list_first_entry(&channel->ld_free, struct rz_dmac_desc, node); + desc =3D list_first_entry(&channel->ld_free, struct rz_dmac_desc, node); =20 - for_each_sg(sgl, sg, sg_len, i) { - dma_length +=3D sg_dma_len(sg); - } + for_each_sg(sgl, sg, sg_len, i) + dma_length +=3D sg_dma_len(sg); =20 - desc->type =3D RZ_DMAC_DESC_SLAVE_SG; - desc->sg =3D sgl; - desc->sgcount =3D sg_len; - desc->len =3D dma_length; - desc->direction =3D direction; + desc->type =3D RZ_DMAC_DESC_SLAVE_SG; + desc->sg =3D sgl; + desc->sgcount =3D sg_len; + desc->len =3D dma_length; + desc->direction =3D direction; =20 - if (direction =3D=3D DMA_DEV_TO_MEM) - desc->src =3D channel->src_per_address; - else - desc->dest =3D channel->dst_per_address; + if (direction =3D=3D DMA_DEV_TO_MEM) + desc->src =3D channel->src_per_address; + else + desc->dest =3D channel->dst_per_address; + + list_move_tail(channel->ld_free.next, &channel->ld_queue); + } =20 - list_move_tail(channel->ld_free.next, &channel->ld_queue); return vchan_tx_prep(&channel->vc, &desc->vd, flags); } =20 --=20 2.43.0