From nobody Sun Feb 8 22:06:14 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D161830BB9E; Tue, 23 Dec 2025 12:38:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766493492; cv=none; b=NuTZkTXqJUrAbebjuneuV1M1gZvNSUVpxgqOD2jgcAEGoU+pxnilyxZikrRg/dnjv4oCQR7dy9sYpR3PIfaH8la8r0/XkmOuwAhqH5MDyXN3NH+NSR+mrugyK6MDD420TURaTQug0IGomaJxdFd/2CiuYXOutTP3N6vtW1oapzs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766493492; c=relaxed/simple; bh=ig1Lr+RvBmIPrsUe9qrlLWnA4rOxINE6iuKtD16zMxA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TYsAfCefMOk5yIBwMKYVgOrRPErmF+qd7ViUr3RZxojzMH7g9NN8AxK4oNOZDGoACOpXYY+qhW+fh06/dZKx58nZlvj0F4DMQXOT0l0vEw50C0AAA9+NXEIYMHQmJ8xvmrz0lHMcvDN7BFHomwyxv9WdQPrkDvNOv6RvA9a6gVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=E5CnvY/q; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="E5CnvY/q" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1766493488; bh=ig1Lr+RvBmIPrsUe9qrlLWnA4rOxINE6iuKtD16zMxA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=E5CnvY/qgOB5FTxNe4oGMMZiuLLWKG33xHEumbA0TcRPf6mhjALCuyvzP3nfVzAhs JDx1L94IgaJhCha1dCMNOT7UpzpIfxZfbFJEeoyTCeX39F7oS3KOzGxOfoPx3IcvvQ vczhxLumwgDsEUqb1IpUCi+XpoQuj6cRYPcjtv1s1xQZc6WD9POG64CH1Hy1VYBzBT 7x1m1xUazzTfF5pn7mSjBC32LZrf6JMSDBajyBjj67oPh0skILstWHj/ZiJ2uT/Ikp F8US3PdthbvVOp24Xt6YpQ2aTOBviO4w95mnKIBCRxLc1jYpOOysvVX4fvWBprCfX1 UISi5YDScufxQ== Received: from beast.luon.net (simons.connected.by.freedominter.net [45.83.240.172]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sjoerd) by bali.collaboradmins.com (Postfix) with ESMTPSA id A191517E1423; Tue, 23 Dec 2025 13:38:08 +0100 (CET) Received: by beast.luon.net (Postfix, from userid 1000) id 527BA117A0673; Tue, 23 Dec 2025 13:38:08 +0100 (CET) From: Sjoerd Simons Date: Tue, 23 Dec 2025 13:37:53 +0100 Subject: [PATCH v5 3/8] arm64: dts: mediatek: mt7981b-openwrt-one: Enable PCIe and USB Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251223-openwrt-one-network-v5-3-7d1864ea3ad5@collabora.com> References: <20251223-openwrt-one-network-v5-0-7d1864ea3ad5@collabora.com> In-Reply-To: <20251223-openwrt-one-network-v5-0-7d1864ea3ad5@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Lee Jones , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lorenzo Bianconi , Felix Fietkau Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, netdev@vger.kernel.org, Daniel Golle , Bryan Hinton , Sjoerd Simons X-Mailer: b4 0.14.3 Enable the PCIe controller and USB3 XHCI host on the OpenWrt One board. The USB controller is configured for USB 2.0 only mode, as the shared USB3/PCIe PHY is dedicated to PCIe functionality on this board. Signed-off-by: Sjoerd Simons --- .../boot/dts/mediatek/mt7981b-openwrt-one.dts | 43 ++++++++++++++++++= ++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts b/arch/ar= m64/boot/dts/mediatek/mt7981b-openwrt-one.dts index 2e39e7287730..7382599cfea2 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts +++ b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts @@ -67,9 +67,40 @@ led-2 { linux,default-trigger =3D "netdev"; }; }; + + reg_3p3v: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-5V"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins>; + status =3D "okay"; }; =20 &pio { + pcie_pins: pcie-pins { + mux { + function =3D "pcie"; + groups =3D "pcie_pereset"; + }; + }; + pwm_pins: pwm-pins { mux { function =3D "pwm"; @@ -163,3 +194,15 @@ partition@180000 { &uart0 { status =3D "okay"; }; + +&usb_phy { + status =3D "okay"; +}; + +&xhci { + phys =3D <&u2port0 PHY_TYPE_USB2>; + vusb33-supply =3D <®_3p3v>; + vbus-supply =3D <®_5v>; + mediatek,u3p-dis-msk =3D <0x01>; + status =3D "okay"; +}; --=20 2.51.0