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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1217254cd77sm56931833c88.14.2025.12.23.01.14.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Dec 2025 01:14:18 -0800 (PST) From: Jingyi Wang Date: Tue, 23 Dec 2025 01:13:47 -0800 Subject: [PATCH v3 1/5] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251223-knp-remoteproc-v3-1-5b09885c55a5@oss.qualcomm.com> References: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> In-Reply-To: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jingyi Wang X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766481257; l=1292; i=jingyi.wang@oss.qualcomm.com; s=20250911; h=from:subject:message-id; bh=xT3Z0RX9zoOKMq7jFVYf2pwqfhxYhtw1nSQ1v0B4npw=; b=es02FZMS4tTBwODpq5fH3Ay/WKnYn0r2xil6rHTrDlUYq5FIP7A1UMfSWmeszR0Ssmuzkb4la 29CTURKcFHQACAdeLe9c9FGGPNGsgqpIY9js82ujlYkXFnQFmIS7gLK X-Developer-Key: i=jingyi.wang@oss.qualcomm.com; a=ed25519; pk=PSoHZ6KbUss3IW8FPRVMHMK0Jkkr/jV347mBYJO3iLo= X-Proofpoint-ORIG-GUID: idyRgTLyyltmDjaC_X3C1gdgrGyAaEDv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDA3NCBTYWx0ZWRfX7qThZH32FV87 glwkkRA/plZ+xbQCoJGR7CcYc5tiPgk7VXE0E9g3oRyHUFMqKdw6dEyqnIyoLYnb2/IUgQetUCU vSU5tZa9iBV2EpskYNBjHQE2D+Xd5OwmUGdd3hVPxbfhVVxvsdAmaLc6eFiF8/Di/wHlG2AgNxQ 5B9gCiggKcbsMPJIfpvsRzzrshsOFwZKEc3Lg+B6HY9uRVNMwPCIgl4psRM8vONcVF9sbUWctqJ P13baUx5wiXlv78kvtloA4hJF3/q+U7Q1vLsW5tzMWHMmOL4IYTUIcRPH2zTMjMuVI0gcyLKOU4 6YWvsWcfTN+AXT6HBNscIqqMqeZdm+3dqMYpAX0z7YaBl47B7UmYiRiI5TIDtfaFBSf4X/RJsg8 2q8hUYguX64r/picPloa0mL53C/j/hRxkOmem04vRP0Z3U3h4UvyPwrpHQw8U74JU8hO8aE8Cr+ XZJIKp/YaGsmbMV9EIw== X-Proofpoint-GUID: idyRgTLyyltmDjaC_X3C1gdgrGyAaEDv X-Authority-Analysis: v=2.4 cv=NZDrFmD4 c=1 sm=1 tr=0 ts=694a5d6c cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=7zWBZCs1gTFKjwm3VpwA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-23_02,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 impostorscore=0 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230074 Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully compatible with SM8750, which can fallback to SM8550 except for one more interrupt ("shutdown-ack"). Signed-off-by: Jingyi Wang Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml index 2dd479cf4821..31dffd02125a 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -28,7 +28,9 @@ properties: - qcom,x1e80100-adsp-pas - qcom,x1e80100-cdsp-pas - items: - - const: qcom,sm8750-adsp-pas + - enum: + - qcom,kaanapali-adsp-pas + - qcom,sm8750-adsp-pas - const: qcom,sm8550-adsp-pas - items: - const: qcom,sm8750-cdsp-pas @@ -95,6 +97,7 @@ allOf: compatible: contains: enum: + - qcom,kaanapali-adsp-pas - qcom,sm8750-adsp-pas then: properties: --=20 2.25.1 From nobody Mon Feb 9 05:20:38 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DB213246ED for ; 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It is not compatible with SM8650 because one memory region "global_sync_mem" is not managed by kernel on Kaanapali so it is removed in the remoteproc cdsp node. Signed-off-by: Jingyi Wang Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml index 31dffd02125a..3b66bd106737 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -35,6 +35,10 @@ properties: - items: - const: qcom,sm8750-cdsp-pas - const: qcom,sm8650-cdsp-pas + - items: + - enum: + - qcom,kaanapali-cdsp-pas + - const: qcom,sm8550-cdsp-pas =20 reg: maxItems: 1 @@ -98,6 +102,7 @@ allOf: contains: enum: - qcom,kaanapali-adsp-pas + - qcom,kaanapali-cdsp-pas - qcom,sm8750-adsp-pas then: properties: --=20 2.25.1 From nobody Mon Feb 9 05:20:38 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C7C03254BB for ; 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Extend the "qcom,smem-states", "qcom,smem-state-names", "interrupts" and "interrupt-names" properties in the pas-common. Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Signed-off-by: Jingyi Wang --- .../remoteproc/qcom,kaanapali-soccp-pas.yaml | 134 +++++++++++++++++= ++++ .../bindings/remoteproc/qcom,pas-common.yaml | 28 +++-- 2 files changed, 155 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-so= ccp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-= soccp-pas.yaml new file mode 100644 index 000000000000..bd94ab9a3da4 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas= .yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service + +maintainers: + - Jingyi Wang + +description: + The SoC Control Processor (SoCCP) is small RISC-V MCU that controls USB + Type-C, battery charging and various other functions on Qualcomm SoCs, s= omewhat + analogous to traditional PC Embedded Controllers. This document describes + the Peripheral Authentication Service loads and boots firmware for SoCCP. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,glymur-soccp-pas + - const: qcom,kaanapali-soccp-pas + - enum: + - qcom,kaanapali-soccp-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + power-domains: + items: + - description: CX power domain + - description: MX power domain + + power-domain-names: + items: + - const: cx + - const: mx + + firmware-name: + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + +required: + - compatible + - reg + - memory-region + - power-domains + - power-domain-names + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #define IPCC_MPROC_SOCCP + + remoteproc@d00000 { + compatible =3D "qcom,kaanapali-soccp-pas"; + reg =3D <0x00d00000 0x200000>; + + clocks =3D <&rpmhcc RPMH_CXO_CLK>; + clock-names =3D "xo"; + + interrupts-extended =3D <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>, + <&soccp_smp2p_in 10 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "wdog", + "fatal", + "ready", + "handover", + "stop-ack", + "pong", + "wake-ack"; + + memory-region =3D <&soccp_mem>, + <&soccp_dtb_mem_mem>; + + firmware-name =3D "qcom/kaanapali/soccp.mbn", + "qcom/kaanapali/soccp_dtb.mbn"; + + power-domains =3D <&rpmhpd RPMHPD_CX>, + <&rpmhpd RPMHPD_MX>; + power-domain-names =3D "cx", + "mx"; + + qcom,smem-states =3D <&soccp_smp2p_out 0>, + <&soccp_smp2p_out 10>, + <&soccp_smp2p_out 9>, + <&soccp_smp2p_out 8>; + qcom,smem-state-names =3D "stop", + "wakeup", + "sleep", + "ping"; + + glink-edge { + interrupts-extended =3D <&ipcc IPCC_MPROC_SOCCP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes =3D <&ipcc IPCC_MPROC_SOCCP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label =3D "soccp"; + qcom,remote-pid =3D <19>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml index 63a82e7a8bf8..149e993282bb 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -33,16 +33,22 @@ properties: - description: Handover interrupt - description: Stop acknowledge interrupt - description: Shutdown acknowledge interrupt + - description: Pong interrupt + - description: Wake acknowledge interrupt =20 interrupt-names: minItems: 5 + maxItems: 7 items: - - const: wdog - - const: fatal - - const: ready - - const: handover - - const: stop-ack - - const: shutdown-ack + enum: + - wdog + - fatal + - ready + - handover + - stop-ack + - shutdown-ack + - pong + - wake-ack =20 power-domains: minItems: 1 @@ -55,13 +61,21 @@ properties: qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array description: States used by the AP to signal the Hexagon core + minItems: 1 items: - - description: Stop the modem + - description: Stop the remoteproc + - description: Wake up the remoteproc + - description: Make the remoteproc sleep + - description: Ping the remoteproc =20 qcom,smem-state-names: description: The names of the state bits used for SMP2P output + minItems: 1 items: - const: stop + - const: wakeup + - const: sleep + - const: ping =20 smd-edge: $ref: /schemas/remoteproc/qcom,smd-edge.yaml# --=20 2.25.1 From nobody Mon Feb 9 05:20:38 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B34C130C614 for ; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1217254cd77sm56931833c88.14.2025.12.23.01.14.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Dec 2025 01:14:20 -0800 (PST) From: Jingyi Wang Date: Tue, 23 Dec 2025 01:13:50 -0800 Subject: [PATCH v3 4/5] remoteproc: qcom: pas: Add late attach support for subsystems Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251223-knp-remoteproc-v3-4-5b09885c55a5@oss.qualcomm.com> References: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> In-Reply-To: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jingyi Wang , Gokul krishna Krishnakumar X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766481257; l=13613; i=jingyi.wang@oss.qualcomm.com; s=20250911; h=from:subject:message-id; bh=ah4BRBCJ3psBdbQurF6akJP6Z/Tu+W9Jy9iuU9xu4NQ=; b=Vz3zYF76QnjqHTWD4igQMv2JhZFNCZ4kQmodYeOX3UNOJRTlOdNx7TKgkcU/OJzSmul8j1en1 BP1grt856xaDfE+JW7CCVRWh2sxRnnlHGv0HQEiN7/lT0dp4enuuz1S X-Developer-Key: i=jingyi.wang@oss.qualcomm.com; a=ed25519; pk=PSoHZ6KbUss3IW8FPRVMHMK0Jkkr/jV347mBYJO3iLo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDA3NCBTYWx0ZWRfX2dYC4rby/4l1 PjLFV8kNCkkhYzCQUGnOYSKpTpr732UCVoF0JO5s8T5umIj85A7GLnpr30N3Ob6M6UBXKCFlCaU Eq7sKHdtH3HKfZEsCgrtFTJUA2qIAefUSQ1jc68pbdA93CeT1kE41g4MUNT6QaoxDZ+03Tgx6ur cbfpg03Zud0GhcrTL8cG78qBsLNQQS7ycH2XnjkQpyGYTRUquNMaABRRrEABpk1dcCMMnK6WdYd nxoGnSLMFjvscmYmPv+CtHzIvJIXGN1M6ATR0Eoc4CPB7Dkhwt6Aa8XSxwuyjCyDHt3j46pgBiR iI++IsD/eixgg0SFJcvs2EJydOC7cSKR2FNLgYUufl3tQEYhM5kUfs2bM4cCqHn6dlJcXgw0Jw/ 3yiQ4rxrjmItMjb0gjE5geangEzIeQlGk7I/fvOYVJ5admrwVuQFXeOQPedz1M9vZfufTJbf1pq nqO2xWXmGXp/Ua7F03w== X-Proofpoint-ORIG-GUID: E2T496-pyqyEV4d1RN77tnyFmdt9zcDG X-Authority-Analysis: v=2.4 cv=LeUxKzfi c=1 sm=1 tr=0 ts=694a5d6f cx=c_pps a=JYo30EpNSr/tUYqK9jHPoA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=x8meLMyhUKYFESlZP2wA:9 a=QEXdDO2ut3YA:10 a=Fk4IpSoW4aLDllm1B1p-:22 X-Proofpoint-GUID: E2T496-pyqyEV4d1RN77tnyFmdt9zcDG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-23_02,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230074 From: Gokul krishna Krishnakumar Subsystems can be brought out of reset by entities such as bootloaders. As the irq enablement could be later than subsystem bring up, the state of subsystem should be checked by reading SMP2P bits and performing ping test. A new qcom_pas_attach() function is introduced. if a crash state is detected for the subsystem, rproc_report_crash() is called. If the subsystem is ready either at the first check or within a 5-second timeout and the ping is successful, it will be marked as "attached". The ready state could be set by either ready interrupt or handover interrupt. If "early_boot" is set by kernel but "subsys_booted" is not completed within the timeout, It could be the early boot feature is not supported by other entities. In this case, the state will be marked as RPROC_OFFLINE so that the PAS driver can load the firmware and start the remoteproc. As the running state is set once attach function is called, the watchdog or fatal interrupt received can be handled correctly. Signed-off-by: Gokul krishna Krishnakumar Co-developed-by: Jingyi Wang Signed-off-by: Jingyi Wang --- drivers/remoteproc/qcom_q6v5.c | 87 ++++++++++++++++++++++++++++++++- drivers/remoteproc/qcom_q6v5.h | 11 ++++- drivers/remoteproc/qcom_q6v5_adsp.c | 2 +- drivers/remoteproc/qcom_q6v5_mss.c | 2 +- drivers/remoteproc/qcom_q6v5_pas.c | 97 +++++++++++++++++++++++++++++++++= +++- drivers/remoteproc/qcom_q6v5_wcss.c | 2 +- 6 files changed, 195 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c index 58d5b85e58cd..3f451e5db381 100644 --- a/drivers/remoteproc/qcom_q6v5.c +++ b/drivers/remoteproc/qcom_q6v5.c @@ -20,6 +20,7 @@ =20 #define Q6V5_LOAD_STATE_MSG_LEN 64 #define Q6V5_PANIC_DELAY_MS 200 +#define Q6V5_PING_TIMEOUT_MS 500 =20 static int q6v5_load_state_toggle(struct qcom_q6v5 *q6v5, bool enable) { @@ -94,6 +95,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *dat= a) size_t len; char *msg; =20 + if (q6v5->early_boot) + complete(&q6v5->subsys_booted); + /* Sometimes the stop triggers a watchdog rather than a stop-ack */ if (!q6v5->running) { complete(&q6v5->stop_done); @@ -118,6 +122,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *= data) size_t len; char *msg; =20 + if (q6v5->early_boot) + complete(&q6v5->subsys_booted); + if (!q6v5->running) return IRQ_HANDLED; =20 @@ -139,6 +146,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *= data) =20 complete(&q6v5->start_done); =20 + if (q6v5->early_boot) + complete(&q6v5->subsys_booted); + return IRQ_HANDLED; } =20 @@ -172,6 +182,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, voi= d *data) if (q6v5->handover) q6v5->handover(q6v5); =20 + if (q6v5->early_boot) + complete(&q6v5->subsys_booted); + icc_set_bw(q6v5->path, 0, 0); =20 q6v5->handover_issued =3D true; @@ -234,6 +247,74 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5) } EXPORT_SYMBOL_GPL(qcom_q6v5_panic); =20 +static irqreturn_t q6v5_pong_interrupt(int irq, void *data) +{ + struct qcom_q6v5 *q6v5 =3D data; + + complete(&q6v5->ping_done); + + return IRQ_HANDLED; +} + +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5) +{ + int ret; + int ping_failed =3D 0; + + reinit_completion(&q6v5->ping_done); + + /* Set master kernel Ping bit */ + ret =3D qcom_smem_state_update_bits(q6v5->ping_state, + BIT(q6v5->ping_bit), BIT(q6v5->ping_bit)); + if (ret) { + dev_err(q6v5->dev, "Failed to update ping bits\n"); + return ret; + } + + ret =3D wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(Q6= V5_PING_TIMEOUT_MS)); + if (!ret) { + ping_failed =3D -ETIMEDOUT; + dev_err(q6v5->dev, "Failed to get back pong\n"); + } + + /* Clear ping bit master kernel */ + ret =3D qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit)= , 0); + if (ret) { + dev_err(q6v5->dev, "Failed to clear master kernel bits\n"); + return ret; + } + + return ping_failed; +} +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem); + +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_= device *pdev) +{ + int ret =3D -ENODEV; + + q6v5->ping_state =3D devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->= ping_bit); + if (IS_ERR(q6v5->ping_state)) { + dev_err(&pdev->dev, "Failed to acquire smem state %ld\n", + PTR_ERR(q6v5->ping_state)); + return PTR_ERR(q6v5->ping_state); + } + + init_completion(&q6v5->ping_done); + + q6v5->pong_irq =3D platform_get_irq_byname(pdev, "pong"); + if (q6v5->pong_irq < 0) + return q6v5->pong_irq; + + ret =3D devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL, + q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "q6v5 pong", q6v5); + if (ret) + dev_err(&pdev->dev, "Failed to acquire pong IRQ\n"); + + return ret; +} +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init); + /** * qcom_q6v5_init() - initializer of the q6v5 common struct * @q6v5: handle to be initialized @@ -247,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic); */ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, struct rproc *rproc, int crash_reason, const char *load_state, - void (*handover)(struct qcom_q6v5 *q6v5)) + bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5)) { int ret; =20 @@ -255,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct pla= tform_device *pdev, q6v5->dev =3D &pdev->dev; q6v5->crash_reason =3D crash_reason; q6v5->handover =3D handover; + q6v5->early_boot =3D early_boot; =20 init_completion(&q6v5->start_done); init_completion(&q6v5->stop_done); =20 + if (early_boot) + init_completion(&q6v5->subsys_booted); + q6v5->wdog_irq =3D platform_get_irq_byname(pdev, "wdog"); if (q6v5->wdog_irq < 0) return q6v5->wdog_irq; diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h index 5a859c41896e..f500518136ae 100644 --- a/drivers/remoteproc/qcom_q6v5.h +++ b/drivers/remoteproc/qcom_q6v5.h @@ -17,22 +17,27 @@ struct qcom_q6v5 { struct rproc *rproc; =20 struct qcom_smem_state *state; + struct qcom_smem_state *ping_state; struct qmp *qmp; =20 struct icc_path *path; =20 unsigned stop_bit; + unsigned int ping_bit; =20 int wdog_irq; int fatal_irq; int ready_irq; int handover_irq; int stop_irq; + int pong_irq; =20 bool handover_issued; =20 struct completion start_done; struct completion stop_done; + struct completion subsys_booted; + struct completion ping_done; =20 int crash_reason; =20 @@ -40,11 +45,13 @@ struct qcom_q6v5 { =20 const char *load_state; void (*handover)(struct qcom_q6v5 *q6v5); + + bool early_boot; }; =20 int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, struct rproc *rproc, int crash_reason, const char *load_state, - void (*handover)(struct qcom_q6v5 *q6v5)); + bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5)); void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5); =20 int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5); @@ -52,5 +59,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5); int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sys= mon); int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout); unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5); +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5); +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_= device *pdev); =20 #endif diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index b5c8d6d38c9c..15b3cdf8c157 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -712,7 +712,7 @@ static int adsp_probe(struct platform_device *pdev) goto disable_pm; =20 ret =3D qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, - desc->load_state, qcom_adsp_pil_handover); + desc->load_state, false, qcom_adsp_pil_handover); if (ret) goto disable_pm; =20 diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q= 6v5_mss.c index 91940977ca89..2129064147d6 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -2143,7 +2143,7 @@ static int q6v5_probe(struct platform_device *pdev) qproc->has_mba_logs =3D desc->has_mba_logs; =20 ret =3D qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,= "modem", - qcom_msa_handover); + false, qcom_msa_handover); if (ret) goto detach_proxy_pds; =20 diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 52680ac99589..7e890e18dd82 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -35,6 +35,8 @@ =20 #define MAX_ASSIGN_COUNT 3 =20 +#define EARLY_ATTACH_TIMEOUT_MS 5000 + struct qcom_pas_data { int crash_reason_smem; const char *firmware_name; @@ -59,6 +61,7 @@ struct qcom_pas_data { int region_assign_count; bool region_assign_shared; int region_assign_vmid; + bool early_boot; }; =20 struct qcom_pas { @@ -326,6 +329,7 @@ static int qcom_pas_start(struct rproc *rproc) } =20 ret =3D qcom_q6v5_wait_for_start(&pas->q6v5, msecs_to_jiffies(5000)); + if (ret =3D=3D -ETIMEDOUT) { dev_err(pas->dev, "start timed out\n"); qcom_scm_pas_shutdown(pas->pas_id); @@ -409,6 +413,8 @@ static int qcom_pas_stop(struct rproc *rproc) if (pas->smem_host_id) ret =3D qcom_smem_bust_hwspin_lock_by_host(pas->smem_host_id); =20 + pas->q6v5.early_boot =3D false; + return ret; } =20 @@ -434,6 +440,85 @@ static unsigned long qcom_pas_panic(struct rproc *rpro= c) return qcom_q6v5_panic(&pas->q6v5); } =20 +static int qcom_pas_attach(struct rproc *rproc) +{ + int ret; + struct qcom_pas *pas =3D rproc->priv; + bool ready_state; + bool crash_state; + + pas->q6v5.running =3D true; + ret =3D irq_get_irqchip_state(pas->q6v5.fatal_irq, + IRQCHIP_STATE_LINE_LEVEL, &crash_state); + + if (ret) + goto disable_running; + + if (crash_state) { + dev_err(pas->dev, "Sub system has crashed before driver probe\n"); + rproc_report_crash(rproc, RPROC_FATAL_ERROR); + ret =3D -EINVAL; + goto disable_running; + } + + ret =3D irq_get_irqchip_state(pas->q6v5.ready_irq, + IRQCHIP_STATE_LINE_LEVEL, &ready_state); + + if (ret) + goto disable_running; + + enable_irq(pas->q6v5.handover_irq); + + if (unlikely(!ready_state)) { + /* Set a 5 seconds timeout in case the early boot is delayed */ + ret =3D wait_for_completion_timeout(&pas->q6v5.subsys_booted, + msecs_to_jiffies(EARLY_ATTACH_TIMEOUT_MS)); + + /* + * The bootloader may not support early boot, mark the state as + * RPROC_OFFLINE so that the PAS driver can load the firmware and + * start the remoteproc. + */ + if (!ret) { + dev_err(pas->dev, "Timeout on waiting for subsystem interrupt\n"); + pas->rproc->state =3D RPROC_OFFLINE; + ret =3D -ETIMEDOUT; + goto disable_handover; + } + + /* Only ping the subsystem if ready_state is set */ + ret =3D irq_get_irqchip_state(pas->q6v5.ready_irq, + IRQCHIP_STATE_LINE_LEVEL, &ready_state); + + if (ret) + goto disable_handover; + + if (!ready_state) { + ret =3D -EINVAL; + goto disable_handover; + } + } + + ret =3D qcom_q6v5_ping_subsystem(&pas->q6v5); + + if (ret) { + dev_err(pas->dev, "Failed to ping subsystem, assuming device crashed\n"); + rproc_report_crash(rproc, RPROC_FATAL_ERROR); + goto disable_handover; + } + + pas->q6v5.handover_issued =3D true; + + return 0; + +disable_handover: + disable_irq(pas->q6v5.handover_irq); +disable_running: + pas->q6v5.running =3D false; + + return ret; +} + static const struct rproc_ops qcom_pas_ops =3D { .unprepare =3D qcom_pas_unprepare, .start =3D qcom_pas_start, @@ -442,6 +527,7 @@ static const struct rproc_ops qcom_pas_ops =3D { .parse_fw =3D qcom_register_dump_segments, .load =3D qcom_pas_load, .panic =3D qcom_pas_panic, + .attach =3D qcom_pas_attach, }; =20 static const struct rproc_ops qcom_pas_minidump_ops =3D { @@ -746,7 +832,7 @@ static int qcom_pas_probe(struct platform_device *pdev) pas->proxy_pd_count =3D ret; =20 ret =3D qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem, - desc->load_state, qcom_pas_handover); + desc->load_state, desc->early_boot, qcom_pas_handover); if (ret) goto detach_proxy_pds; =20 @@ -760,6 +846,15 @@ static int qcom_pas_probe(struct platform_device *pdev) } =20 qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name); + + if (pas->q6v5.early_boot) { + ret =3D qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev); + if (ret) + dev_warn(&pdev->dev, "Falling back to firmware load\n"); + else + pas->rproc->state =3D RPROC_DETACHED; + } + ret =3D rproc_add(rproc); if (ret) goto remove_ssr_sysmon; diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_= q6v5_wcss.c index c27200159a88..859141589ed7 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -1011,7 +1011,7 @@ static int q6v5_wcss_probe(struct platform_device *pd= ev) if (ret) return ret; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1217254cd77sm56931833c88.14.2025.12.23.01.14.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Dec 2025 01:14:21 -0800 (PST) From: Jingyi Wang Date: Tue, 23 Dec 2025 01:13:51 -0800 Subject: [PATCH v3 5/5] remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251223-knp-remoteproc-v3-5-5b09885c55a5@oss.qualcomm.com> References: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> In-Reply-To: <20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com> To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jingyi Wang X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766481257; l=1580; i=jingyi.wang@oss.qualcomm.com; s=20250911; h=from:subject:message-id; bh=Nqu+aOuN5ZaQ3gE/Xy46Qjo+os29grBY+Nkaip5fCwU=; b=IgqiGhdQVv4PE18x02hoRXU65WTPD9xOkUEAef9Md1fHjJlYgEARRi63h34JfZlqs7S2ECCFD HXJFq+irlWwCCnbtEIqOiMcRvnzdOW5gR/8dNNY/+roUfPsPQYunVFw X-Developer-Key: i=jingyi.wang@oss.qualcomm.com; a=ed25519; pk=PSoHZ6KbUss3IW8FPRVMHMK0Jkkr/jV347mBYJO3iLo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDA3NCBTYWx0ZWRfX+IAs2jjhDojE Rs3fQu0jJIiv2CCwPzdn4aaL0ZhomwJQMlhuvUuuBgIo/0+55WMZOnaXyBXx/i3nGmGBWzZFIas Z38LkWEpUtzlfp5Y6gq/IXGgoBCS1ien9E/PxN95+gsLL8BBLsvDNXFLCOdXoGzNXH6GSj4nH7i 9nooNZVubWfqwicEcLISR4DjavF8XloO89Uabk2ZYKxe3otCYu87VUWdy/i3pDKgwOuYf8LldXS BFQCsFYN2BLFq+aopVqcUA+JjqRp8ixx/F8pc6OtjXSFof9ivPUqOC0xz2M8lJ/K7nyaB41WGeQ IzSeMV1tX9y2czR8sLsuTul0sSfd8vvtKIfHb7KrY5aM6n01tzNG/6LZmFZUMIMb+06So3F6Maq i1cPSUZj+09Zryb1XLeG1sYfmujbZiJSgX/qYtkPJXWYtxTGfh5wpBUS4jpqAb1KRKK/vuVcgR5 +4GwPDVTBnmj4x0egEA== X-Proofpoint-ORIG-GUID: u90_5pmDBgbkBRiy5a0SLLPLpXopEKRN X-Authority-Analysis: v=2.4 cv=LeUxKzfi c=1 sm=1 tr=0 ts=694a5d6f cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=-54vo4t_4OUFHp6kYXwA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: u90_5pmDBgbkBRiy5a0SLLPLpXopEKRN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-23_02,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230074 The SoC Control Processor (SoCCP) is small RISC-V MCU that controls USB Type-C, battery charging and various other functions on Qualcomm SoCs. It provides a solution for control-plane processing, reducing per-subsystem microcontroller reinvention. Add support for SoCCP PAS loader on Kaanapali platform. Signed-off-by: Jingyi Wang Reviewed-by: Dmitry Baryshkov --- drivers/remoteproc/qcom_q6v5_pas.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 7e890e18dd82..e0028143377a 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1530,7 +1530,25 @@ static const struct qcom_pas_data sm8750_mpss_resour= ce =3D { .region_assign_vmid =3D QCOM_SCM_VMID_MSS_MSA, }; =20 +static const struct qcom_pas_data kaanapali_soccp_resource =3D { + .crash_reason_smem =3D 656, + .firmware_name =3D "soccp.mbn", + .dtb_firmware_name =3D "soccp_dtb.mbn", + .pas_id =3D 51, + .dtb_pas_id =3D 0x41, + .proxy_pd_names =3D (char*[]){ + "cx", + "mx", + NULL + }, + .ssr_name =3D "soccp", + .sysmon_name =3D "soccp", + .auto_boot =3D true, + .early_boot =3D true, +}; + static const struct of_device_id qcom_pas_of_match[] =3D { + { .compatible =3D "qcom,kaanapali-soccp-pas", .data =3D &kaanapali_soccp_= resource}, { .compatible =3D "qcom,milos-adsp-pas", .data =3D &sm8550_adsp_resource}, { .compatible =3D "qcom,milos-cdsp-pas", .data =3D &milos_cdsp_resource}, { .compatible =3D "qcom,milos-mpss-pas", .data =3D &sm8450_mpss_resource}, --=20 2.25.1