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a=ed25519-sha256; t=1766509672; l=4358; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=LHOC90yAoiwemIEAKL3+u1kkTKM+A1ZqtQ5uNG8qwD8=; b=G2fEOckFFDds6XCzFZhwADptUUMnJ0eihB+skHyOzPygTJJ3xdGdKn34L+Hlizn54f63bVHQz E+QxO/wmQH4CxHYMORTMG69KwQN1FeBJPNFCbu3mRinGjzOiMVdoFHb X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=CpsuL7yZ8NReDPhGgq6Xn/SRoa59mAvzWOW0QZoo4gw= X-Proofpoint-ORIG-GUID: 7VEokKUNSmvSk2QD_iBktovpDK8f4agA X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDE0MiBTYWx0ZWRfXwIGnc1UiJrOw fanH320m6LbUndztmEWHm5c5FCiBWHTWhQcAHSpBkx714QgUvKsXKBOHL14wfwe08FG/MVbcCSX rFFO79YXokvLJfIHb5ljsu6GdCoPO4CHfSqKsETFSLdc/CQJEfoyRtUP/XsI745Zl4X81z0xstf CoX72I1t2AUczVG4cti/3BlTa6NC04YCoo1knFRxsvfrfI1ZdsbDE5ic1hss4MVA6Ks2qgbpqWV 0SlHY5I1cy2QcRCfQwD6sSCWgKcXsE1cXbPGe2+nMFooNZETTwRXyMNecCLmZ95DDXyvPz3n6Zy UddTA5TF/E/K4ZRkJJAtsnYBoPrV3R2sGaUJB2z51UgtSUxAEW7Qsm0iaVJzA4oEI0Qx6kauJoV xbBaiPr5e0iW32/7Rzp3w72eDY4GhGE0iCJT6192V4AaPvWLNwLpm2XexlUWaVruruPFEgjcs5M yG8JxEAEeDsXcQYyTkg== X-Proofpoint-GUID: 7VEokKUNSmvSk2QD_iBktovpDK8f4agA X-Authority-Analysis: v=2.4 cv=NZDrFmD4 c=1 sm=1 tr=0 ts=694acc8a cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=eczEI0HPkUfQIoTEgvMA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-23_04,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 impostorscore=0 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230142 PSCI currently supports only COLD reset and ARCH WARM reset based on the Linux reboot_mode variable. The PSCI specification now includes SYSTEM_RESET2 for vendor-specific resets, but there's no mechanism to issue these through psci_sys_reset. Add a command-based reset mechanism that allows external drivers to set the psci reset command via a new psci_set_reset_cmd() function. The psci command-based reset is disabled by default and the psci_sys_reset follows its original flow until a psci_reset command is set or a kernel panic is in progress. Signed-off-by: Shivendra Pratap --- drivers/firmware/psci/psci.c | 46 ++++++++++++++++++++++++++++++++++++++++= ++-- include/linux/psci.h | 2 ++ 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..ad7a3267276f9e26740aea99c11= f171ac715f9ba 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -51,6 +51,15 @@ static int resident_cpu =3D -1; struct psci_operations psci_ops; static enum arm_smccc_conduit psci_conduit =3D SMCCC_CONDUIT_NONE; =20 +struct psci_sys_reset_params { + u32 system_reset; + u32 reset_type; + u32 cookie; + bool cmd; +}; + +static struct psci_sys_reset_params psci_reset; + bool psci_tos_resident_on(int cpu) { return cpu =3D=3D resident_cpu; @@ -80,6 +89,29 @@ static u32 psci_cpu_suspend_feature; static bool psci_system_reset2_supported; static bool psci_system_off2_hibernate_supported; =20 +/** + * psci_set_reset_cmd - Sets the psci_reset_cmd for command-based + * reset which will be used in psci_sys_reset call. + * + * @cmd_sys_rst2: Set to true for SYSTEM_RESET2 based resets. + * @cmd_reset_type: Set the reset_type argument for psci_sys_reset. + * @cmd_cookie: Set the cookie argument for psci_sys_reset. + */ +void psci_set_reset_cmd(bool cmd_sys_rst2, u32 cmd_reset_type, u32 cmd_coo= kie) +{ + if (cmd_sys_rst2 && psci_system_reset2_supported) { + psci_reset.system_reset =3D PSCI_FN_NATIVE(1_1, SYSTEM_RESET2); + psci_reset.reset_type =3D cmd_reset_type; + psci_reset.cookie =3D cmd_cookie; + } else { + psci_reset.system_reset =3D PSCI_0_2_FN_SYSTEM_RESET; + psci_reset.reset_type =3D 0; + psci_reset.cookie =3D 0; + } + psci_reset.cmd =3D true; +} +EXPORT_SYMBOL_GPL(psci_set_reset_cmd); + static inline bool psci_has_ext_power_state(void) { return psci_cpu_suspend_feature & @@ -309,14 +341,24 @@ static int get_set_conduit_method(const struct device= _node *np) static int psci_sys_reset(struct notifier_block *nb, unsigned long action, void *data) { - if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && - psci_system_reset2_supported) { + if (((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && + psci_system_reset2_supported) && (panic_in_progress() || !psci_reset= .cmd)) { /* * reset_type[31] =3D 0 (architectural) * reset_type[30:0] =3D 0 (SYSTEM_WARM_RESET) * cookie =3D 0 (ignored by the implementation) */ invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0); + } else if (!panic_in_progress() && psci_reset.cmd) { + /* + * Commands are being set in psci_set_reset_cmd + * This issues, SYSTEM_RESET2 arch warm reset or + * SYSTEM_RESET2 vendor-specific reset or + * a SYSTEM_RESET cold reset in accordance with + * the reboot-mode command. + */ + invoke_psci_fn(psci_reset.system_reset, psci_reset.reset_type, + psci_reset.cookie, 0); } else { invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); } diff --git a/include/linux/psci.h b/include/linux/psci.h index 4ca0060a3fc42ba1ca751c7862fb4ad8dda35a4c..d13ceca88eab8932894051e7c86= e806c2ad8a73a 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -45,8 +45,10 @@ struct psci_0_1_function_ids get_psci_0_1_function_ids(v= oid); =20 #if defined(CONFIG_ARM_PSCI_FW) int __init psci_dt_init(void); +void psci_set_reset_cmd(bool cmd_sys_rst2, u32 cmd_reset_type, u32 cmd_coo= kie); #else static inline int psci_dt_init(void) { return 0; } +static inline void psci_set_reset_cmd(bool cmd_sys_rst2, u32 cmd_reset_typ= e, u32 cmd_cookie) { } #endif =20 #if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI) --=20 2.34.1