From nobody Tue Feb 10 05:43:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84656338930 for ; Mon, 22 Dec 2025 10:25:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766399108; cv=none; b=kW5m5UZxGyQsIr7k/iBf/hU7BYCA+rXwrxPfTeodT11267pwdAXwj7ek1X+EphjglHAbFZ3kvCTfWQkI3Zej/L/3gBS5a6kXdlWEaoy6YoOnffeua7007pNVeslvhxNAELhVUU07VsuYAt5+mhZU9Rc+WresUYm914L4mVXyXcA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766399108; c=relaxed/simple; bh=GPNHdwwPQhx6RHo0jHkO62FjrR7S3TzTSqPLz/MSGkc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lTMCEeFZ+aLWEmYOg30yPBCUCwvySReu8HuVCHaKDaFhvq5EfSFzk2JAIhtV/zpaCTMwpEp914vR8aHxW3PmkvVTRKBBdJ+CbxCEzxSbquSZHWpuh8vkGMPPIoQt0qMwCMa8mDcE+s+9w/XZSjFYvqRYbPP7/Bs5tz7nO6XgvvA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=lW4H9h7j; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=cf/nV4RN; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="lW4H9h7j"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="cf/nV4RN" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BM5hBPw2191547 for ; Mon, 22 Dec 2025 10:25:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=FQG5BqsGnCi ZEwc/eMkHo/ya5niea9nDglgo72tq9vo=; b=lW4H9h7jjvTU7HPAwzt9JGC6fyY d0sQxoaKD15QBLsBwb2EIIaSWrrYDzXcC/PIPMbEjWa4ESAH0bDvn36VRWHVuIEc 0fC+bfZcY2+/IqcVbAt0hJhohcZQrMdJKhUjVXQfzR2XRIoN8z7j/lRwyxHvHqCw 1Xjl4njxNzFmWmRZnZ0ZKbBzzOZow4yadZyxAQPqInaN2gOzJp5jKwlIYu4ejGQA i8fCHRz11fVzCw2EVCpgQ0yhCbVIqRy0N8ieXv2PoMEsHPym1y9Bk8oVWzd/p5g6 1QGswrZJSJScH+AwKYS9ziC4+LWZXfbbGP4glPo3hlytpFIgy7JEGo4l+Wg== Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b702t8ud1-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 22 Dec 2025 10:25:05 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-8b259f0da04so919071285a.0 for ; Mon, 22 Dec 2025 02:25:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1766399105; x=1767003905; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FQG5BqsGnCiZEwc/eMkHo/ya5niea9nDglgo72tq9vo=; b=cf/nV4RNzAted7lyHqvHewjy67mAcAoUpkj03kIkWRggICewEodISqDCTZQnVbpWUS +ZHHxAfZa6q63QEOSaiIKNxcV8cUaNK+9NlIrNOyjnwgS1cVlQsBySwCAwjVgD0/EHlu os9NfR0JB3uLpeqw5YLfTbYFW81/QuPrDe0xyrSDF/snauEv/XGS4laKOBJ9dmhloXWZ o8FEXtdCJuynG5xKGC3UIQ3Z3zgep9PavYRYHHXJcv8doyNSAPa+u6pKvzR+bDO8FX09 kXjvoW4CqOrDoAB4R3XoQWS5EeV/lDGavFZKqvg66axtY55FuZdrCByG2GBeD6O50WM+ pZmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766399105; x=1767003905; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FQG5BqsGnCiZEwc/eMkHo/ya5niea9nDglgo72tq9vo=; b=fsHkdfbsgPvt+z0t7kzkkhv31yn0e1qDmOLz3RqSBh3gqh/gJjWCGiP/cNB6NTPij3 PMtYEXpZ9gMgywcfUAD9/QCs6q+W6syL4xpJJs/yOK3UMoH8wfhU9bnwzJikkTNwmcB1 X1oRbVnEIwRabVwP4GLRMd8iKJ8ZsSAKmla2Jfgz/ThwEg1h4dXqFpDgeF7SCdrbqybt BFsZPKo7ffXLo6zIkvZncxe83AVS/fJlQn8y1UTCXZTrGGo9gbSfYkd6sTvVorWf9re7 wauPkxBZ3cQnruV4j7Cvf/LyAjtqobV1GxxGd10w2C4UgIZ+m8ncUKK7gU7poNYuC2if P0jA== X-Forwarded-Encrypted: i=1; AJvYcCXxpK3CLiHT7EkqE4CSAg5bKV8lHYZOjaYZitNh0aFfusNFK5VQETMxgwrZQ2+hswXAWadDlAsRMV1bwT8=@vger.kernel.org X-Gm-Message-State: AOJu0YxExpQDzJgB9TSrUK9QMfZBpLNUDEgqBgIm+GnozSKKSXHNOiBB jV2+lkwGYexhczY3xOLC7DsZMa9PIodV3B9TgjFuECsYNY8H3HGxvBAKJqOz1wJIUwNW9dGl71P +N+2TYqncXYTUou3Zv6/xB4QOqKaZROVTFmt5GOUorhnipILlMYD5BaRf5jVYnymDGfw= X-Gm-Gg: AY/fxX7/LZkO8I36a8TwwAybZ0bhlaJjED6QTh0yGr8GMa1wwA1ljXkaM30rY8uBEYh 6ykT2QvNohdgjJE78xsdl+DWzgAq5rNKiYgcuGOsQIkAEQsZY0V4vfoyYo5rgoXnLspzcN1JSBi XI1rY7Z/zPcty3QkWMxBDoLDaHUO2wY5/h/R+l0ScSexnTqSm4A439dSvIygMjUB7EdqTBIhDe3 Rlob75GNHDpdhCNXgTf4f1rUd/5jmaJxx+8XqhHIflU0+QfWci8gfbmmoUrAVr4IQYeYaaQ1Ymx edFxdAlFiFlFgYHpUx+LOxfG4kBHTwsAByVztDb3jmrmH8HM4KJbBLV9QbI2fbLAEtkfdAUDaUm EOkDG2dlEqOne8GHAFf/66ylFC25ZOkPZ6S8OkmuXOfl7e9B7vNvYdqdIfZfzNnP9QPw= X-Received: by 2002:a05:622a:14d2:b0:4ee:739:142 with SMTP id d75a77b69052e-4f4abd9950cmr152195861cf.51.1766399104804; Mon, 22 Dec 2025 02:25:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IHg72loQVQ3ROxbdMldRDmJqXKjwUSCWfEGLH0PRiH86vimyJapbk+lJWkciAVHhCTHfsSNcA== X-Received: by 2002:a05:622a:14d2:b0:4ee:739:142 with SMTP id d75a77b69052e-4f4abd9950cmr152195611cf.51.1766399104312; Mon, 22 Dec 2025 02:25:04 -0800 (PST) Received: from yuanjiey.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4f4ac66a1aasm72500001cf.33.2025.12.22.02.24.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Dec 2025 02:25:04 -0800 (PST) From: yuanjie yang To: robin.clark@oss.qualcomm.com, lumag@kernel.org, jesszhan0024@gmail.com, sean@poorly.run, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, konrad.dybcio@oss.qualcomm.com Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tingwei.zhang@oss.qualcomm.com, aiqun.yu@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, Dmitry Baryshkov Subject: [PATCH v4 06/11] drm/msm/dsi/phy: Add support for Kaanapali Date: Mon, 22 Dec 2025 18:23:55 +0800 Message-Id: <20251222102400.1109-7-yuanjie.yang@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251222102400.1109-1-yuanjie.yang@oss.qualcomm.com> References: <20251222102400.1109-1-yuanjie.yang@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=SIhPlevH c=1 sm=1 tr=0 ts=69491c81 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=ab5uJhi7KCXt4xzmVoQA:9 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-ORIG-GUID: Fl6Y-F6wTbvlqc41g_-xMkYSf3Fiw3Oh X-Proofpoint-GUID: Fl6Y-F6wTbvlqc41g_-xMkYSf3Fiw3Oh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIyMDA5NCBTYWx0ZWRfXwuPV+v2yhYVk tWc4aIK4cs89no3DDo45qMWC4fqJs65yUj/CHes32OQm5dVJw3c6Z4f29VzMSIzmepNdqqZhmln UW+WJM02/5zRPQhk+bnUf2LX8KGB8gUB48VOp6fYL7XoAeh1HM8evjPEWNDmQ7mdIJpwFawV0e6 dEBOdTR+DjixewCwPukytU7iSfoSER+nryMtsCWYP1yl7O4Z3GDh+vrFIZhm9+QFGRhNBXpT2gC HEi4cPScTy83VmyuU2mzCAtavS5qFTUgW6TtR9Khvnk4HxOk/X3uLU9o1LcHXryMqOFdud4PzRJ iGOQCGvKrd/6jAaTG9Ubr/Mc7bbtI+LWh8BUfAJ/VTPYq/zV4iRpltb3JA/TKNNvL/gTKjmk5WE CJ3KzRYYmaAYjcok2D2xx9r59pBXyr8yLaWHNi261PwtwJ0k1XuDj76MTBufXVxLErwKO0hRHK0 mpB25Fku61X+1A/YQMQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-21_05,2025-12-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 adultscore=0 phishscore=0 spamscore=0 suspectscore=0 clxscore=1015 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512220094 Content-Type: text/plain; charset="utf-8" From: Yuanjie Yang Add DSI PHY support for the Kaanapali platform, Kaanapali introduce addition of DSI2/DSI2_phy compared to SM8650. However, based on the HPG diagram, only DSI0_phy and DSI1_phy works. Co-developed-by: Yongxing Mou Signed-off-by: Yongxing Mou Reviewed-by: Dmitry Baryshkov Signed-off-by: Yuanjie Yang --- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 23 +++++++++++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.c index 4ea681130dba..7937266de1d2 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -577,6 +577,8 @@ static const struct of_device_id dsi_phy_dt_match[] =3D= { .data =3D &dsi_phy_4nm_8650_cfgs }, { .compatible =3D "qcom,sm8750-dsi-phy-3nm", .data =3D &dsi_phy_3nm_8750_cfgs }, + { .compatible =3D "qcom,kaanapali-dsi-phy-3nm", + .data =3D &dsi_phy_3nm_kaanapali_cfgs }, #endif {} }; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.h index 3cbf08231492..c01784ca38ed 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -64,6 +64,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_5nm_sar2130p_= cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8550_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8650_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_3nm_8750_cfgs; +extern const struct msm_dsi_phy_cfg dsi_phy_3nm_kaanapali_cfgs; =20 struct msm_dsi_dphy_timing { u32 clk_zero; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/ms= m/dsi/phy/dsi_phy_7nm.c index c5e1d2016bcc..8cb0db3a9880 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -1504,3 +1504,26 @@ const struct msm_dsi_phy_cfg dsi_phy_3nm_8750_cfgs = =3D { .num_dsi_phy =3D 2, .quirks =3D DSI_PHY_7NM_QUIRK_V7_0, }; + +const struct msm_dsi_phy_cfg dsi_phy_3nm_kaanapali_cfgs =3D { + .has_phy_lane =3D true, + .regulator_data =3D dsi_phy_7nm_98000uA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_7nm_98000uA_regulators), + .ops =3D { + .enable =3D dsi_7nm_phy_enable, + .disable =3D dsi_7nm_phy_disable, + .pll_init =3D dsi_pll_7nm_init, + .save_pll_state =3D dsi_7nm_pll_save_state, + .restore_pll_state =3D dsi_7nm_pll_restore_state, + .set_continuous_clock =3D dsi_7nm_set_continuous_clock, + }, + .min_pll_rate =3D 600000000UL, +#ifdef CONFIG_64BIT + .max_pll_rate =3D 5000000000UL, +#else + .max_pll_rate =3D ULONG_MAX, +#endif + .io_start =3D { 0x9ac1000, 0x9ac4000 }, + .num_dsi_phy =3D 2, + .quirks =3D DSI_PHY_7NM_QUIRK_V7_0, +}; --=20 2.34.1