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From: Marijn Suijten <marijn.suijten@somainline.org>
Date: Mon, 22 Dec 2025 00:32:15 +0100
Subject: [PATCH v2 09/11] drm/panel: Add panel driver for Samsung SOUXP00-A
 DDIC
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Message-Id: <20251222-drm-panels-sony-v2-9-82a87465d163@somainline.org>
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To: Neil Armstrong <neil.armstrong@linaro.org>,
 Sam Ravnborg <sam@ravnborg.org>, David Airlie <airlied@gmail.com>,
 Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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 Simona Vetter <simona@ffwll.ch>, Casey Connolly <casey.connolly@linaro.org>,
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 Simona Vetter <simona.vetter@ffwll.ch>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>,
 Martin Botka <martin.botka@somainline.org>,
 Jami Kettunen <jami.kettunen@somainline.org>,
 dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
 devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
 Abhinav Kumar <quic_abhinavk@quicinc.com>,
 Kuogee Hsieh <quic_khsieh@quicinc.com>,
 Jessica Zhang <quic_jesszhan@quicinc.com>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
 Marijn Suijten <marijn.suijten@somainline.org>,
 Konrad Dybcio <konradybcio@kernel.org>, Dmitry Baryshkov <lumag@kernel.org>
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 fpr=4E8B01B9A5BEA56B5FD66716F162D231C7E48676

The Samsung SOUXP00-A Display-Driver-IC is used to drive 11644x3840@60Hz
6.5" DSI command-mode panels found in the Sony Xperia 1 with amb650wh01
panel and Sony Xperia 1 II with amb650wh07 panel.  It requires Display
Stream Compression 1.1.  The panels can also be driven at a 1096x2560@60
mode.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 MAINTAINERS                                   |   1 +
 drivers/gpu/drm/panel/Kconfig                 |  16 ++
 drivers/gpu/drm/panel/Makefile                |   1 +
 drivers/gpu/drm/panel/panel-samsung-souxp00.c | 399 ++++++++++++++++++++++=
++++
 4 files changed, 417 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7f32ff371799..37c5ce4b3ba5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8210,6 +8210,7 @@ DRM DRIVER FOR SAMSUNG SOUXP00 DDIC
 M:	Marijn Suijten <marijn.suijten@somainline.org>
 S:	Maintained
 F:	Documentation/devicetree/bindings/display/panel/samsung,souxp00-a.yaml
+F:	drivers/gpu/drm/panel/panel-samsung-souxp00.c
=20
 DRM DRIVER FOR SHARP MEMORY LCD
 M:	Alex Lanzano <lanzano.alex@gmail.com>
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 1f148bc5b068..3cca1c580d50 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -969,6 +969,22 @@ config DRM_PANEL_SAMSUNG_SOFEF03
 	  This Display-IC uses Display Stream Compression 1.1 and features a
 	  1080x2520@60 and 1080x2520@120 mode.
=20
+config DRM_PANEL_SAMSUNG_SOUXP00
+	tristate "Samsung SOUXP00-A DSI cmd mode panels"
+	depends on GPIOLIB
+	depends on OF
+	depends on DRM_MIPI_DSI
+	depends on BACKLIGHT_CLASS_DEVICE
+	select DRM_DISPLAY_DSC_HELPER
+	select DRM_DISPLAY_HELPER
+	help
+	  Say Y here if you want to enable support for the Samsung 4k 6.5" OLED D=
SI
+	  command mode panel found in the Sony Xperia 1 (amb650wh01 panel) and So=
ny
+	  Xperia 1 II (amb650wh07 panel).
+
+	  This Display-IC uses Display Stream Compression 1.1 and features a
+	  1644x3840@60 and 1096x2560@60 mode.
+
 config DRM_PANEL_SEIKO_43WVF1G
 	tristate "Seiko 43WVF1G panel"
 	depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index a9636f5f433a..c19429b9e48d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -96,6 +96,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA5X01_AMS561RA01) +=
=3D panel-samsung-s6e8aa5x0
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF00) +=3D panel-samsung-sofef00.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF01) +=3D panel-samsung-sofef01.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF03) +=3D panel-samsung-sofef03.o
+obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOUXP00) +=3D panel-samsung-souxp00.o
 obj-$(CONFIG_DRM_PANEL_SEIKO_43WVF1G) +=3D panel-seiko-43wvf1g.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LQ079L1SX01) +=3D panel-sharp-lq079l1sx01.o
 obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) +=3D panel-sharp-lq101r1sx01.o
diff --git a/drivers/gpu/drm/panel/panel-samsung-souxp00.c b/drivers/gpu/dr=
m/panel/panel-samsung-souxp00.c
new file mode 100644
index 000000000000..4d86fe40d963
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-samsung-souxp00.c
@@ -0,0 +1,399 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Marijn Suijten <marijn.suijten@somainline.org>
+ *
+ * Based on the following Sony downstream DTS command sequences:
+ * - Xperia 1 (kumano griffin): https://github.com/sonyxperiadev/kernel-co=
pyleft/blob/55.2.A.4.xxx/arch/arm64/boot/dts/somc/dsi-panel-4koled.dtsi
+ * - Xperia 1 II (edo pdx203): https://github.com/sonyxperiadev/kernel-cop=
yleft-dts/blob/58.2.A.10.xxx/somc/dsi-panel-souxp00_a-amb650wh07-uhd.dtsi
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/display/drm_dsc.h>
+#include <drm/display/drm_dsc_helper.h>
+
+#define WRITE_CONTROL_DISPLAY_BACKLIGHT BIT(5)
+
+/* Only used to send a few differentiating DCS between the two panel varia=
nts,
+ * without exactly knowing what they mean.  These do not seem to be relate=
d to
+ * panel functionality nor have any visual impact, but they are sent anywa=
y just
+ * in case.
+ */
+enum panel_type {
+	/* Sony Xperia 1 */
+	PANEL_TYPE_01,
+	/* Sony Xperia 1 II */
+	PANEL_TYPE_07,
+};
+
+/*
+ * TODO: This should be communicated via the mode when .prepare
+ * receives atomic commit info
+ */
+static const bool enable_4k =3D true;
+
+const struct regulator_bulk_data samsung_souxp00_a_supplies[] =3D {
+	{ .supply =3D "vddio", /* 1.8 V */ },
+	{ .supply =3D "vci", /* 3.0 V */ },
+};
+
+struct samsung_souxp00_a {
+	struct drm_panel panel;
+	struct mipi_dsi_device *dsi;
+	struct drm_dsc_config dsc;
+	struct regulator_bulk_data *supplies;
+	struct gpio_desc *reset_gpio;
+	enum panel_type panel_type;
+};
+
+static inline struct samsung_souxp00_a *
+to_samsung_souxp00_a(struct drm_panel *panel)
+{
+	return container_of(panel, struct samsung_souxp00_a, panel);
+}
+
+static int samsung_souxp00_a_program(struct samsung_souxp00_a *ctx)
+{
+	const u16 hdisplay =3D enable_4k ? 1644 : 1096;
+	const u16 vdisplay =3D enable_4k ? 3840 : 2560;
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi };
+
+	dsi_ctx.dsi->mode_flags |=3D MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 10);
+
+	if (ctx->panel_type =3D=3D PANEL_TYPE_07) {
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdd, 0x00, 0x80, 0x00, 0x00);
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	}
+
+	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	mipi_dsi_compression_mode_multi(&dsi_ctx, true);
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, enable_4k ? 0 : 1);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+
+	mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0, hdisplay - 1);
+	mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0, vdisplay - 1);
+
+	if (ctx->panel_type =3D=3D PANEL_TYPE_01) {
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x70);
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x60);
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	}
+
+	/* Enable backlight control */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+				     WRITE_CONTROL_DISPLAY_BACKLIGHT);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc5, 0x2e, 0x21);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_msleep(&dsi_ctx, 110);
+
+	return dsi_ctx.accum_err;
+}
+
+static int samsung_souxp00_a_prepare(struct drm_panel *panel)
+{
+	struct samsung_souxp00_a *ctx =3D to_samsung_souxp00_a(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi };
+	struct drm_dsc_picture_parameter_set pps;
+	struct device *dev =3D &ctx->dsi->dev;
+	int ret;
+
+	ret =3D regulator_bulk_enable(ARRAY_SIZE(samsung_souxp00_a_supplies), ctx=
->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators: %d\n", ret);
+		return ret;
+	}
+
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(10000, 11000);
+
+	ret =3D samsung_souxp00_a_program(ctx);
+	if (ret < 0) {
+		dev_err(dev, "Failed to program panel: %d\n", ret);
+		goto fail;
+	}
+
+	drm_dsc_pps_payload_pack(&pps, &ctx->dsc);
+
+	mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps);
+	mipi_dsi_compression_mode_multi(&dsi_ctx, true);
+	mipi_dsi_msleep(&dsi_ctx, 28);
+
+	ret =3D dsi_ctx.accum_err;
+
+	if (ret < 0)
+		goto fail;
+
+	return 0;
+
+fail:
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	regulator_bulk_disable(ARRAY_SIZE(samsung_souxp00_a_supplies), ctx->suppl=
ies);
+	return ret;
+}
+
+static int samsung_souxp00_a_enable(struct drm_panel *panel)
+{
+	struct samsung_souxp00_a *ctx =3D to_samsung_souxp00_a(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi };
+
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+
+	return dsi_ctx.accum_err;
+}
+
+static int samsung_souxp00_a_disable(struct drm_panel *panel)
+{
+	struct samsung_souxp00_a *ctx =3D to_samsung_souxp00_a(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi };
+
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 17);
+
+	return dsi_ctx.accum_err;
+}
+
+static int samsung_souxp00_a_unprepare(struct drm_panel *panel)
+{
+	struct samsung_souxp00_a *ctx =3D to_samsung_souxp00_a(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi };
+
+	if (ctx->panel_type =3D=3D PANEL_TYPE_01) {
+		mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+					     WRITE_CONTROL_DISPLAY_BACKLIGHT);
+		mipi_dsi_msleep(&dsi_ctx, 17);
+	}
+
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 100);
+
+	dsi_ctx.dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM;
+
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	regulator_bulk_disable(ARRAY_SIZE(samsung_souxp00_a_supplies), ctx->suppl=
ies);
+
+	return dsi_ctx.accum_err;
+}
+
+/*
+ * Small fake porch to force the DSI pclk/byteclk
+ * high enough to have a smooth panel at 60Hz.
+ *
+ * 60 for 4k, or 40 for 2.5k is fine for Griffin, but not PDX203.
+ * Even at 84 there's still the occasional hiccup.
+ */
+static const int fake_porch =3D 98;
+
+static const struct drm_display_mode samsung_souxp00_a_2_5k_mode =3D {
+	.clock =3D (1096 + fake_porch) * 2560 * 60 / 1000,
+	.hdisplay =3D 1096,
+	.hsync_start =3D 1096 + fake_porch,
+	.hsync_end =3D 1096 + fake_porch,
+	.htotal =3D 1096 + fake_porch,
+	.vdisplay =3D 2560,
+	.vsync_start =3D 2560,
+	.vsync_end =3D 2560,
+	.vtotal =3D 2560,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static const struct drm_display_mode samsung_souxp00_a_4k_mode =3D {
+	.clock =3D (1644 + fake_porch) * 3840 * 60 / 1000,
+	.hdisplay =3D 1644,
+	.hsync_start =3D 1644 + fake_porch,
+	.hsync_end =3D 1644 + fake_porch,
+	.htotal =3D 1644 + fake_porch,
+	.vdisplay =3D 3840,
+	.vsync_start =3D 3840,
+	.vsync_end =3D 3840,
+	.vtotal =3D 3840,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static int samsung_souxp00_a_get_modes(struct drm_panel *panel,
+				     struct drm_connector *connector)
+{
+	if (enable_4k)
+		return drm_connector_helper_get_modes_fixed(
+			connector, &samsung_souxp00_a_4k_mode);
+	else
+		return drm_connector_helper_get_modes_fixed(
+			connector, &samsung_souxp00_a_2_5k_mode);
+}
+
+static const struct drm_panel_funcs samsung_souxp00_a_panel_funcs =3D {
+	.prepare =3D samsung_souxp00_a_prepare,
+	.enable =3D samsung_souxp00_a_enable,
+	.disable =3D samsung_souxp00_a_disable,
+	.unprepare =3D samsung_souxp00_a_unprepare,
+	.get_modes =3D samsung_souxp00_a_get_modes,
+};
+
+static int samsung_souxp00_a_bl_update_status(struct backlight_device *bl)
+{
+	struct mipi_dsi_device *dsi =3D bl_get_data(bl);
+	u16 brightness =3D backlight_get_brightness(bl);
+
+	return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+}
+
+static int samsung_souxp00_a_bl_get_brightness(struct backlight_device *bl)
+{
+	struct mipi_dsi_device *dsi =3D bl_get_data(bl);
+	u16 brightness;
+	int ret;
+
+	ret =3D mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness);
+
+	if (ret < 0)
+		return ret;
+
+	return brightness;
+}
+
+static const struct backlight_ops samsung_souxp00_a_bl_ops =3D {
+	.update_status =3D samsung_souxp00_a_bl_update_status,
+	.get_brightness =3D samsung_souxp00_a_bl_get_brightness,
+};
+
+static int samsung_souxp00_a_probe(struct mipi_dsi_device *dsi)
+{
+	const struct backlight_properties props =3D {
+		.type =3D BACKLIGHT_RAW,
+		.brightness =3D 400,
+		.max_brightness =3D 4095,
+	};
+	const u16 hdisplay =3D enable_4k ? 1644 : 1096;
+	struct device *dev =3D &dsi->dev;
+	struct samsung_souxp00_a *ctx;
+	int ret;
+
+	ctx =3D devm_drm_panel_alloc(dev, struct samsung_souxp00_a, panel,
+				   &samsung_souxp00_a_panel_funcs,
+				   DRM_MODE_CONNECTOR_DSI);
+	if (IS_ERR(ctx))
+		return PTR_ERR(ctx);
+
+	ctx->panel_type =3D (enum panel_type)of_device_get_match_data(dev);
+
+	ret =3D devm_regulator_bulk_get_const(
+		dev,
+		ARRAY_SIZE(samsung_souxp00_a_supplies),
+		samsung_souxp00_a_supplies,
+		&ctx->supplies);
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+	ctx->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(ctx->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+				     "Failed to get reset-gpios\n");
+
+	ctx->dsi =3D dsi;
+	mipi_dsi_set_drvdata(dsi, ctx);
+
+	dsi->lanes =3D 4;
+	dsi->format =3D MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags =3D MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+	ctx->panel.prepare_prev_first =3D true;
+
+	ctx->panel.backlight =3D devm_backlight_device_register(
+		dev, dev_name(dev), dev, dsi,
+		&samsung_souxp00_a_bl_ops,
+		&props);
+	if (IS_ERR(ctx->panel.backlight))
+		return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+				     "Failed to create backlight\n");
+
+	drm_panel_add(&ctx->panel);
+
+	/* This panel only supports DSC; unconditionally enable it */
+	dsi->dsc =3D &ctx->dsc;
+
+	ctx->dsc.dsc_version_major =3D 1;
+	ctx->dsc.dsc_version_minor =3D 1;
+
+	ctx->dsc.slice_height =3D 32;
+	ctx->dsc.slice_count =3D 2;
+	/*
+	 * hdisplay should be read from the selected mode once
+	 * it is passed back to drm_panel (in prepare?)
+	 */
+	WARN_ON(hdisplay % ctx->dsc.slice_count);
+	ctx->dsc.slice_width =3D hdisplay / ctx->dsc.slice_count;
+	ctx->dsc.bits_per_component =3D 8;
+	ctx->dsc.bits_per_pixel =3D 8 << 4; /* 4 fractional bits */
+	ctx->dsc.block_pred_enable =3D true;
+
+	ret =3D mipi_dsi_attach(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
+		drm_panel_remove(&ctx->panel);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void samsung_souxp00_a_remove(struct mipi_dsi_device *dsi)
+{
+	struct samsung_souxp00_a *ctx =3D mipi_dsi_get_drvdata(dsi);
+	int ret;
+
+	ret =3D mipi_dsi_detach(dsi);
+	if (ret < 0)
+		dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+	drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id samsung_souxp00_a_of_match[] =3D {
+	{ .compatible =3D "samsung,souxp00-a-amb650wh01",
+	  .data =3D (void *)PANEL_TYPE_01 },
+	{ .compatible =3D "samsung,souxp00-a-amb650wh07",
+	  .data =3D (void *)PANEL_TYPE_07 },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, samsung_souxp00_a_of_match);
+
+static struct mipi_dsi_driver samsung_souxp00_a_driver =3D {
+	.probe =3D samsung_souxp00_a_probe,
+	.remove =3D samsung_souxp00_a_remove,
+	.driver =3D {
+		.name =3D "panel-samsung-souxp00-a",
+		.of_match_table =3D samsung_souxp00_a_of_match,
+	},
+};
+module_mipi_dsi_driver(samsung_souxp00_a_driver);
+
+MODULE_AUTHOR("Marijn Suijten <marijn.suijten@somainline.org>");
+MODULE_DESCRIPTION("DRM panel driver for Samsung SOUXP00-A Display-Driver-=
IC panels");
+MODULE_LICENSE("GPL");

--=20
2.52.0