From nobody Tue Feb 10 14:32:10 2026
Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [5.144.164.170])
	(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
	(No client certificate requested)
	by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35CA0450F2
	for <linux-kernel@vger.kernel.org>; Sun, 21 Dec 2025 23:32:28 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
 arc=none smtp.client-ip=5.144.164.170
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
	t=1766359953; cv=none;
 b=jZeAMwo2nZfdrL4xqbBhB3WjYXxcme3upB+VLG6spyvXSCfOki88jRCV+FacgsheLt96mHb+8S8JW9nhnMlMZYySAYG2KQzxef2zgzPGGStYSZ60/fowhEpk6XMK3tUarru2Gi/W+VW/mJeuAdX0qxJv4TsWxjkPk1ai/wgT7sw=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
	s=arc-20240116; t=1766359953; c=relaxed/simple;
	bh=ZwAlx21oQfm+SIs6bP1zmqrCoZSpLJr7y9lu5q+M5/E=;
	h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:
	 In-Reply-To:To:Cc;
 b=GTDvg8fRY6+1lwNbiiaxaTQSFYbY8vLpvykQyO6Apt46Wu+oBw/tcSqjoAFYNMhJQ6drjMlISvNC2LkeMoQzCDVYHL3bAyW6f4bhvt+KwpKcT2WJW7OL/jSSEEosH1bH/h5FZ1/rbmpEedy+Nfa0vUekvnUuO32PudTSUKpEHjc=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
 dmarc=none (p=none dis=none) header.from=somainline.org;
 spf=pass smtp.mailfrom=somainline.org; arc=none smtp.client-ip=5.144.164.170
Authentication-Results: smtp.subspace.kernel.org;
 dmarc=none (p=none dis=none) header.from=somainline.org
Authentication-Results: smtp.subspace.kernel.org;
 spf=pass smtp.mailfrom=somainline.org
Received: from Marijn-Arch-PC.localdomain
 (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86])
	(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
	 key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
 SHA256)
	(No client certificate requested)
	by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 2EB221F8F9;
	Mon, 22 Dec 2025 00:32:26 +0100 (CET)
From: Marijn Suijten <marijn.suijten@somainline.org>
Date: Mon, 22 Dec 2025 00:32:17 +0100
Subject: [PATCH v2 11/11] drm/panel: Add panel driver for Samsung ANA6707
 DDIC
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: quoted-printable
Message-Id: <20251222-drm-panels-sony-v2-11-82a87465d163@somainline.org>
References: <20251222-drm-panels-sony-v2-0-82a87465d163@somainline.org>
In-Reply-To: <20251222-drm-panels-sony-v2-0-82a87465d163@somainline.org>
To: Neil Armstrong <neil.armstrong@linaro.org>,
 Sam Ravnborg <sam@ravnborg.org>, David Airlie <airlied@gmail.com>,
 Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, Andy Gross <agross@kernel.org>,
 Bjorn Andersson <andersson@kernel.org>,
 Jessica Zhang <jesszhan0024@gmail.com>,
 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
 Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>,
 Simona Vetter <simona@ffwll.ch>, Casey Connolly <casey.connolly@linaro.org>,
 Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
 Simona Vetter <simona.vetter@ffwll.ch>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>,
 Martin Botka <martin.botka@somainline.org>,
 Jami Kettunen <jami.kettunen@somainline.org>,
 dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
 devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
 Abhinav Kumar <quic_abhinavk@quicinc.com>,
 Kuogee Hsieh <quic_khsieh@quicinc.com>,
 Jessica Zhang <quic_jesszhan@quicinc.com>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
 Marijn Suijten <marijn.suijten@somainline.org>,
 Konrad Dybcio <konradybcio@kernel.org>, Dmitry Baryshkov <lumag@kernel.org>
X-Mailer: b4 0.14.3
X-Developer-Signature: v=1; a=openpgp-sha256; l=17963;
 i=marijn.suijten@somainline.org; h=from:subject:message-id;
 bh=ZwAlx21oQfm+SIs6bP1zmqrCoZSpLJr7y9lu5q+M5/E=;
 b=owEBbQKS/ZANAwAKAfFi0jHH5IZ2AcsmYgBpSIN8zwY4fgnDif6LDQ5tiPfdKhUxGZYidcxUl
 lpdL1dLnQ6JAjMEAAEKAB0WIQROiwG5pb6la1/WZxbxYtIxx+SGdgUCaUiDfAAKCRDxYtIxx+SG
 ds+DD/9Ty0bj2LsnMHBOsp2IwrVatrVerRU5vg+G2QAiIFSNpRCdIwcvwgvgCj06S588WcjpzTN
 jTM0+3wVEq42ms0ap5wqJTyHHKVw/iM2UMqIWdrqqhxx+2fOsZzlaBU7Yo+5Bs5nArzQaxpindx
 E31r4OeDJ7SVX73S55z0SwOdGEZstRWJQlJ3t6HCkNW3UgbQ3frjqk5Ji0sNK94h0p6pFmY3Cwt
 pW6Tc/G6kh58iejy8qiblrbEScwt/9o9NFOJOuojij06TE9kV/V7DcKgSL3fdPlbx5XMJ3M4VqE
 bwBs3mGUMoKvLDgCtGDikZ6oRDn8cnK5312VidVo0qNVPpl+w8ESr9BFt8jXMcn6ds39QEEtSsh
 axeq2dR6LIAxv53cGzCBc/thNVGoM8XwuCWVHBA3McF+7BEnf/2wZ5mXFR/IQF5vcBu+Ehk+r4J
 yN2ZQUDyge2b9eLZ8Heglq+ht5JGiAzfEmTCpgSniv7QL31p3GoPJW7jaJWj/4QFxkmYYZHpW6N
 YyxM8BY/qmjzIxhVGGqsylImLdobe/sAQdNvE4CCLOQs7bBuJUpxhUSFAUB/I8ZZyP80aUMcFsn
 RwvhLzZJv+Ve2USbQcS+xuexaBmhL/SQ++c7QZz1cWheDvmmjUEGpAhp7auZ4RN30V6EmXgaQDH
 G0kIOiErPeuWWiQ==
X-Developer-Key: i=marijn.suijten@somainline.org; a=openpgp;
 fpr=4E8B01B9A5BEA56B5FD66716F162D231C7E48676

The ANA6707 Display-Driver-IC is paired with the amb650yl01 panel in the
Sony Xperia 1 III, Sony Xperia 1 IV and Sony Xperia V smartphones.  It
uses Display Stream Compression 1.1 and requires dual DSI interfaces to
satisfy the bandwidth requirements to run at 1644x3840 at 120Hz.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 MAINTAINERS                                   |   1 +
 drivers/gpu/drm/panel/Kconfig                 |  16 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 drivers/gpu/drm/panel/panel-samsung-ana6707.c | 461 ++++++++++++++++++++++=
++++
 4 files changed, 479 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 148b1f66c98b..b29adf972dfc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8150,6 +8150,7 @@ DRM DRIVER FOR SAMSUNG ANA6707 DDIC
 M:	Marijn Suijten <marijn.suijten@somainline.org>
 S:	Maintained
 F:	Documentation/devicetree/bindings/display/panel/samsung,ana6707.yaml
+F:	drivers/gpu/drm/panel/panel-samsung-ana6707.c
=20
 DRM DRIVER FOR SAMSUNG DB7430 PANELS
 M:	Linus Walleij <linusw@kernel.org>
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 3cca1c580d50..eda808b9d466 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -752,6 +752,22 @@ config DRM_PANEL_SAMSUNG_AMS639RQ08
 	  Say Y or M here if you want to enable support for the
 	  Samsung AMS639RQ08 FHD Plus (2340x1080@60Hz) CMD mode panel.
=20
+config DRM_PANEL_SAMSUNG_ANA6707
+	tristate "Samsung ANA6707 DSI cmd mode panels"
+	depends on GPIOLIB
+	depends on OF
+	depends on DRM_MIPI_DSI
+	depends on BACKLIGHT_CLASS_DEVICE
+	select DRM_DISPLAY_DSC_HELPER
+	select DRM_DISPLAY_HELPER
+	help
+	  Say Y here if you want to enable support for the Samsung 4k 6.5" OLED d=
ual-DSI
+	  command mode amb650yl01 panel found in the Sony Xperia 1 III, Sony Xper=
ia 1 IV
+	  and Sony Xperia V smartphones.
+
+	  This Display-IC uses Display Stream Compression 1.1 and features a 1644=
x3840
+	  and 1096x2560 resolution which can both be driven at 60Hz and 120Hz.
+
 config DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24
 	tristate "Samsung AMS427AP24 panel with S6E88A0 controller"
 	depends on GPIOLIB && OF && REGULATOR
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index c19429b9e48d..146750b93455 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_DRM_PANEL_RENESAS_R69328) +=3D panel-renesas=
-r69328.o
 obj-$(CONFIG_DRM_PANEL_RONBO_RB070D30) +=3D panel-ronbo-rb070d30.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01) +=3D panel-samsung-ams581vf01.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08) +=3D panel-samsung-ams639rq08.o
+obj-$(CONFIG_DRM_PANEL_SAMSUNG_ANA6707) +=3D panel-samsung-ana6707.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20) +=3D panel-samsung-atna33xc20.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_DB7430) +=3D panel-samsung-db7430.o
 obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) +=3D panel-samsung-ld9040.o
diff --git a/drivers/gpu/drm/panel/panel-samsung-ana6707.c b/drivers/gpu/dr=
m/panel/panel-samsung-ana6707.c
new file mode 100644
index 000000000000..83bf954e89d3
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-samsung-ana6707.c
@@ -0,0 +1,461 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Marijn Suijten <marijn.suijten@somainline.org>
+ *
+ * Based on the following Sony downstream DTS command sequences:
+ * - Xperia 1 III (sagami pdx215): https://github.com/sonyxperiadev/kernel=
-copyleft-dts/blob/61.2.A.0.xxx/somc/dsi-panel-ana6707_amb650yl01-uhd-pvt.d=
tsi
+ * - Xperia 1 IV (nagara pdx223): https://github.com/sonyxperiadev/kernel-=
copyleft-dts/blob/64.1.A.0.xxx/display-devicetree/display/dsi-panel-ana6707=
_amb650yl01-uhd-pdx223.dtsi
+ * - Xperia 1 V (yodo pdx234): https://github.com/sonyxperiadev/kernel-cop=
yleft-dts/blob/67.0.A.1.xxx/display-devicetree/display/dsi-panel-ana6707_am=
b650yl01-uhd.dtsi
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/display/drm_dsc.h>
+#include <drm/display/drm_dsc_helper.h>
+
+#define WRITE_CONTROL_DISPLAY_BACKLIGHT BIT(5)
+
+/*
+ * TODO: This should be communicated via the mode when .prepare
+ * receives atomic commit info
+ */
+static const bool enable_4k =3D false, enable_120hz =3D true;
+
+const struct regulator_bulk_data samsung_ana6707_supplies[] =3D {
+	{ .supply =3D "vddio", /* 1.8 V */ },
+	{ .supply =3D "vci", /* 3.0 V */ },
+};
+
+struct samsung_ana6707 {
+	struct drm_panel panel;
+	struct mipi_dsi_device *dsi[2];
+	struct drm_dsc_config dsc;
+	struct regulator_bulk_data *supplies;
+	struct gpio_desc *reset_gpio;
+};
+
+static inline struct samsung_ana6707 *
+to_samsung_ana6707(struct drm_panel *panel)
+{
+	return container_of(panel, struct samsung_ana6707, panel);
+}
+
+static void samsung_ana6707_reset(struct samsung_ana6707 *ctx)
+{
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(5000, 6000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	usleep_range(1000, 2000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(10000, 11000);
+}
+
+static int samsung_ana6707_program(struct samsung_ana6707 *ctx)
+{
+	const u16 hdisplay =3D enable_4k ? 1644 : 1096;
+	const u16 vdisplay =3D enable_4k ? 3840 : 2560;
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi[0] };
+
+	ctx->dsi[0]->mode_flags &=3D ~MIPI_DSI_MODE_LPM;
+	ctx->dsi[1]->mode_flags |=3D MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 15);
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x44);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbd, 0x00, 0xa0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x46, 0x00, 0x0e, 0x90);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60,
+				     enable_4k ? 0x00 : 0x04,
+				     enable_120hz ? 0x00 : 0xc0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+
+	mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0, hdisplay - 1);
+	mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0, vdisplay - 1);
+	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	/*
+	 * Warning: downstream codes this to 3840 only in 1069x2560@60Hz mode, wh=
ich causes
+	 * tearing and an ugly DSC-corruption-like line at the top of the screen.
+	 * enable_4k | enable_120hz ? 0 : 3840
+	 */
+	mipi_dsi_dcs_set_tear_scanline_multi(&dsi_ctx, 0);
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x09, 0x78);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+				     WRITE_CONTROL_DISPLAY_BACKLIGHT);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x27, 0x25);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x82);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+	mipi_dsi_msleep(&dsi_ctx, 110);
+
+	return 0;
+}
+
+static int samsung_ana6707_prepare(struct drm_panel *panel)
+{
+	struct samsung_ana6707 *ctx =3D to_samsung_ana6707(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi[0] };
+	struct mipi_dsi_device *dsi =3D ctx->dsi[0];
+	struct device *dev =3D &dsi->dev;
+	struct drm_dsc_picture_parameter_set pps;
+	int ret;
+
+	ret =3D regulator_bulk_enable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->=
supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators: %d\n", ret);
+		return ret;
+	}
+
+	samsung_ana6707_reset(ctx);
+
+	msleep(120);
+
+	ret =3D samsung_ana6707_program(ctx);
+	if (ret < 0) {
+		dev_err(dev, "Failed to initialize panel: %d\n", ret);
+		goto fail;
+	}
+
+	msleep(120);
+
+	drm_dsc_pps_payload_pack(&pps, &ctx->dsc);
+
+	mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps);
+	mipi_dsi_compression_mode_multi(&dsi_ctx, true);
+	mipi_dsi_msleep(&dsi_ctx, 28);
+
+	ret =3D dsi_ctx.accum_err;
+
+	if (ret < 0)
+		goto fail;
+
+	return 0;
+
+fail:
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	regulator_bulk_disable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->supplie=
s);
+	return ret;
+}
+
+static int samsung_ana6707_enable(struct drm_panel *panel)
+{
+	struct samsung_ana6707 *ctx =3D to_samsung_ana6707(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi[0] };
+
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 10);
+
+	return dsi_ctx.accum_err;
+}
+
+static int samsung_ana6707_disable(struct drm_panel *panel)
+{
+	struct samsung_ana6707 *ctx =3D to_samsung_ana6707(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi[0] };
+
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 20);
+
+	return dsi_ctx.accum_err;
+}
+
+static int samsung_ana6707_unprepare(struct drm_panel *panel)
+{
+	struct samsung_ana6707 *ctx =3D to_samsung_ana6707(panel);
+	struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi[0] };
+
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	ctx->dsi[0]->mode_flags &=3D ~MIPI_DSI_MODE_LPM;
+	ctx->dsi[1]->mode_flags &=3D ~MIPI_DSI_MODE_LPM;
+
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	regulator_bulk_disable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->supplie=
s);
+
+	return dsi_ctx.accum_err;
+}
+
+static const int fake_porch_4k =3D 120;
+
+/*
+ * All of the horizontal values here are x2 of what's specified in the dow=
nstream device-tree,
+ * as the information there has already been pre-divided by the number of =
DSI hosts
+ */
+
+static const struct drm_display_mode samsung_ana6707_mode_4k =3D {
+	.clock =3D (1644 + fake_porch_4k) * 3840 * 60 / 1000,
+	.hdisplay =3D 1644,
+	.hsync_start =3D 1644,
+	.hsync_end =3D 1644,
+	.htotal =3D 1644 + fake_porch_4k,
+	.vdisplay =3D 3840,
+	.vsync_start =3D 3840,
+	.vsync_end =3D 3840,
+	.vtotal =3D 3840,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch_4k_120 =3D 216;
+
+static const struct drm_display_mode samsung_ana6707_mode_4k_120 =3D {
+	.clock =3D (1644 + fake_porch_4k_120) * 3840 * 120 / 1000,
+	.hdisplay =3D 1644,
+	.hsync_start =3D 1644,
+	.hsync_end =3D 1644,
+	.htotal =3D 1644 + fake_porch_4k_120,
+	.vdisplay =3D 3840,
+	.vsync_start =3D 3840,
+	.vsync_end =3D 3840,
+	.vtotal =3D 3840,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch =3D 100;
+
+static const struct drm_display_mode samsung_ana6707_mode =3D {
+	.clock =3D (1096 + fake_porch) * 2560 * 60 / 1000,
+	.hdisplay =3D 1096,
+	.hsync_start =3D 1096,
+	.hsync_end =3D 1096,
+	.htotal =3D 1096 + fake_porch,
+	.vdisplay =3D 2560,
+	.vsync_start =3D 2560,
+	.vsync_end =3D 2560,
+	.vtotal =3D 2560,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch_120 =3D 130;
+
+static const struct drm_display_mode samsung_ana6707_mode_120 =3D {
+	.clock =3D (1096 + fake_porch_120) * 2560 * 120 / 1000,
+	.hdisplay =3D 1096,
+	.hsync_start =3D 1096,
+	.hsync_end =3D 1096,
+	.htotal =3D 1096 + fake_porch_120,
+	.vdisplay =3D 2560,
+	.vsync_start =3D 2560,
+	.vsync_end =3D 2560,
+	.vtotal =3D 2560,
+	.width_mm =3D 65,
+	.height_mm =3D 152,
+	.type =3D DRM_MODE_TYPE_DRIVER,
+};
+
+static int samsung_ana6707_get_modes(struct drm_panel *panel,
+					struct drm_connector *connector)
+{
+	const struct drm_display_mode *mode;
+
+	/*
+	 * TODO: return all 4 modes when drm_bridge/drm_panel get it back in an
+	 * atomic_prepare callback
+	 */
+	if (enable_4k) {
+		if (enable_120hz)
+			mode =3D &samsung_ana6707_mode_4k_120;
+		else
+			mode =3D &samsung_ana6707_mode_4k;
+	} else {
+		if (enable_120hz)
+			mode =3D &samsung_ana6707_mode_120;
+		else
+			mode =3D &samsung_ana6707_mode;
+	}
+
+	return drm_connector_helper_get_modes_fixed(connector, mode);
+}
+
+static const struct drm_panel_funcs samsung_ana6707_panel_funcs =3D {
+	.prepare =3D samsung_ana6707_prepare,
+	.enable =3D samsung_ana6707_enable,
+	.disable =3D samsung_ana6707_disable,
+	.unprepare =3D samsung_ana6707_unprepare,
+	.get_modes =3D samsung_ana6707_get_modes,
+};
+
+static int samsung_ana6707_bl_update_status(struct backlight_device *bl)
+{
+	struct mipi_dsi_device *dsi =3D bl_get_data(bl);
+	u16 brightness =3D backlight_get_brightness(bl);
+
+	return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+}
+
+static const struct backlight_ops samsung_ana6707_bl_ops =3D {
+	.update_status =3D samsung_ana6707_bl_update_status,
+};
+
+static int samsung_ana6707_probe(struct mipi_dsi_device *dsi)
+{
+	const struct backlight_properties props =3D {
+		.type =3D BACKLIGHT_RAW,
+		.brightness =3D 3000,
+		.max_brightness =3D 4095,
+	};
+	const u16 hdisplay =3D enable_4k ? 1644 : 1096;
+	struct mipi_dsi_host *dsi_sec_host;
+	struct samsung_ana6707 *ctx;
+	struct device *dev =3D &dsi->dev;
+	struct device_node *dsi_sec;
+	int ret, i;
+
+	ctx =3D devm_drm_panel_alloc(dev, struct samsung_ana6707, panel,
+				   &samsung_ana6707_panel_funcs,
+				   DRM_MODE_CONNECTOR_DSI);
+	if (IS_ERR(ctx))
+		return PTR_ERR(ctx);
+
+	ret =3D devm_regulator_bulk_get_const(
+		dev,
+		ARRAY_SIZE(samsung_ana6707_supplies),
+		samsung_ana6707_supplies,
+		&ctx->supplies);
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+	ctx->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(ctx->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+				     "Failed to get reset-gpios\n");
+
+	dsi_sec =3D of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
+	if (!dsi_sec)
+		return dev_err_probe(dev, -ENODEV,
+				     "Cannot find secondary DSI OF node\n");
+
+	dev_info(dev, "Using Dual-DSI with OF node `%s`\n", dsi_sec->name);
+	const struct mipi_dsi_device_info info =3D { "ANA6707", 0,
+						   dsi_sec };
+
+
+	dsi_sec_host =3D of_find_mipi_dsi_host_by_node(dsi_sec);
+	of_node_put(dsi_sec);
+	if (!dsi_sec_host)
+		return dev_err_probe(dev, -EPROBE_DEFER,
+				     "Cannot get secondary DSI host\n");
+
+	ctx->dsi[1] =3D devm_mipi_dsi_device_register_full(dev, dsi_sec_host, &in=
fo);
+	if (IS_ERR(ctx->dsi[1]))
+		return dev_err_probe(dev, PTR_ERR(ctx->dsi[1]),
+				     "Cannot register secondary DSI device\n");
+
+	mipi_dsi_set_drvdata(ctx->dsi[1], ctx);
+
+	ctx->dsi[0] =3D dsi;
+	mipi_dsi_set_drvdata(dsi, ctx);
+
+	ctx->panel.prepare_prev_first =3D true;
+
+	ctx->panel.backlight =3D devm_backlight_device_register(
+		dev, dev_name(dev), dev, dsi,
+		&samsung_ana6707_bl_ops,
+		&props);
+	if (IS_ERR(ctx->panel.backlight))
+		return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+				     "Failed to create backlight\n");
+
+	drm_panel_add(&ctx->panel);
+
+	ctx->dsc.dsc_version_major =3D 1;
+	ctx->dsc.dsc_version_minor =3D 1;
+
+	ctx->dsc.slice_height =3D 32;
+	/* One slice per encoder */
+	ctx->dsc.slice_count =3D 1;
+	ctx->dsc.slice_width =3D hdisplay / 2; /* 2 encoders */
+	ctx->dsc.bits_per_component =3D 8;
+	ctx->dsc.bits_per_pixel =3D 8 << 4; /* 4 fractional bits */
+	ctx->dsc.block_pred_enable =3D true;
+
+	for (i =3D 0; i < ARRAY_SIZE(ctx->dsi); i++) {
+		/* This panel only supports DSC; unconditionally enable it */
+		ctx->dsi[i]->dsc =3D &ctx->dsc;
+
+		ctx->dsi[i]->lanes =3D 4;
+		ctx->dsi[i]->format =3D MIPI_DSI_FMT_RGB888;
+		ctx->dsi[i]->mode_flags =3D MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+		ret =3D devm_mipi_dsi_attach(dev, ctx->dsi[i]);
+		/* TODO: Detach dsi0 if dsi1 failed? */
+		if (ret < 0) {
+			drm_panel_remove(&ctx->panel);
+			return dev_err_probe(dev, ret,
+					     "Failed to attach to DSI%d\n", i);
+		}
+	}
+
+	return 0;
+}
+
+static void samsung_ana6707_remove(struct mipi_dsi_device *dsi)
+{
+	struct samsung_ana6707 *ctx =3D mipi_dsi_get_drvdata(dsi);
+	int ret, i;
+
+	for (i =3D 0; i < ARRAY_SIZE(ctx->dsi); i++) {
+		ret =3D mipi_dsi_detach(ctx->dsi[i]);
+		if (ret < 0)
+			dev_err(&ctx->dsi[i]->dev, "Failed to detach from DSI%d host: %d\n",
+				i, ret);
+	}
+
+	drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id samsung_ana6707_of_match[] =3D {
+	{ .compatible =3D "samsung,ana6707-amb650yl01" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, samsung_ana6707_of_match);
+
+static struct mipi_dsi_driver samsung_ana6707_driver =3D {
+	.probe =3D samsung_ana6707_probe,
+	.remove =3D samsung_ana6707_remove,
+	.driver =3D {
+		.name =3D "panel-samsung-ana6707",
+		.of_match_table =3D samsung_ana6707_of_match,
+	},
+};
+module_mipi_dsi_driver(samsung_ana6707_driver);
+
+MODULE_AUTHOR("Marijn Suijten <marijn.suijten@somainline.org>");
+MODULE_DESCRIPTION("DRM panel driver for Samsung ANA6707 Display-Driver-IC=
 panels");
+MODULE_LICENSE("GPL");

--=20
2.52.0