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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7ff7e892926sm9070130b3a.66.2025.12.21.22.03.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Dec 2025 22:03:03 -0800 (PST) From: Jie Gan Date: Mon, 22 Dec 2025 14:02:23 +0800 Subject: [PATCH v6 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251222-add_sysfs_nodes_to_configure_tpda-v6-3-b27143d45c86@oss.qualcomm.com> References: <20251222-add_sysfs_nodes_to_configure_tpda-v6-0-b27143d45c86@oss.qualcomm.com> In-Reply-To: <20251222-add_sysfs_nodes_to_configure_tpda-v6-0-b27143d45c86@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jie Gan , Tao Zhang X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766383369; l=5323; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=a3nnThULr7oV9TDmuW/OSuwqdlkJ14YmI+sHJq21AiY=; b=ndpVPu7Zd6YlW43+s07whWbRTEWZF+CoDPzG92PQb0mu7Inp2bmCKUlI33aURc/3CCiHJTUAX vpwUfCu7VTvD28boN1VUpV2kG8c/YM6QVBMm9nex1SCICZppYKuSzTQ X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-ORIG-GUID: nVdpODlwJKVJnf3O-xFnVPdV-DHGFFzd X-Authority-Analysis: v=2.4 cv=EvnfbCcA c=1 sm=1 tr=0 ts=6948df29 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=BPbcchGvNsiIBzbuidUA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: nVdpODlwJKVJnf3O-xFnVPdV-DHGFFzd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIyMDA1MiBTYWx0ZWRfXxiHSCqBANAW1 FWqCjnNKZjzxqm5LIHmJphkc2A7zIbto8Nm1W4aFiaZYVC2ED36TyBPxH75ZmRbiD7s3JplxQzL uoiD2C6OopDk0SOVXTXP8sbbgI/y5tzQmcfl+Es6rVdrl3VcGf5ou6mdd04Edjvg2WbwchXX59N Z7lxW6Z2pke6wuuBbtLBvfeULUkWlAWaIiBQ/7Y7YLD3ppBKE3nVR2TtTj9/347cYb6lp7kl9Fm B3h9mZoIOczL1j2n2Ehf+DZIlKS9MZdW+jdCsc3peqLR9SJfikgxgOH7idlbGITAqUThSdDpU8r ZMY+iOhBtVXXD+vU3BQopf8ciI38DgqZkS5wWr9sRzgw+g1PxGwWCh4mw63EZ+aHBmB2+J6qOHl 5FrvSn+P+WOfxzVz1/ZT/Z5JxV0s2qAtAaoMNIxogMF213QE/XEYacWyWin/HJ/ySxSLdZ6k9Tu X7BcHhWbRU2f/r8mdZg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-21_05,2025-12-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512220052 From: Tao Zhang The TPDA_SYNC counter tracks the number of bytes transferred from the aggregator. When this count reaches the value programmed in the TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace tools to accurately parse each valid packet. Signed-off-by: Tao Zhang Reviewed-by: James Clark Co-developed-by: Jie Gan Signed-off-by: Jie Gan --- .../ABI/testing/sysfs-bus-coresight-devices-tpda | 10 +++++ drivers/hwtracing/coresight/coresight-tpda.c | 46 ++++++++++++++++++= ++++ drivers/hwtracing/coresight/coresight-tpda.h | 8 ++++ 3 files changed, 64 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/D= ocumentation/ABI/testing/sysfs-bus-coresight-devices-tpda index c8bc7b19ab25..d359d90dca72 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda @@ -41,3 +41,13 @@ Contact: Jinlong Mao , Tao= Zhang /syncr_mode +Date: December 2025 +KernelVersion: 6.19 +Contact: Jinlong Mao , Tao Zhang , Jie Gan +Description: + (RW) Set mode the of the syncr counter. + mode 0 - COUNT[11:0] value represents the approximate number of bytes mo= ved between two ASYNC packet requests + mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we = could insert an async packet every 8K + data by writing a value 13 to the COUNT[11:7] field. diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtraci= ng/coresight/coresight-tpda.c index d24a9098f1b1..7baa8a0965d3 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -163,6 +163,15 @@ static void tpda_enable_pre_port(struct tpda_drvdata *= drvdata) */ if (drvdata->trig_flag_ts) writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); + + /* Initialize with a value of 0 */ + val =3D 0; + if (drvdata->syncr_mode) + val |=3D TPDA_SYNCR_MODE_CTRL_MASK; + + /* Program the counter to its MAX value by default */ + val |=3D TPDA_SYNCR_COUNTER_MASK; + writel_relaxed(val, drvdata->base + TPDA_SYNCR); } =20 static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) @@ -385,8 +394,45 @@ static ssize_t global_flush_req_store(struct device *d= ev, } static DEVICE_ATTR_RW(global_flush_req); =20 +static ssize_t syncr_mode_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct tpda_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + unsigned long val, syncr_val; + + if (!drvdata->csdev->refcnt) + return -EINVAL; + + guard(spinlock)(&drvdata->spinlock); + syncr_val =3D readl_relaxed(drvdata->base + TPDA_SYNCR); + val =3D FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val); + + return sysfs_emit(buf, "%lu\n", val); +} + +static ssize_t syncr_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + struct tpda_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + unsigned long val; + + if (kstrtoul(buf, 0, &val)) + return -EINVAL; + + guard(spinlock)(&drvdata->spinlock); + /* set the mode when first enabling the device */ + drvdata->syncr_mode =3D !!val; + + return size; +} +static DEVICE_ATTR_RW(syncr_mode); + static struct attribute *tpda_attrs[] =3D { &dev_attr_global_flush_req.attr, + &dev_attr_syncr_mode.attr, tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), tpda_trig_sysfs_rw(trig_freq_enable, FRIE), tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtraci= ng/coresight/coresight-tpda.h index 1cc9253293ec..1d2de50bb9f9 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.h +++ b/drivers/hwtracing/coresight/coresight-tpda.h @@ -9,6 +9,7 @@ #define TPDA_CR (0x000) #define TPDA_Pn_CR(n) (0x004 + (n * 4)) #define TPDA_FPID_CR (0x084) +#define TPDA_SYNCR (0x08C) =20 /* Cross trigger global (all ports) flush request bit */ #define TPDA_CR_FLREQ BIT(0) @@ -36,6 +37,11 @@ /* Aggregator port DSB data set element size bit */ #define TPDA_Pn_CR_DSBSIZE BIT(8) =20 +/* TPDA_SYNCR counter mask */ +#define TPDA_SYNCR_COUNTER_MASK GENMASK(11, 0) +/* TPDA_SYNCR mode control bit */ +#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12) + #define TPDA_MAX_INPORTS 32 =20 /** @@ -52,6 +58,7 @@ * @trig_freq: Enable/disable cross trigger FREQ packet request interface. * @freq_ts: Enable/disable the timestamp for all FREQ packets. * @cmbchan_mode: Configure the CMB/MCMB channel mode. + * @syncr_mode: Configure the mode for counting packets. */ struct tpda_drvdata { void __iomem *base; @@ -66,6 +73,7 @@ struct tpda_drvdata { bool trig_freq; bool freq_ts; bool cmbchan_mode; + bool syncr_mode; }; =20 /* Enumerate members of global control register(cr) */ --=20 2.34.1