From nobody Mon Feb 9 03:47:08 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B613D24EF76 for ; Sun, 21 Dec 2025 21:36:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766352993; cv=none; b=Jb7sk8K9aQsFVScRZVKEeLs1FjgcqzE+KoPj9F4qYN6wiXjFNsSuyLSvYVZZXERwJH0GmY2h/jKy/Oq20xR1ljiqS6X8mCiXhhpiUlRmcgtyUfDo7RyXL2B2lfb5XTZ5Rk4VuRBO0y76mUYE7Bxq567UUazepB2bWni1lYf0+VM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766352993; c=relaxed/simple; bh=ZI/dat0pnePJL3uDPgam7hb7hJJGmBB96a+N9P+pXEU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Dj8ZSkcx0uqCp4zCX9hA6KuFg7CgQsXmRDlqCdFV4FodHMKigOff5IRPAP6doDh7RAJg+2TS2DHH7P0yuvu9VTlp4EsXmCL+AbpRictmy+V98YA6qpZN338THAE/qkc5ywFdLreHcqEoEsx1OBKAgnRpjeAo9PYYL8bg5RufZT8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=RpW8pqMS; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Ro8F9WgK; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="RpW8pqMS"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Ro8F9WgK" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BLKgoQF3548146 for ; Sun, 21 Dec 2025 21:36:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=LPwYAZthCsX O+QFdi7+uTYp6zaILxY0tD6IDNL46v60=; b=RpW8pqMS1xNcrfJo/kbs/d2xfER +e+VULeLyEiCGMaZbcTCk+JM56exryugfE25nCgZbblJLMwtwkoim292a82kAQTQ AxDqD3Wva36TcRMxHU3GNxy4HY7Xm8TJ3rBylLWPkvkTDhpVg+vUe7uFkexQvIdk uNXv0gBIQ9u8rZWwFz9t/LOgIgNK/O/gg9zlKypBijor+fhyoVt0bn36AcCDK6G6 yYCpuwJ57X9fxnKtGFzar3eYDPa8uBUUY5Zz7L0Rzui46nd8zlhnnVEcxBdroyau vg7X7cBIED2muvFP+5jX4REdM1V2yUq8lIav8x42UbLHOKpdDFMxqVdMILg== Received: from mail-pl1-f197.google.com (mail-pl1-f197.google.com [209.85.214.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b5mru2x7e-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 21 Dec 2025 21:36:30 +0000 (GMT) Received: by mail-pl1-f197.google.com with SMTP id d9443c01a7336-2a0c495fc7aso47811825ad.3 for ; Sun, 21 Dec 2025 13:36:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1766352990; x=1766957790; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LPwYAZthCsXO+QFdi7+uTYp6zaILxY0tD6IDNL46v60=; b=Ro8F9WgKGtIFxPzW81HpNL5y8NfQn1TgTc8F89IDe5CI+CJ5fy1btZs2InvvFhxC0Q B6SAhKd/3f/t6HsharODJBuYgtkkaGSgeDOsrqANO+CEsfa9101BcgUWnUHGSrQBF5lb xmb0h2qI2R+1fR5r/uwWmt+D9X8CKCTAWUvle2ggUugWbX4iXjf9HOFapdVsj0ROyPtW izzpWakIHqn6iHvCklHk2fJJQ0ufzvEjjqLkrbz04bBc2TxiHPESwpnGScbmL+JZmWPH zRwwlIJvO8Rr0x2mTFL8HTlQ2v81n+DO20UA8GUqYuNbQr9Hs66cNLj49wS05VzR3Gex wwMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766352990; x=1766957790; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=LPwYAZthCsXO+QFdi7+uTYp6zaILxY0tD6IDNL46v60=; b=PiaJTHNO14R3WOZJHJ/aD1N7r7JDMWbyfUAzpcdbABbBkNR/wILH2z1JMhGw4fNZh3 KaYzT30AONeYkcXVq/z+l0uw8MPTHm/o9f0XSHFOtcBoQ/2azDflHJDF60FNJZ1XZrhu v4ZTNkddmTC05OJqgqMfp7neleQ2Zi5Dm/577pd3QXOF8CjpsYQ6lN6+z4w1MSCS5m2s KuSYciMRbbS+K6CMeKRGRJcqsCNIaft8uvCpGuzf34rr2g1vJCsg4DcgkKOds5ZXMYcw Zap4vihqN+teQaxbXu/J9pKWgd2ETu1a9SjEQ/vzxGtZzhrXKysJA1dDK5qIg3c9D6I+ VkjQ== X-Forwarded-Encrypted: i=1; AJvYcCXidZ8AvxG3gvqT0+BlgOsEJ91fpt4nE34k9pdkoe1p2FcU5HYwg5S7fN7hPB+V67TWzBUsQg2u7d4v8Xc=@vger.kernel.org X-Gm-Message-State: AOJu0YwRDTtWyTBDloJenFR+prQRp5BFQxxbHmkFG1pM0hq0+RmXN/vT FknGTl8LyxflbWgyRj83ZiHHdPvWAOi9fDXbk30FTM0SHTtyTZQ1pFuu+I2xm9IXdrU9oopDPhH SMDK04sqQXzqFHG7tvGs62R57inNQwTGE0/A54eQRTsoXyeSK4gE32vnAhu4D6JC6p2c= X-Gm-Gg: AY/fxX5c5SQOJmBsZJHR/5IvteCha0HwQLvNippoIwttI2ckxtKko6HCeeAuc3ZBxcI ntqV9HuEWOE/tLo090wNF6wt5BglhIA2s+WDR32mshkoJ2oBNHWLXSAsG4IonZnsEoCSk0keDuR BJbtOZoZxOSGEDwPhki7mYIDGOxCeU8o4w+C8QWjxlb2CAsnksBGhQgR4VkTFZ36o9GHxUhk7hJ OQaC8aQyB1YxrEIcPwNGKIKKjGRlKXcqjlJVUohu5K5RMeledE/o06SMyTtPsP7Lga2LyoVzwcj gMs+2be41v2cN4wQnUjgYkWk/zYxjXuMdq0orcHUO6tt4xfEWFje0gSnl9r79LoUf657mIu1tn5 MbVhKOVoyneHxtAwqAJAN+dkc5FALlYHybsN+N9WO8DVD X-Received: by 2002:a05:6a21:338a:b0:35f:6e12:186f with SMTP id adf61e73a8af0-376a7aed68cmr8628733637.23.1766352989841; Sun, 21 Dec 2025 13:36:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IFd1nWrqRTbCiMSBO6UqtQqKGo3Vxxy0BoNOtDC2XC5Q4ZeI6Hvgt2VnL6bDeMMm/1vB1QfNA== X-Received: by 2002:a05:6a21:338a:b0:35f:6e12:186f with SMTP id adf61e73a8af0-376a7aed68cmr8628701637.23.1766352989279; Sun, 21 Dec 2025 13:36:29 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70dcc7c8sm10950163a91.15.2025.12.21.13.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Dec 2025 13:36:28 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, saravanak@google.com, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vijayanand Jitta Subject: [PATCH v3 1/3] of: Add convenience wrappers for of_map_id() Date: Mon, 22 Dec 2025 03:06:00 +0530 Message-Id: <20251221213602.2413124-2-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> References: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIxMDIwNCBTYWx0ZWRfX/Da6Vi4W+cur Y6Z35dEeYfG2v/VDMiMjM1O1DLBojKtFaHKb31p9XzyrRrKYaW17pfncHUukqMZjBSH6HQpRQpm k2LUEDbH8THk29gwj7U/AZIwvWs/N6OSKfvdmcm+zezerNlaob7iOVj4EeOWuFi0cRO4Sa2prT6 dPW1p3M2tkShRx80hMMW65vvqj0+pN6bGqhKfB1iBNgFKhoSiOjhbPvygis7MaQ5Md4fJ4/zzXn gCh74MKxxGzUGTXv2PLnWUe4Epq7S9uEsnHYTPoQHr6ExJclQImJ/xSq6t+K0G7HWeSc965YzX1 B/Vl1R4kvbUlMm9cTFdM8wsJI3rz2lL0ixVduEuFWCADjlW9Vr2xBtqE1Q/UFDBWtjjWn/xZcfZ ctg6WoSWvH8BMKksD4Q3wNZRNCBCWtXSe7iSs09DAhAvU95EdtRcOaug7Im0o3F9pAyg14TYlno NDhDaXPmdVSAHxHuXhw== X-Authority-Analysis: v=2.4 cv=VMnQXtPX c=1 sm=1 tr=0 ts=6948685e cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7CQSdrXTAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=zC5qE-s5kk4CCBLE0fQA:9 a=1OuFwYUASf3TG4hYMiVC:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: GtF45QOB3TTMImfC67hbtnX3D1H-VYyC X-Proofpoint-GUID: GtF45QOB3TTMImfC67hbtnX3D1H-VYyC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-21_05,2025-12-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512210204 Content-Type: text/plain; charset="utf-8" From: Robin Murphy Since we now have quite a few users parsing "iommu-map" and "msi-map" properties, give them some wrappers to conveniently encapsulate the appropriate sets of property names. This will also make it easier to then change of_map_id() to correctly account for specifier cells. Reviewed-by: Rob Herring (Arm) Signed-off-by: Robin Murphy Signed-off-by: Vijayanand Jitta Reviewed-by: Frank Li --- drivers/cdx/cdx_msi.c | 3 +-- drivers/iommu/of_iommu.c | 4 +--- drivers/irqchip/irq-gic-its-msi-parent.c | 4 ++-- drivers/of/irq.c | 3 +-- drivers/pci/controller/dwc/pci-imx6.c | 6 ++---- drivers/pci/controller/pcie-apple.c | 3 +-- drivers/xen/grant-dma-ops.c | 3 +-- include/linux/of.h | 14 ++++++++++++++ 8 files changed, 23 insertions(+), 17 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 91b95422b263..63b3544ec997 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -128,8 +128,7 @@ static int cdx_msi_prepare(struct irq_domain *msi_domai= n, int ret; =20 /* Retrieve device ID from requestor ID using parent device */ - ret =3D of_map_id(parent->of_node, cdx_dev->msi_dev_id, "msi-map", "msi-m= ap-mask", - NULL, &dev_id); + ret =3D of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &dev_id= ); if (ret) { dev_err(dev, "of_map_id failed for MSI: %d\n", ret); return ret; diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 6b989a62def2..a511ecf21fcd 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -48,9 +48,7 @@ static int of_iommu_configure_dev_id(struct device_node *= master_np, struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; int err; =20 - err =3D of_map_id(master_np, *id, "iommu-map", - "iommu-map-mask", &iommu_spec.np, - iommu_spec.args); + err =3D of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); if (err) return err; =20 diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq= -gic-its-msi-parent.c index eb1473f1448a..0884c4cbd245 100644 --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -166,7 +166,7 @@ static int of_pmsi_get_dev_id(struct irq_domain *domain= , struct device *dev, if (ret) { struct device_node *np =3D NULL; =20 - ret =3D of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np,= dev_id); + ret =3D of_map_msi_id(dev->of_node, dev->id, &np, dev_id); if (np) of_node_put(np); } @@ -211,7 +211,7 @@ static int of_v5_pmsi_get_msi_info(struct irq_domain *d= omain, struct device *dev if (ret) { struct device_node *np =3D NULL; =20 - ret =3D of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np,= dev_id); + ret =3D of_map_msi_id(dev->of_node, dev->id, &np, dev_id); if (np) { ret =3D its_translate_frame_address(np, pa); of_node_put(np); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 1cd93549d093..9549dda8f9d6 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -725,8 +725,7 @@ u32 of_msi_xlate(struct device *dev, struct device_node= **msi_np, u32 id_in) * "msi-map" or an "msi-parent" property. */ for (parent_dev =3D dev; parent_dev; parent_dev =3D parent_dev->parent) { - if (!of_map_id(parent_dev->of_node, id_in, "msi-map", - "msi-map-mask", msi_np, &id_out)) + if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &id_out)) break; if (!of_check_msi_parent(parent_dev->of_node, msi_np)) break; diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 4668fc9648bf..c8da2e88e9c6 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1106,8 +1106,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *i= mx_pcie, u32 rid) u32 sid =3D 0; =20 target =3D NULL; - err_i =3D of_map_id(dev->of_node, rid, "iommu-map", "iommu-map-mask", - &target, &sid_i); + err_i =3D of_map_iommu_id(dev->of_node, rid, &target, &sid_i); if (target) { of_node_put(target); } else { @@ -1120,8 +1119,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *i= mx_pcie, u32 rid) } =20 target =3D NULL; - err_m =3D of_map_id(dev->of_node, rid, "msi-map", "msi-map-mask", - &target, &sid_m); + err_m =3D of_map_msi_id(dev->of_node, rid, &target, &sid_m); =20 /* * err_m target diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p= cie-apple.c index 0380d300adca..ce21728d6e51 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -791,8 +791,7 @@ static int apple_pcie_enable_device(struct pci_host_bri= dge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); =20 - err =3D of_map_id(port->pcie->dev->of_node, rid, "iommu-map", - "iommu-map-mask", NULL, &sid); + err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); if (err) return err; =20 diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index 29257d2639db..b661f9c1f4fe 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -321,8 +321,7 @@ static int xen_dt_grant_init_backend_domid(struct devic= e *dev, struct pci_dev *pdev =3D to_pci_dev(dev); u32 rid =3D PCI_DEVID(pdev->bus->number, pdev->devfn); =20 - if (of_map_id(np, rid, "iommu-map", "iommu-map-mask", &iommu_spec.np, - iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index 121a288ca92d..8cd486d89da2 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1435,6 +1435,20 @@ static inline int of_property_read_s32(const struct = device_node *np, return of_property_read_u32(np, propname, (u32*) out_value); } =20 +static inline int of_map_iommu_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "iommu-map", "iommu-map-mask", + target, id_out); +} + +static inline int of_map_msi_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "msi-map", "msi-map-mask", + target, id_out); +} + #define of_for_each_phandle(it, err, np, ln, cn, cc) \ for (of_phandle_iterator_init((it), (np), (ln), (cn), (cc)), \ err =3D of_phandle_iterator_next(it); \ --=20 2.34.1 From nobody Mon Feb 9 03:47:08 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52FD7266576 for ; Sun, 21 Dec 2025 21:36:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766353000; cv=none; b=jzNmrBiQevuxT3u0c2lqD3/j2zz2OAeYma0l0D5CINmtpcKYntBeA0etC3D+Tb3I247flF/fYVv6109SFXXnYoUGvYq1mQCWZbKs0YzqEBOny4coYctgMNV4K9zy8Numgj1e0Xid+Y85QvzrvkDJ9PirTWc0daBAUyifi0yWSvo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766353000; c=relaxed/simple; bh=16TSlotBLzuOien7sfW4ukR/bjvgeC0dcRNpEifG7Xg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MPTbJl9ooRcm+1f6yxx8mKC/yAyUApi51QZNtVjS69EW2lLOZUYm8NupeyzYHM1xGVC3+yg17qolQA8lTQrnjExHSt93fydOgjkdVI7IIKFAvN+KO7i5bdD7ZiD98O8lVRStBqrIfZ5JXeyFyXzSixak5H7o7WJdfxAjMbJVZ+A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ViGoJeBV; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=S//9AJ0X; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ViGoJeBV"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="S//9AJ0X" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BLGQYiG598033 for ; Sun, 21 Dec 2025 21:36:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=RqYSFgOLrB+ uWxpGTvI492+ogxltyaVnqIFarGItNPU=; b=ViGoJeBVoo+qMjadqwFLZObEOSO c00Y2HktniIFEq7cDO15DlfG7N6peWCm303j3V+pt6McZ+dQQk7/CIz48FnFz7YZ YByPWAFSF1EnoBZ+UoXSecWN3nPqeCCfVkUNnWLnwds9uSp3tzhMbGiwLg//U5uP hAg9W8PFX8UhcAyMPkxORyt35iWoSE/J9Zr+lppIItgSJPD7AXAcB5CoveSa0VvC eSbdXDDgeW4pQGD3JcBWgRZslfFGCqRelubASSamIFvqi11RPXRuX8QKpu9cSvps gVgpOs/kNFcY5cawOgWXj2Jj0TBud6NbHQblZc5PS/Vcze74viE5NjFRZOg== Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b5mydtwn2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 21 Dec 2025 21:36:37 +0000 (GMT) Received: by mail-pl1-f199.google.com with SMTP id d9443c01a7336-29f27176aa7so71739435ad.2 for ; Sun, 21 Dec 2025 13:36:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1766352997; x=1766957797; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RqYSFgOLrB+uWxpGTvI492+ogxltyaVnqIFarGItNPU=; b=S//9AJ0X9KJIMM6D9bUfAvcTq18OKokPVM1Ynb3nZYxzbcBtMmYEnmaApUK2z980j8 qYf27fQY1ij7IlXnOdOL/1AGU9M5W5174ODgWFX8KEqCcls/Q4OhwUGbWvktrQa8LUUQ IaoUfAIUuHw3Z3fOhOjo8N3h+3i1vj8bx3iIa194CFgnnkNtxLLK28LQlNjgMzPf8Xer IXIZnPWYQ8iXe4LaTva3zavqqcRWFA26uhAGgQL3Gj8fNVsi4m0a486d2UPpTqfKzolB WpRlkcak69l5eGkWO/0sFrnscQaTsEKgob8kkMPGpP42NRlrf/WcT6G0TW8s44JT/6C6 gF8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766352997; x=1766957797; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RqYSFgOLrB+uWxpGTvI492+ogxltyaVnqIFarGItNPU=; b=pXRkZ86Rg69Jg2tgLUqbDIMi1auP9ecfxqit1DAL7EfMYRttoNhI8ImMj/A8cHahe8 mO04mFC5ciXk4n5YoaJloUsci1lxD7Po87cpJ+mnxXeWiFBYemMsb0+kpRxKPSoVnp18 dw5KRwtPMXYHrFKI1wKl1hPcFrR2rQRuXmbxev8C+DSld3Reks61B93bSrzO7vmBr+oy TLv9ttIcol5lBmkZk/qQP+Sli4Na0GQwxIFZ7hcyyUayQngVE+RmYN0Xxp4KIiTjVU2E rWfeKAFlputoJS7rnEtHtpoYWi3fX+YLpu1ymOfW4eXdb3L5BG8sLF10nZ99QFvVxKCo dCGQ== X-Forwarded-Encrypted: i=1; AJvYcCXUSwUB0Tyfj9jsoRGFN9CQ45p1ueE6KeheMtT8DTM/mrEMWN0ZnelbdkhBKXzud3l0SX3anc8RioOmemE=@vger.kernel.org X-Gm-Message-State: AOJu0YzqDBy0QzPcaK2q5xfLBOZ+Yp+pq1VmhTtabBOMbzfkdJWDqfjU MtglI4T6viGyGxeEAxCpt1blPciY/+CFx5gjVo6+ZNxRsWlqy/hlBM9ZFpzDY5T6GRJl+ifByXj p1i/ZMDOekisd09VypZg5pjnczPJ1fDQQvE+u9fcnEhrhrKlxiPf8iU+zG8oc4fqa09g= X-Gm-Gg: AY/fxX4XvD4+PEty2XtJxT9qi1+mpgMR9YYx+7u/Y+1NrQ8s/c6/f+UGvNNh/GLIb7k RZgHKekIiTVDwq9wfkUYIrU2LdaLZpKfVLPQoWRZN3sTYc0OOWZhZQNifWUFBiiT0CA3o5Pxksl EZKHIg1swq89+1HKbc60YQEyPW0bnjqD30KyoFbxEX4kZAW8dzNdbpErJUO27/C1jEq0zoaRXl0 hWYQIEJm/ADXylH/QeiAmkaeNj6RAmTwMpAw7LZ4Nl0ua1+N1FhZ57jdUpt6uBLvjpFTa2eF7RD U1sMEyZ8hW22WBs0H8voqqjoUCDDwZe7oO7V/N1pJdoMOsh5m8lCPEhre7EwuBvR6bX+qkoD8Br T6QYfOG+FRQDkwlrDejaa3njHWaW3zEobKil7BGJLIA8s X-Received: by 2002:a17:902:e74c:b0:24b:270e:56c7 with SMTP id d9443c01a7336-2a2f22069e3mr99336055ad.7.1766352996598; Sun, 21 Dec 2025 13:36:36 -0800 (PST) X-Google-Smtp-Source: AGHT+IEu5g6C1Tc1/CWkGZfdt5tr82xA9G23JSzp10gkHSKJVdHoKnPqLmFdhu0g4UYH98Hmqj3g+A== X-Received: by 2002:a17:902:e74c:b0:24b:270e:56c7 with SMTP id d9443c01a7336-2a2f22069e3mr99335915ad.7.1766352996108; Sun, 21 Dec 2025 13:36:36 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70dcc7c8sm10950163a91.15.2025.12.21.13.36.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Dec 2025 13:36:35 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, saravanak@google.com, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Charan Teja Kalla , Vijayanand Jitta Subject: [PATCH v3 2/3] of: factor arguments passed to of_map_id() into a struct Date: Mon, 22 Dec 2025 03:06:01 +0530 Message-Id: <20251221213602.2413124-3-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> References: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: yn6VINTOUEsvXSfIum8-lKoy2VRPy0BB X-Proofpoint-ORIG-GUID: yn6VINTOUEsvXSfIum8-lKoy2VRPy0BB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIxMDIwNCBTYWx0ZWRfX/CEwAv718Jrs 9jyoii4wKtuQiRBrToj29n5kn4QVhW77n5CI26G2UVulqHICe0wDiCiV7sfxbXmUzhkRvLybSE4 2Aql8inM5EV/udxWGqN1h668lqrB1f5kV0qEXQNN2n0RCxA3wMlzBN4wkJl36I3fZK1vhDR5mG4 Enf3LqAlL2Lu7M/Z8ZQ1qVCWY3lvldDuRDNr9ml62k6b29dp0aa9w65v85WgU2dajczi/EdBqG1 mR0TqNH3YpsA52spb74DWOJYDRLs8M/WW1rwS9BhT5iTaRLDZAvIJDXbUnQxXhDwM3Y2LQTL3D9 D76Vt9LK/+9IORHZk0J79TtyErcqpwh2DgkM7QeX1D5dBGyfN4U+fKAtimOmpxIL3YzKrUxQOMo 0+GB7Oxg/lZqRwb8jPUMV1iboKfWgi2JVfpb30J3acUExZif4gkafKZ6feKRvZDKQ/Pwvr04eix U9O39BbmrWNWMzB3T/g== X-Authority-Analysis: v=2.4 cv=N6wk1m9B c=1 sm=1 tr=0 ts=69486865 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=BO5FrL0GhfMJBgYdYhUA:9 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-21_05,2025-12-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 phishscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512210204 Content-Type: text/plain; charset="utf-8" From: Charan Teja Kalla Introduce a new struct type where the optional arguments passed to of_map_id() are Currently embedded as of_phandle_args struct. Subsequent patches add additional arguments to the struct that the caller expects to be filled of_map_id(). Suggested-by: Rob Herring (Arm) Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta --- drivers/iommu/of_iommu.c | 5 +++- drivers/of/base.c | 39 ++++++++++++++------------- drivers/pci/controller/dwc/pci-imx6.c | 6 ++++- drivers/pci/controller/pcie-apple.c | 5 +++- drivers/xen/grant-dma-ops.c | 4 ++- include/linux/of.h | 24 ++++++++++++----- 6 files changed, 53 insertions(+), 30 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index a511ecf21fcd..74779b77ba13 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -46,9 +46,12 @@ static int of_iommu_configure_dev_id(struct device_node = *master_np, const u32 *id) { struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct of_map_id_arg arg =3D { + .map_args =3D iommu_spec, + }; int err; =20 - err =3D of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); + err =3D of_map_iommu_id(master_np, *id, &arg); if (err) return err; =20 diff --git a/drivers/of/base.c b/drivers/of/base.c index 7043acd971a0..4dca3d37a34b 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2051,8 +2051,11 @@ int of_find_last_cache_level(unsigned int cpu) * @id: device ID to map. * @map_name: property name of the map to use. * @map_mask_name: optional property name of the mask to use. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @arg: contains the optional params, wrapped in a struct of_phandle_args, + * which includes: + * np: pointer to the target device node + * args_count: number of arguments + * args[]: array to receive the translated ID(s). * * Given a device ID, look up the appropriate implementation-defined * platform ID and/or the target device which receives transactions on that @@ -2066,21 +2069,21 @@ int of_find_last_cache_level(unsigned int cpu) */ int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { u32 map_mask, masked_id; int map_len; const __be32 *map =3D NULL; =20 - if (!np || !map_name || (!target && !id_out)) + if (!np || !map_name || !arg || (!arg->map_args.np && !arg->map_args.args= )) return -EINVAL; =20 map =3D of_get_property(np, map_name, &map_len); if (!map) { - if (target) + if (arg->map_args.np) return -ENODEV; /* Otherwise, no map implies no translation */ - *id_out =3D id; + *arg->map_args.args =3D id; return 0; } =20 @@ -2122,18 +2125,16 @@ int of_map_id(const struct device_node *np, u32 id, if (!phandle_node) return -ENODEV; =20 - if (target) { - if (*target) - of_node_put(phandle_node); - else - *target =3D phandle_node; + if (arg->map_args.np) + of_node_put(phandle_node); + else + arg->map_args.np =3D phandle_node; =20 - if (*target !=3D phandle_node) - continue; - } + if (arg->map_args.np !=3D phandle_node) + continue; =20 - if (id_out) - *id_out =3D masked_id - id_base + out_base; + if (arg->map_args.args) + *arg->map_args.args =3D masked_id - id_base + out_base; =20 pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, leng= th: %08x, id: %08x -> %08x\n", np, map_name, map_mask, id_base, out_base, @@ -2142,11 +2143,11 @@ int of_map_id(const struct device_node *np, u32 id, } =20 pr_info("%pOF: no %s translation for id 0x%x on %pOF\n", np, map_name, - id, target && *target ? *target : NULL); + id, arg->map_args.np ? arg->map_args.np : NULL); =20 /* Bypasses translation */ - if (id_out) - *id_out =3D id; + if (arg->map_args.args) + *arg->map_args.args =3D id; return 0; } EXPORT_SYMBOL_GPL(of_map_id); diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index c8da2e88e9c6..8dcdde2efb8a 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1101,12 +1101,16 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie = *imx_pcie, u32 rid) { struct device *dev =3D imx_pcie->pci->dev; struct device_node *target; + struct of_map_id_arg arg =3D {}; u32 sid_i, sid_m; int err_i, err_m; u32 sid =3D 0; =20 target =3D NULL; - err_i =3D of_map_iommu_id(dev->of_node, rid, &target, &sid_i); + + arg.map_args.np =3D target; + arg.map_args.args[0] =3D sid_i; + err_i =3D of_map_iommu_id(dev->of_node, rid, &arg); if (target) { of_node_put(target); } else { diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p= cie-apple.c index ce21728d6e51..dea4a38cb4bb 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -782,6 +782,7 @@ static int apple_pcie_enable_device(struct pci_host_bri= dge *bridge, struct pci_d { u32 sid, rid =3D pci_dev_id(pdev); struct apple_pcie_port *port; + struct of_map_id_arg arg =3D {}; int idx, err; =20 port =3D apple_pcie_get_port(pdev); @@ -791,7 +792,9 @@ static int apple_pcie_enable_device(struct pci_host_bri= dge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); =20 - err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); + arg.map_args.np =3D NULL; + arg.map_args.args[0] =3D sid; + err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, &arg); if (err) return err; =20 diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index b661f9c1f4fe..d455104de159 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -319,9 +319,11 @@ static int xen_dt_grant_init_backend_domid(struct devi= ce *dev, =20 if (dev_is_pci(dev)) { struct pci_dev *pdev =3D to_pci_dev(dev); + struct of_map_id_arg arg =3D {}; u32 rid =3D PCI_DEVID(pdev->bus->number, pdev->devfn); =20 - if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { + arg.map_args =3D iommu_spec; + if (of_map_iommu_id(np, rid, &arg)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index 8cd486d89da2..0b0d545b80a3 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -74,6 +74,10 @@ struct of_phandle_args { uint32_t args[MAX_PHANDLE_ARGS]; }; =20 +struct of_map_id_arg { + struct of_phandle_args map_args; +}; + struct of_phandle_iterator { /* Common iterator information */ const char *cells_name; @@ -458,7 +462,7 @@ bool of_console_check(const struct device_node *dn, cha= r *name, int index); =20 int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out); + struct of_map_id_arg *arg); =20 phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); =20 @@ -907,7 +911,7 @@ static inline void of_property_clear_flag(struct proper= ty *p, unsigned long flag =20 static inline int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { return -EINVAL; } @@ -1436,17 +1440,23 @@ static inline int of_property_read_s32(const struct= device_node *np, } =20 static inline int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", - target, id_out); + return of_map_id(np, id, "iommu-map", "iommu-map-mask", arg); } =20 static inline int of_map_msi_id(const struct device_node *np, u32 id, struct device_node **target, u32 *id_out) { - return of_map_id(np, id, "msi-map", "msi-map-mask", - target, id_out); + struct of_map_id_arg arg =3D { + .map_args =3D { + .np =3D *target, + .args_count =3D 1, + .args =3D { *id_out }, + }, + }; + + return of_map_id(np, id, "msi-map", "msi-map-mask", &arg); } =20 #define of_for_each_phandle(it, err, np, ln, cn, cc) \ --=20 2.34.1 From nobody Mon Feb 9 03:47:08 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1853E25CC7A for ; Sun, 21 Dec 2025 21:36:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766353006; cv=none; b=OSmmJv41wBH2KJYIPFf1Nstxs6+gCDL8bR5395c38RmquCARHC/HPHpw2JTfPvig30quGy6ohFh7OrcTTj4dRs+18P+myNJnqODE+S7pPNn32AEBI9tcJPu/jMBZYB2vt15GmqSwWIlVVyKzqdxQQk4OPaDXSEog775fIFaJj3U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766353006; c=relaxed/simple; bh=76x0waUT0Gi8/G+fPPa1V6w6ovWJhH1EZ6CFW2yDzKI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lSjufGYS5LN8zcNixAezk3yBzgVoOePOjyikvsyo+Anw+4iSh14WI+y1vM+HDmtvTlGL6KH6RxhVdn/4z+qMHh785AbwpNiC/fTLC1hOzHsTPhGGlL5la2gTZW8N3Xm0rJA0YfwgDdCT7a7Iz2PmgE/76XgKgmmhIEwFk/XNyTk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=IcPyaoZf; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=bVXVGK0x; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="IcPyaoZf"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="bVXVGK0x" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BLLGP9g1157964 for ; Sun, 21 Dec 2025 21:36:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=lTfUooU6YQ/ 6LN/6Wkk5DxaIFgRPD3nxUH9oNYW4Q6s=; b=IcPyaoZfxMeMxuH0tA75qrQ/t7f y5JuT69+LLOSAtvMdivQPIiRrgjFrtDwZH1A78hHwzOt7zoDcFZoCJuxFytpB9uZ aqSws+3dz2oEmEpsAviFZ7AjPBGelQNJ7BTWgRz9kkFp5vHOELcsJu0ssiFl970v 37xRrv2QyIPbwzQrveMZ1QGIcN5a1L3o9QzTZLxNtzCk+rny3oKk4GncUXgHZ2Qu KmwiBJWHD7Eg7j/cN/Kh0myZS4RwSYckL9ZgZfIFlCYgRauHNobo1f0kGfHvhr5s 71IBE7cy1Nqn23T1vOX0Nxqpg90nF3mrqwEPkoMDJ2EkKz6CFM0qHyZ2Cvw== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b5mydtwnb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 21 Dec 2025 21:36:43 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-34e5a9f0d6aso3139262a91.0 for ; Sun, 21 Dec 2025 13:36:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1766353003; x=1766957803; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lTfUooU6YQ/6LN/6Wkk5DxaIFgRPD3nxUH9oNYW4Q6s=; b=bVXVGK0xU3n6yFMLlYeD37HxGQ4bdYPStlGGL2vHypjDcJdNDbb9RFHpLtAWya46Vd Na7hPi8srVW/o5Ra4fyDjLY0HnYlb+GCGx4woPI8s+SD5gKb9+Qm8qruhOuOHiceC2Ql THbdku1hxPjqYwH/+9LTiRIX9+6Y1XwQVes+r5nHx/2nIdiQdAyWoRI/rtbb3Bq/z80z p4+n5xSidFJsGRRMc3W5HIjJHxJ9ec8FPItKiDtaGi4bNqHMr6Ji8UsgsgDMopCKL7r3 CJg9waOl8/moKiBVcf0bsazr6BRjfNH49Uvh7cbunYUtjgCsnR86fIAhLm11PJ9oBWVp +DDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766353003; x=1766957803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lTfUooU6YQ/6LN/6Wkk5DxaIFgRPD3nxUH9oNYW4Q6s=; b=wFlZVQYw6LXuvlSs6hY4KCFCzTY9mNJUcG29tXtYObjN6/5IuTEPzhYN2U30j6xIb+ KLexasjgnxBeCX3LuKP8TR5hqfU7QZ5H1Fw7SFDd/zkvfnuS6yeC0OtYsRlLON8Z/biZ zVdzhkXJf1gyEa0abuQdFINp5MkuM4bAS1mPMo/9+FoTdTqIT7NtTlvZvLTyP8uSPNX8 0+keIwIqgOiycAidZIQ4TdT1rC40MHzE+w7f07WCsbIA/omLJ8XdtOUG0DGCXVHbBf0+ ZcRl93g/zt6cVPiVR7WZI9T10IbaE8r/iG9Ap6Z1N27wxm9v53PwxyoQ/k4KdeEtKF/W 8I9Q== X-Forwarded-Encrypted: i=1; AJvYcCWgoFTAOuamSpAWhyjhIXECU0rXg5ohDs2lIaF2dJdjfwBVMPode3wS+Ze/T7Bv4aqwwX3xhsWR3p5vr8Y=@vger.kernel.org X-Gm-Message-State: AOJu0YxJDK3K3LN6X5Pjy6MeK1+F6kb4I6TqF71gcAxOOdQKBFb40Tmy VVdftqDFYwN33QYlo70sUcscyXFJ835hyNG2N5E6yN30zW+Z+5W2ewriczMo06iyo5rJF6g5Z9U DqXUjvUMpivWTcJ0t/AdOVpSs/X5DkH+UPTXNnNTWos4ac/7YEkAHGqdaReltWgcZME8= X-Gm-Gg: AY/fxX7kRwLoMma84JXhWmJ96xho3uzUIN+yt1pkKgNX0mSnqpqag7tAV/WuxBK+zS9 q7XtsHt4UejwNQ56L/rds1OvuJCLkRE6gz+izFeUPB+tPVzQy06ltBiejE3+JleMg4LQZx6NRR5 MTlZh20yBlTlDQz16lqLyEN49ARdetkpCo/KxZeaYxPJfm4U3xYmkXf7pq0ZKMtdtO8+xxunFco 6TeWTeHhe827NGyaSLrY3qfmu4CiphMoBmIivjgRU6hOTOGZQnd1smWRJFcPMPcJp/xxI1dClO1 /h2hCTTdlXO+CcFhvwRIANx2eL6Yx7F3+B/S0C5Vbyen9zluAqO1bVB5AnGzlW/Vdjv6y1Ktj0Y eL4aHyRPm8hzTGTlFtBCdj8icM0za7of8+6fUu7TY8IwB X-Received: by 2002:a17:90b:2cce:b0:343:6a63:85d5 with SMTP id 98e67ed59e1d1-34e90de2570mr8296069a91.16.1766353002574; Sun, 21 Dec 2025 13:36:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IExqI7Jno+XhZu6DZAHUuo8szMM/almYtDUdvO8izu0OaxMl7ybeXGhn2dL8JLTkTnp/7rKSg== X-Received: by 2002:a17:90b:2cce:b0:343:6a63:85d5 with SMTP id 98e67ed59e1d1-34e90de2570mr8296045a91.16.1766353002020; Sun, 21 Dec 2025 13:36:42 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70dcc7c8sm10950163a91.15.2025.12.21.13.36.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Dec 2025 13:36:41 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, saravanak@google.com, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vijayanand Jitta Subject: [PATCH v3 3/3] of: Respect #{iommu,msi}-cells in maps Date: Mon, 22 Dec 2025 03:06:02 +0530 Message-Id: <20251221213602.2413124-4-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> References: <20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: e9J4lv0OdUHP5uP3VXYFuW2RZ0ATLdCc X-Proofpoint-ORIG-GUID: e9J4lv0OdUHP5uP3VXYFuW2RZ0ATLdCc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIxMDIwNCBTYWx0ZWRfX1QwYakjAUjlJ doISELR76YIbT4T4cEN5CItpov2rQgRhxUoBL+lUdjPqCBPr+fyx+tQHzYt1lPX6n86UNCk1BHb j5DLkxv444WwJGzfbF42j+a6cfgOWfqiMYxBcd5AYvsoBklbuhLx7KJGWsrm4T66RWYKL46XzSY TVaFMDT2Lx8HAra4Kgh0gFEoictvnnbuLsHOXS+EQiNSQ2FsgzmJgDjNZcnj9ogx9VY7QkJFNtW JVtqLTQo3KYFmh7T2cgPNt/hp5to6+1mHHCWL8m1sopvwMv9VY/XQM3pgP5N1JvfPeQ/mKE5jdj Nlw67Ho01aa9VUlutyD9aB/ZFobZUHdF/lqP5Q82SH8KV2+0g/8IAwUr0+KdfnVyYsOUJ/V/tur tJyGo2Di++DOf6YyXxkeJ/pQ8DMUsK06R+t8mTeIcP6aL+rzGgW3ER4M/gvP+eFHUcgMfXzEOPl N16trChYYg912XLQoHQ== X-Authority-Analysis: v=2.4 cv=N6wk1m9B c=1 sm=1 tr=0 ts=6948686b cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7CQSdrXTAAAA:8 a=EUspDBNiAAAA:8 a=wJGdY9mNwEi-N7fqGJcA:9 a=mQ_c8vxmzFEMiUWkPHU9:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-21_05,2025-12-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 phishscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512210204 Content-Type: text/plain; charset="utf-8" From: Robin Murphy So far our parsing of {iommu,msi}-map properites has always blindly asusmed that the output specifiers will always have exactly 1 cell. This typically does happen to be the case, but is not actually enforced (and the PCI msi-map binding even explicitly states support for 0 or 1 cells) - as a result we've now ended up with dodgy DTs out in the field which depend on this behaviour to map a 1-cell specifier for a 2-cell provider, despite that being bogus per the bindings themselves. Since there is some potential use in being able to map at least single input IDs to multi-cell output specifiers (and properly support 0-cell outputs as well), add support for properly parsing and using the target nodes' #cells values, albeit with the unfortunate complication of still having to work around expectations of the old behaviour too. Since there are multi-cell output specifiers, the callers of of_map_id() may need to get the exact cell output value for further processing. Added support for that part --charan Signed-off-by: Robin Murphy Signed-off-by: Vijayanand Jitta --- drivers/iommu/of_iommu.c | 2 +- drivers/of/base.c | 116 +++++++++++++++++++++++++++++++-------- include/linux/of.h | 16 +++--- 3 files changed, 102 insertions(+), 32 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 74779b77ba13..ece830ec4c19 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -45,7 +45,7 @@ static int of_iommu_configure_dev_id(struct device_node *= master_np, struct device *dev, const u32 *id) { - struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct of_phandle_args iommu_spec =3D {}; struct of_map_id_arg arg =3D { .map_args =3D iommu_spec, }; diff --git a/drivers/of/base.c b/drivers/of/base.c index 4dca3d37a34b..aedff1c03995 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2045,11 +2045,38 @@ int of_find_last_cache_level(unsigned int cpu) return cache_level; } =20 +/* + * Some DTs have an iommu-map targeting a 2-cell IOMMU node while + * specifying only 1 cell. Fortunately they all consist of value '1' + * as the 2nd cell entry with the same target, so check for that pattern. + * + * Example: + * IOMMU node: + * #iommu-cells =3D <2>; + * + * Device node: + * iommu-map =3D <0x0000 &smmu 0x0000 0x1>, + * <0x0100 &smmu 0x0100 0x1>; + */ +static bool of_check_bad_map(const __be32 *map, int len) +{ + __be32 phandle =3D map[1]; + + if (len % 4) + return false; + for (int i =3D 0; i < len; i +=3D 4) { + if (map[i + 1] !=3D phandle || map[i + 3] !=3D cpu_to_be32(1)) + return false; + } + return true; +} + /** * of_map_id - Translate an ID through a downstream mapping. * @np: root complex device node. * @id: device ID to map. * @map_name: property name of the map to use. + * @cells_name: property name of target specifier cells. * @map_mask_name: optional property name of the mask to use. * @arg: contains the optional params, wrapped in a struct of_phandle_args, * which includes: @@ -2067,18 +2094,19 @@ int of_find_last_cache_level(unsigned int cpu) * * Return: 0 on success or a standard error code on failure. */ -int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg) +int of_map_id(const struct device_node *np, u32 id, const char *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg) { u32 map_mask, masked_id; - int map_len; + int map_bytes, map_len, offset =3D 0; + bool bad_map =3D false; const __be32 *map =3D NULL; =20 if (!np || !map_name || !arg || (!arg->map_args.np && !arg->map_args.args= )) return -EINVAL; =20 - map =3D of_get_property(np, map_name, &map_len); + map =3D of_get_property(np, map_name, &map_bytes); if (!map) { if (arg->map_args.np) return -ENODEV; @@ -2087,11 +2115,9 @@ int of_map_id(const struct device_node *np, u32 id, return 0; } =20 - if (!map_len || map_len % (4 * sizeof(*map))) { - pr_err("%pOF: Error: Bad %s length: %d\n", np, - map_name, map_len); - return -EINVAL; - } + if (map_bytes % sizeof(*map)) + goto err_map_len; + map_len =3D map_bytes / sizeof(*map); =20 /* The default is to select all bits. */ map_mask =3D 0xffffffff; @@ -2104,27 +2130,64 @@ int of_map_id(const struct device_node *np, u32 id, of_property_read_u32(np, map_mask_name, &map_mask); =20 masked_id =3D map_mask & id; - for ( ; map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4) { + while (offset < map_len) { struct device_node *phandle_node; - u32 id_base =3D be32_to_cpup(map + 0); - u32 phandle =3D be32_to_cpup(map + 1); - u32 out_base =3D be32_to_cpup(map + 2); - u32 id_len =3D be32_to_cpup(map + 3); + u32 id_base, phandle, id_len, id_off, cells =3D 0; + const __be32 *out_base; + + if (map_len - offset < 2) + goto err_map_len; + + id_base =3D be32_to_cpup(map + offset); =20 if (id_base & ~map_mask) { - pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores id-base (= 0x%x)\n", - np, map_name, map_name, + pr_err("%pOF: Invalid %s translation - %s (0x%x) ignores id-base (0x%x)= \n", + np, map_name, map_mask_name, map_mask, id_base); return -EFAULT; } =20 - if (masked_id < id_base || masked_id >=3D id_base + id_len) - continue; =20 + phandle =3D be32_to_cpup(map + offset + 1); phandle_node =3D of_find_node_by_phandle(phandle); if (!phandle_node) return -ENODEV; =20 + if (!bad_map && of_property_read_u32(phandle_node, cells_name, &cells)) { + pr_err("%pOF: missing %s property\n", phandle_node, cells_name); + return -EINVAL; + } + + if (map_len - offset < 3 + cells) + goto err_map_len; + + if (offset =3D=3D 0 && cells =3D=3D 2) { + bad_map =3D of_check_bad_map(map, map_len); + if (bad_map) { + pr_warn_once("%pOF: %s mismatches target %s, assuming extra cell of 0\= n", + np, map_name, cells_name); + cells =3D 1; + } + } + + out_base =3D map + offset + 2; + offset +=3D 3 + cells; + + id_len =3D be32_to_cpup(map + offset - 1); + if (id_len > 1 && cells > 1) { + /* + * With 1 output cell we reasonably assume its value + * has a linear relationship to the input; with more, + * we'd need help from the provider to know what to do. + */ + pr_err("%pOF: Unsupported %s - cannot handle %d-ID range with %d-cell o= utput specifier\n", + np, map_name, id_len, cells); + return -EINVAL; + } + id_off =3D masked_id - id_base; + if (masked_id < id_base || id_off >=3D id_len) + continue; + if (arg->map_args.np) of_node_put(phandle_node); else @@ -2133,12 +2196,15 @@ int of_map_id(const struct device_node *np, u32 id, if (arg->map_args.np !=3D phandle_node) continue; =20 - if (arg->map_args.args) - *arg->map_args.args =3D masked_id - id_base + out_base; + for (int i =3D 0; arg->map_args.args && i < cells; i++) + arg->map_args.args[i] +=3D (id_off + be32_to_cpu(out_base[i])); + + if (arg->map_args.args_count) + arg->map_args.args_count =3D cells; =20 pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, leng= th: %08x, id: %08x -> %08x\n", - np, map_name, map_mask, id_base, out_base, - id_len, id, masked_id - id_base + out_base); + np, map_name, map_mask, id_base, be32_to_cpup(out_base), + id_len, id, id_off + be32_to_cpup(out_base)); return 0; } =20 @@ -2149,5 +2215,9 @@ int of_map_id(const struct device_node *np, u32 id, if (arg->map_args.args) *arg->map_args.args =3D id; return 0; + +err_map_len: + pr_err("%pOF: Error: Bad %s length: %d\n", np, map_name, map_bytes); + return -EINVAL; } EXPORT_SYMBOL_GPL(of_map_id); diff --git a/include/linux/of.h b/include/linux/of.h index 0b0d545b80a3..ee07e8642133 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -460,9 +460,9 @@ const char *of_prop_next_string(const struct property *= prop, const char *cur); =20 bool of_console_check(const struct device_node *dn, char *name, int index); =20 -int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg); +int of_map_id(const struct device_node *np, u32 id, const char *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg); =20 phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); =20 @@ -909,9 +909,9 @@ static inline void of_property_clear_flag(struct proper= ty *p, unsigned long flag { } =20 -static inline int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg) +static inline int of_map_id(const struct device_node *np, u32 id, const ch= ar *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg); { return -EINVAL; } @@ -1442,7 +1442,7 @@ static inline int of_property_read_s32(const struct d= evice_node *np, static inline int of_map_iommu_id(const struct device_node *np, u32 id, struct of_map_id_arg *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", arg); + return of_map_id(np, id, "iommu-map", "#iommu-cells", "iommu-map-mask", a= rg); } =20 static inline int of_map_msi_id(const struct device_node *np, u32 id, @@ -1456,7 +1456,7 @@ static inline int of_map_msi_id(const struct device_n= ode *np, u32 id, }, }; =20 - return of_map_id(np, id, "msi-map", "msi-map-mask", &arg); + return of_map_id(np, id, "msi-map", "#msi-cells", "msi-map-mask", &arg); } =20 #define of_for_each_phandle(it, err, np, ln, cn, cc) \ --=20 2.34.1