From nobody Mon Feb 9 19:52:43 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8169B299947 for ; Sun, 21 Dec 2025 10:47:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766314032; cv=none; b=OtS19FGhcQbrXX0WF19woDy55tvghOgdDfM9PaJqTS980tXNWnbinaeZELroBEY5iBsG3O7or/CkoKASULNXuX2F2iaCNCCdEkHiyqVK6zzQbDGqwOWZw/Ja3sYA4Hntv836Za4CC7VXBx63a2nxrBOOkBD5+Uog2/hOU0BVg7U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766314032; c=relaxed/simple; bh=pkrTHhkieAKBxBYD20sxtrfyc/Bzjx9yUWbb8SYks40=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=foMAV99U4quU7eSjsEV4AgC+ECOKaxpI+LhEFed6JpEASX6T3p6cov3bXfNAEiDbbUcCYRIKQiRH48wOfQZqGffT5tdtUbReZqbD+oYJfwV4/E2CRWK8IkYGWtM7PNEEjMX7UUrkcUsRojRtmHR21w2FEfzV17/UhXGmWVVAPhI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=YpZQu4+C; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="YpZQu4+C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1766314028; bh=pkrTHhkieAKBxBYD20sxtrfyc/Bzjx9yUWbb8SYks40=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YpZQu4+C3iE8xIhcjAz8rUSLJjp0vA3IHSXYYgUOm3xV0RHSBsPWXPzVxrtsPFThi ZRkLdrRc8N7YkgiaXJFXawET6ZvOAh+vJLAsDLl89hSnuteX/0O792ryfF/NOoHy7y JcUq2t234psTdvyETXZQFLAyO4pnGz7W9oYHvQiGMgXylY3bBEG4K8dodW/j5K/FBG 57bj2uD6KQN2zrIYS2mdChnBXjPQj8UujHXb3vejox1Tbg36CkZdDHMycRoxv7h4Ms Ru2F5sBKns2q+07F/AXhxxdVDCw5p13j2wpeCINPgzhf86cIMKAaFKe8Ly4dpoIb1k b6/omHP3nEAGg== Received: from localhost (unknown [82.79.138.145]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 6F57B17E12E8; Sun, 21 Dec 2025 11:47:08 +0100 (CET) From: Cristian Ciocaltea Date: Sun, 21 Dec 2025 12:46:55 +0200 Subject: [PATCH v5 08/11] phy: rockchip: samsung-hdptx: Drop hw_rate driver data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251221-phy-hdptx-frl-v5-8-dac390a780be@collabora.com> References: <20251221-phy-hdptx-frl-v5-0-dac390a780be@collabora.com> In-Reply-To: <20251221-phy-hdptx-frl-v5-0-dac390a780be@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner , Algea Cao , Dmitry Baryshkov , Neil Armstrong Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.3 The ->hw_rate member of struct rk_hdptx_phy was mainly used to keep track of the clock rate programmed in hardware and support implementing the ->recalc_rate() callback in hdptx_phy_clk_ops. Computing the clock rate from the actual PHY PLL configuration seems to work reliably, hence remove the now redundant struct member. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index c2d2f2468ba2..5a534c53a52d 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -387,7 +387,6 @@ struct rk_hdptx_phy { =20 /* clk provider */ struct clk_hw hw; - unsigned long hw_rate; bool restrict_rate_change; =20 atomic_t usage_count; @@ -931,7 +930,7 @@ static int rk_hdptx_tmds_ropll_cmn_config(struct rk_hdp= tx_phy *hdptx) { const struct ropll_config *cfg =3D NULL; struct ropll_config rc =3D {0}; - int ret, i; + int i; =20 if (!hdptx->hdmi_cfg.tmds_char_rate) return 0; @@ -993,12 +992,7 @@ static int rk_hdptx_tmds_ropll_cmn_config(struct rk_hd= ptx_phy *hdptx) regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK, FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1)); =20 - ret =3D rk_hdptx_post_enable_pll(hdptx); - if (!ret) - hdptx->hw_rate =3D DIV_ROUND_CLOSEST_ULL(hdptx->hdmi_cfg.tmds_char_rate = * 8, - hdptx->hdmi_cfg.bpc); - - return ret; + return rk_hdptx_post_enable_pll(hdptx); } =20 static int rk_hdptx_tmds_ropll_mode_config(struct rk_hdptx_phy *hdptx) @@ -1903,9 +1897,6 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(str= uct clk_hw *hw, u64 rate; int ret; =20 - if (hdptx->hw_rate) - return hdptx->hw_rate; - ret =3D regmap_read(hdptx->grf, GRF_HDPTX_CON0, &status); if (ret || !(status & HDPTX_I_PLL_EN)) return 0; --=20 2.51.2