From nobody Sat Feb 7 05:01:04 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 039322D8DDD; Sat, 20 Dec 2025 15:27:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244475; cv=none; b=PWlztlpaKtp2RbfAM3K/0Ktrk21QRthACexkxDwYsnBQW/CSU3I/E3U3wt8dCVtf5VohvisNG8IwEIh58Uqb7J/lKy1L8uBrKWU1KepAiQ1/++3pqkHAzl7onQMKHbQNMxS58RZikKdrIusjvGZUcZhDs6Gag6koQiwV/knP8TM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244475; c=relaxed/simple; bh=4lws4A6g2JWpwRYu65XNJCfCAPljUNqFY3i6D5w2kgc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=i49sGbjULNdPrv7YMt5u5bUe0wXLlNw5+3JJ3f2pd4masKlyPy+qOYnW6rrvRm2jx+2RllweLYmKX3KP7MgWfwGMV3W6/X3Gpll4HesmYbXi55OUY54c2FdO4ul+lowWps6RtWLjtdIlwtt+pfmo4ZMqjCH3kV/3mq5VpSjc6OQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LVef5HR6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LVef5HR6" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6E193C4CEF5; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766244474; bh=4lws4A6g2JWpwRYu65XNJCfCAPljUNqFY3i6D5w2kgc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=LVef5HR6S0XIwsFFCZpPatIc+mJFjp1/2cIIEGA8CDXjVfdjxTvKLzc0gFM5n1FG7 mTg9iPhOd+S8mRiXyKpt+1Zc5E8nBRHcclLHipZSXJIJ3dq1tjsUf3uZUECwPCx95m 2Ep4bgo8wqRKGtuaEB/rXZCnWpEZC5Z1toHRur2mRbZn8SuumZfVDnBoHfWenMHaqZ xNtL/9k3QR+IqV8gbYiKIYKhS8fMnHP1npjEc1laUWlY3sNL5Sl5a2azY0eYTCFHOP MeYx1GvVX3M55seDWzXzYKDEUAI5vMD20QIjA3V5Xv5yu4bhVG7oGbM1mGyM5RIvYg KilaItIThcx6Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E052E668B4; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Sat, 20 Dec 2025 16:26:29 +0100 Subject: [PATCH v6 1/4] dt-bindings: arm: qcom: Document Microsoft Surface Pro 11 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251220-surface-sp11-for-next-v6-1-81f7451edb77@gmail.com> References: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> In-Reply-To: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Jeff Johnson , Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766244472; l=1715; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=adcMCekTMwA6DiDUgSju4pCxwPlTO2nkglFu0N6BA/g=; b=shgfsOS1fm08+GqW7IKtYrZolTZ4i07CrrUtB2xNo3yWhAFov1Gw3EbrKkEVj3c1RsMfr92tm 35ZtsFQ81TzBKtNHqltkZkQRZo3Pjb/AQfPDXU4db4aJ5RIndiWZyh/ X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Add the compatibles for the Qualcomm-based Microsoft Surface Pro 11, using its Denali codename. The LCD models are using the Qualcomm Snapdragon X1 Plus (X1P64100), the OLED ones are using the Qualcomm Snapdragon X1 Elite (X1E80100). Due to the difference in how the built-in panel is being handled between the OLED variant and LCD one, it is required to have two separate DTBs, so document the compatible string for both variants. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index d84bd3bca2010508a8225b9549d8c634efa06531..4e94776b8c4cd915d7779628c00= 5a021d27aab63 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1067,6 +1067,12 @@ properties: - const: qcom,x1e78100 - const: qcom,x1e80100 =20 + - items: + - const: microsoft,denali-lcd + - const: microsoft,denali + - const: qcom,x1p64100 + - const: qcom,x1e80100 + - items: - enum: - asus,vivobook-s15 @@ -1089,6 +1095,11 @@ properties: - const: qcom,hamoa-iot-som - const: qcom,x1e80100 =20 + - items: + - const: microsoft,denali-oled + - const: microsoft,denali + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa-lcd --=20 2.47.3 From nobody Sat Feb 7 05:01:04 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E2EA19F135; Sat, 20 Dec 2025 15:27:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; cv=none; b=lcD+RHpDyYi9YD71ET02+Wgx87sU4eArlhGUlfiyvihI29exfhjvoPDtsKlgF365Nnkj2dGZJ391agbXuZQStx5PNhr3HGfxozLMB9APEe1h2sOHoQItPj3TJHHPk3nI3PrnzxO766wrIxMLmJWdCbC6Vxvmhna0FqmsHfcW4Ag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; c=relaxed/simple; bh=rlWIfYfoikdm2g+ig1MLpFeBTAhiwN72iY5iv6kr7aY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PydoniUhtDN4Y2rxwWkHS/PJUsrC4FxdleLjz0TZKZMAqya21nXswYw8lOEJt3Uu9zNx2u3IAtgPUwxcTnTtQSkbWf2l0sKBcCAnFPPw4QGo99niPIeIj9frVHnsZZYAz7FWwkSpFVez0c51Mxhs6koDyomVKszPGBEPCfu7Ev0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uNbDL+YU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uNbDL+YU" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7EBA2C4CEF5; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766244473; bh=rlWIfYfoikdm2g+ig1MLpFeBTAhiwN72iY5iv6kr7aY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=uNbDL+YUOpwZbh/FCCCknUHSWYIuQReb6ZOLtyGFH4ut9MxHQiyOhKhBCppAfYEak ABU+O8l9NbsXAN75iQUd7Shs176rCZXS7PycjYl/tdMTEvqkD6QGqoPgrklsbhWNkc zBi7IOE1ohEkLZZrLcp1jrWMCiL2+lvBxK0uC391WIkXfoKy+Wc32Z98mYCF/LjLHY LAys3APXcktMmWKXxgMBzSqhrL1iVOvawOg2GOSXkOhYUQp6vvtGxV9qLcTDzC9AUK KKXGryPvK79nfJTDxvpTvb7aowFwIN+Q0POt9WaeI/e+hw6rAdhohDrsk+B5WeQhrq ce4jBROXVu6JA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E53DE668B8; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Sat, 20 Dec 2025 16:26:30 +0100 Subject: [PATCH v6 2/4] firmware: qcom: scm: allow QSEECOM on Surface Pro 11 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251220-surface-sp11-for-next-v6-2-81f7451edb77@gmail.com> References: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> In-Reply-To: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Jeff Johnson , Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766244472; l=997; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=CNbXWtuQ7AggDKzwaLKJE5TiiiPe100NQahuSnOowsU=; b=AMXf5Qstm/inbiie5fAjms4i/YPZ1dwa62O04DdEOOljs/5PwBg0LnkdF3OKEPitm2j8o+zDv YF3cwb7BMqvAN9c7QQzVqn2CApJWL10BxMVYCRZGcHwBLnQuWfL6y+e X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham Enables access to EFI variables on this machine. Signed-off-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Dmitry Baryshkov --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 1a6f85e463e06a12814614cea20719c90a371b69..3dabb04094f91811a430e84998d= 3c6c759b5c747 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2007,6 +2007,7 @@ static const struct of_device_id qcom_scm_qseecom_all= owlist[] __maybe_unused =3D { { .compatible =3D "lenovo,yoga-slim7x" }, { .compatible =3D "microsoft,arcata", }, { .compatible =3D "microsoft,blackrock" }, + { .compatible =3D "microsoft,denali", }, { .compatible =3D "microsoft,romulus13", }, { .compatible =3D "microsoft,romulus15", }, { .compatible =3D "qcom,hamoa-iot-evk" }, --=20 2.47.3 From nobody Sat Feb 7 05:01:04 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E3CB29E0E7; Sat, 20 Dec 2025 15:27:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; cv=none; b=Q4OyMqamaN+/1XaQA50v6PejsiRoB8XS2VTXaOPFO6kQ3ENLfY92ky2fXlHN7BBL9SF+lRpsGc4liwLgcVSwayQRn8m73FPXEh+++4we0vpKL9pG5iik19sb76LU6SYFdgeFZG7HcULVeNwle2GbiXnW4OM3xdIxe8PNTPTAMNA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; c=relaxed/simple; bh=T/d6LTvfqaL3MG852gJg4nPx0ZgexNqll6MZ+I8JFhc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mfQCijSvBDTr+khc56VKrXjlJjjhQtYWp9Kx2pYtuNYKc+fB0eTuKLEg7XTDDlxkfN9pmu6pG4QMivPRmU/iN74IA/lX2wCLw/eUGfCVE5oYIm4xSRDfqwnF6VCRTuyOcdibqlOJ3e/Gxuv+HuBpXX0d4dyrCcjLCK4+LjkPE6w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=StWMbfbQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="StWMbfbQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8D539C116D0; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766244473; bh=T/d6LTvfqaL3MG852gJg4nPx0ZgexNqll6MZ+I8JFhc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=StWMbfbQqkDAtk+t5aAWY3MXwGOhcEKW8WUTkIl2UNxy+fLktR6TB5Ru7yXsxGOIh Sg/26H2LrfQRMKzoslqYo1xVtuG2nqlh2m2wJTtTIF/DtD9P16qUM+yHFCinwhkSyz pzAV52FEk0Iq7PqNtAYvFXBlpK0fu7sgbe487lkxQ/baxCsuLDdbCpYeWGkASb1j8z vtH56NLNKXRotOit1XJqMXjaLnpmVds5CR90He14FxFZ0HpnAVe90zS4VMJQM2pisd 2rkLuq6rnMcj1rSCDJRBcb6Xwk80LNsqgM/TZAhzsOl4Pev4q2rsaNfjXEFi2V49GR ZEBlhi99YZBDQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F434E67480; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Sat, 20 Dec 2025 16:26:31 +0100 Subject: [PATCH v6 3/4] platform/surface: aggregator_registry: Add Surface Pro 11 (QCOM) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251220-surface-sp11-for-next-v6-3-81f7451edb77@gmail.com> References: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> In-Reply-To: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Jeff Johnson , Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766244472; l=2027; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=T3FVcCFZemvYy2B2tfWs5X5U9WEV1cgBV3QQZBYuEGE=; b=yGgnk7WT0PhLT7Kz1WPWzhTkpz50FfTMIYW9V3oNbOHzBVBrf/zIa4Yq3PgeYUBZJ8pCL2cWi zxFRd+mElrWA+KP9reQ1fvPvM5BMSiNzU/JCufIoUrTExmS6g//6goY X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham This enables support for the Qualcomm-based Surface Pro 11. Signed-off-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Maximilian Luz Reviewed-by: Dmitry Baryshkov --- drivers/platform/surface/surface_aggregator_registry.c | 18 ++++++++++++++= ++++ 1 file changed, 18 insertions(+) diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drive= rs/platform/surface/surface_aggregator_registry.c index 78ac3a8fbb736384f7e50f1888a71297a892a7c3..0599d5adf02e61583cf3e1fc110= 00070f51f7be3 100644 --- a/drivers/platform/surface/surface_aggregator_registry.c +++ b/drivers/platform/surface/surface_aggregator_registry.c @@ -406,6 +406,22 @@ static const struct software_node *ssam_node_group_sp9= _5g[] =3D { NULL, }; =20 +/* Devices for Surface Pro 11 (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp11[] =3D { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_bat_ac, + &ssam_node_bat_main, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_kip_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_hid_sam_sensors, + &ssam_node_kip_tablet_switch, + NULL, +}; + /* -- SSAM platform/meta-hub driver. -------------------------------------= --- */ =20 static const struct acpi_device_id ssam_platform_hub_acpi_match[] =3D { @@ -482,6 +498,8 @@ MODULE_DEVICE_TABLE(acpi, ssam_platform_hub_acpi_match); static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unus= ed =3D { /* Surface Pro 9 5G (ARM/QCOM) */ { .compatible =3D "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, + /* Surface Pro 11 (ARM/QCOM) */ + { .compatible =3D "microsoft,denali", (void *)ssam_node_group_sp11 }, /* Surface Laptop 7 */ { .compatible =3D "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible =3D "microsoft,romulus15", (void *)ssam_node_group_sl7 }, --=20 2.47.3 From nobody Sat Feb 7 05:01:04 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E5592D63F6; Sat, 20 Dec 2025 15:27:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; cv=none; b=RzqZ/CoI2pWlw20XP84LvhgFt9LKRSTK6pofqVsMS4LqWBv5oMpxy8DYzVZtmI9Vwo+WxH7MiIaWcOmvN1k3DZGk9hDU4Cy7ct1VowiXBx9i6+cMLFJ2wLflyL+IF+YE6jBNbRKCYODv7TSSIg+vaYTGr1H3K6lvZB0cy9WaWBg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766244474; c=relaxed/simple; bh=RH8WaAEGFIV1qpkK1usqGuqykrZ2mgzekyZKcnmpxKY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YKknqkB1mvH7nZ57IYsvKPTzHYIeaaDSnACR+nXbKVzfgANnqKRNUneLbXudj3uIplAr48KOLYfYvapWMEitHSJDCIFz8wIQKNYBNKS068tps54y0e7+xTgMfqF4WQ/k4w5EeUvRaNanr/3fQGYrPp2LkRqxszif1UVQKh9Lb9g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dG74mCta; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dG74mCta" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9CF6FC116B1; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766244473; bh=RH8WaAEGFIV1qpkK1usqGuqykrZ2mgzekyZKcnmpxKY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=dG74mCtaU8EO9MJyOVfbQLhbmjduBNrPnXeu0fapS002E+OVzv1uwtOt6+gAlHTGX 8NBDjZhhUbmPN/Uy/onevVtzpO4HV9gUC25uI7DK8WecfFs19mUUms9a9bqOoAmAB0 GpWrGAGv89kIHYVCBx2O5XxmD61au/dbTlJuLEEUhpUS6i8bwIUqzpP3j00Fp+VSQT /hdguPIi5ESc662jLm6S3MREFC+cZRP3Fo5qg4QZsumX05eWrZ5If8hYlkShnCb0QX esO4rLp7kDJCAnL9th4mKd24nxXfkoE6eMd1WQFq2/NkXJIgnZw4I6z0W7Wtce0RDH REWeAwP+M/5MA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FE7CE668BC; Sat, 20 Dec 2025 15:27:53 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Sat, 20 Dec 2025 16:26:32 +0100 Subject: [PATCH v6 4/4] arm64: dts: qcom: Add support for X1-based Surface Pro 11 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251220-surface-sp11-for-next-v6-4-81f7451edb77@gmail.com> References: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> In-Reply-To: <20251220-surface-sp11-for-next-v6-0-81f7451edb77@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Jeff Johnson , Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766244472; l=34126; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=R5oRgOsDzwI1SgeV8AeMzKm4MNzZ/8SMgEC5QSHltLA=; b=89q7rTkvU6R/vW9TYshAAwHRFJQcWzv/vlMN/pRUWF9VtTH0JL72OKJfivCuvFU727Py6Ml6U fdaTJ9gNRlbC8uiIjCnSUyZcU1ybcWlB/NPnH2nq2gr6g17fSqfERcc X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham Add device trees for the Qualcomm X1E and X1P-based Microsoft Surface Pro 11 machines (codenamed 'Denali'). This device is very similar to the Surface Laptop 7 ('Romulus'). Use a similar strategy to x1-asus-zenbook-a14.dtsi so that we can create x1e and x1p-specific flavors of the device tree without too much code duplication. Hardware support is similar to other X1 machines. The most notable missing features are: - Touchscreen and pen - Cameras (and status LEDs) Signed-off-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/Makefile | 4 + arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi | 1322 ++++++++++++++++= ++++ .../dts/qcom/x1e80100-microsoft-denali-oled.dts | 19 + .../boot/dts/qcom/x1p64100-microsoft-denali.dts | 15 + 4 files changed, 1360 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6f34d5ed331c4cc5ec01de7a0ecbc45f64c3ee15..3641f9371aae0f856e9f2050b48= 027a998b0c2c2 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -346,6 +346,8 @@ x1e80100-hp-omnibook-x14-el2-dtbs :=3D x1e80100-hp-omni= book-x14.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-hp-omnibook-x14.dtb x1e80100-hp-omni= book-x14-el2.dtb x1e80100-lenovo-yoga-slim7x-el2-dtbs :=3D x1e80100-lenovo-yoga-slim7x.dtb = x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-lenovo-yoga-slim7x.dtb x1e80100-leno= vo-yoga-slim7x-el2.dtb +x1e80100-microsoft-denali-oled-el2-dtbs :=3D x1e80100-microsoft-denali-ole= d.dtb x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-microsoft-denali-oled.dtb x1e80100-m= icrosoft-denali-oled-el2.dtb x1e80100-microsoft-romulus13-el2-dtbs :=3D x1e80100-microsoft-romulus13.dt= b x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-microsoft-romulus13.dtb x1e80100-mic= rosoft-romulus13-el2.dtb x1e80100-microsoft-romulus15-el2-dtbs :=3D x1e80100-microsoft-romulus15.dt= b x1-el2.dtbo @@ -362,3 +364,5 @@ x1p42100-hp-omnibook-x14-el2-dtbs :=3D x1p42100-hp-omni= book-x14.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-hp-omnibook-x14.dtb x1p42100-hp-omni= book-x14-el2.dtb x1p42100-lenovo-thinkbook-16-el2-dtbs :=3D x1p42100-lenovo-thinkbook-16.dt= b x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-lenovo-thinkbook-16.dtb x1p42100-len= ovo-thinkbook-16-el2.dtb +x1p64100-microsoft-denali-el2-dtbs :=3D x1p64100-microsoft-denali.dtb x1-e= l2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1p64100-microsoft-denali.dtb x1p64100-micros= oft-denali-el2.dtb diff --git a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi b/arch/arm64= /boot/dts/qcom/x1-microsoft-denali.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..d77be02848b5535e4478b3104ce= 49423b5df69cb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi @@ -0,0 +1,1322 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Dale Whinham + */ + +#include +#include +#include +#include + +#include "hamoa-pmics.dtsi" + +/ { + aliases { + serial0 =3D &uart2; + serial1 =3D &uart14; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_int_n_default>; + pinctrl-names =3D "default"; + + switch-lid { + gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>; + + /* Left-side bottom port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss0_con_sbu_out>; + }; + }; + }; + }; + + /* Left-side top port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + }; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + sound { + compatible =3D "qcom,x1e80100-sndcard"; + model =3D "X1E80100-Microsoft-Surface-Pro-11"; + audio-routing =3D "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb"; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_spkr>, <&right_spkr>, + <&swr0 0>, <&lpass_wsamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_wlan_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&gpu { + status =3D "okay"; + + zap-shader { + memory-region =3D <&gpu_microcode_mem>; + firmware-name =3D "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn"; + }; +}; + +&i2c0 { + clock-frequency =3D <100000>; + + status =3D "okay"; + + /* Something @39, @3e, @44 */ +}; + +&i2c3 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Left-side bottom port */ + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + reset-gpios =3D <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; + + clocks =3D <&rpmhcc RPMH_RF_CLK3>; + + vdd-supply =3D <&vreg_rtmr0_1p15>; + vdd33-supply =3D <&vreg_rtmr0_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr0_3p3>; + vddar-supply =3D <&vreg_rtmr0_1p15>; + vddat-supply =3D <&vreg_rtmr0_1p15>; + vddio-supply =3D <&vreg_rtmr0_1p8>; + + pinctrl-0 =3D <&rtmr0_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c4 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Something @12, @14, @16, @18, @1a */ +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Left-side top port */ + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&lpass_tlmm { + spkr_01_sd_n_active: spkr-01-sd-n-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&vreg_l1b_1p8>; + qcom,dmic-sample-rate =3D <4800000>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + compatible =3D "qcom,x1e80100-dp"; + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel: panel { + compatible =3D "edp-panel"; + enable-gpios =3D <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; + power-supply =3D <&vreg_edp_3p3>; + + pinctrl-0 =3D <&edp_bl_en>; + pinctrl-names =3D "default"; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; + + ports { + port@1 { + reg =3D <1>; + + mdss_dp3_out: endpoint { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000= 00000>; + + remote-endpoint =3D <&edp_panel_in>; + }; + }; + }; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie4 { + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie4_port0 { + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + }; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_nvme>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; + + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&pm8550ve_9_gpios { + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&pmc8380_3_gpios { + edp_bl_en: edp-bl-en-state { + pins =3D "gpio4"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/microsoft/Denali/qcadsp8380.mbn", + "qcom/x1e80100/microsoft/Denali/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/microsoft/Denali/qccdsp8380.mbn", + "qcom/x1e80100/microsoft/Denali/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&swr0 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Left Speaker */ + left_spkr: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Right Speaker */ + right_spkr: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + gpio-reserved-ranges =3D <44 4>, /* SPI (TPM) */ + <238 1>; /* UFS Reset */ + + hall_int_n_default: hall-int-n-state { + pins =3D "gpio2"; + function =3D "gpio"; + bias-disable; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + ssam_state: ssam-state-state { + pins =3D "gpio91"; + function =3D "gpio"; + bias-disable; + }; + + wcn_wlan_bt_en: wcn-wlan-bt-en-state { + pins =3D "gpio116", "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + cam_indicator_en: cam-indicator-en-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; + +&uart2 { + status =3D "okay"; + + embedded-controller { + compatible =3D "microsoft,surface-sam"; + + interrupts-extended =3D <&tlmm 91 IRQ_TYPE_EDGE_RISING>; + + current-speed =3D <4000000>; + + pinctrl-0 =3D <&ssam_state>; + pinctrl-names =3D "default"; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_0_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&retimer_ss0_ss_in>; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_1_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts b/= arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts new file mode 100644 index 0000000000000000000000000000000000000000..07ce43ccf39430b89f881f86e62= 9fe69ca9baefd --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Dale Whinham + */ + +/dts-v1/; + +#include "hamoa.dtsi" +#include "x1-microsoft-denali.dtsi" + +/ { + model =3D "Microsoft Surface Pro 11th Edition (OLED)"; + compatible =3D "microsoft,denali-oled", "microsoft,denali", + "qcom,x1e80100"; +}; + +&panel { + compatible =3D "samsung,atna30dw01", "samsung,atna33xc20"; +}; diff --git a/arch/arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts b/arch/= arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts new file mode 100644 index 0000000000000000000000000000000000000000..d96202e2afc6179a08bd4267b7a= 14ac4a51e4a81 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Dale Whinham + */ + +/dts-v1/; + +#include "hamoa.dtsi" +#include "x1-microsoft-denali.dtsi" + +/ { + model =3D "Microsoft Surface Pro 11th Edition (LCD)"; + compatible =3D "microsoft,denali-lcd", "microsoft,denali", + "qcom,x1p64100", "qcom,x1e80100"; +}; --=20 2.47.3