From nobody Tue Feb 10 01:59:08 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4721235FF67 for ; Fri, 19 Dec 2025 18:15:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766168137; cv=none; b=pSHXYGbHyc6YB7udTfeWSuVexkwnJQ2J68tvUNeqpD7UnSMUU2qCsURYA10gn53bnKnF5//ZACyWwvsL57bg0xKKj3ZwaTpma2ZGxTxebHZAhXFCylyD4kzI2edEdwYeTJgUJmO86/Zx/GbNqlZ9tXrDm3Q86MR5CCT75p+nod0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766168137; c=relaxed/simple; bh=bcAA/WEynaDNlm99bdr8wuFa/loozFrfSboWf0ffSsM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u5xxEKebHd+bT+R3xxxFYm8nvdC4IH7a+F04XAF7a3Lw727zA/xYLHIKtGOMXlTaB3iUCO8v6lPormjum2FI9yFDrpdA3QfsRfvLcfaU+obT0VDCdmbC0FZ49CZCTkVe74fKz/uggGhz8uwPIJDRk68oBTYJIlLnupMEeAWJog8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0FE241713; Fri, 19 Dec 2025 10:15:25 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B3DF63F5CA; Fri, 19 Dec 2025 10:15:27 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev Subject: [PATCH v2 44/45] arm_mpam: Add workaround for T241-MPAM-6 Date: Fri, 19 Dec 2025 18:11:46 +0000 Message-ID: <20251219181147.3404071-45-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251219181147.3404071-1-ben.horgan@arm.com> References: <20251219181147.3404071-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shanker Donthineni The registers MSMON_MBWU_L and MSMON_MBWU return the number of requests rather than the number of bytes transferred. Bandwidth resource monitoring is performed at the last level cache, where each request arrive in 64Byte granularity. The current implementation returns the number of transactions received at the last level cache but does not provide the value in bytes. Scaling by 64 gives an accurate byte count to match the MPAM specification for the MSMON_MBWU and MSMON_MBWU_L registers. This patch fixes the issue by reporting the actual number of bytes instead of the number of transactions from __ris_msmon_read(). Signed-off-by: Shanker Donthineni Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since rfc: MPAM_IIDR_NVIDIA_T421 -> MPAM_IIDR_NVIDIA_T241 Don't apply workaround to MSMON_MBWU_LWD --- Documentation/arch/arm64/silicon-errata.rst | 2 ++ drivers/resctrl/mpam_devices.c | 26 +++++++++++++++++++-- drivers/resctrl/mpam_internal.h | 1 + 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/ar= ch/arm64/silicon-errata.rst index b18bc704d4a1..e810b2a8f40e 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -250,6 +250,8 @@ stable kernels. +----------------+-----------------+-----------------+--------------------= ---------+ | NVIDIA | T241 MPAM | T241-MPAM-4 | N/A = | +----------------+-----------------+-----------------+--------------------= ---------+ +| NVIDIA | T241 MPAM | T241-MPAM-6 | N/A = | ++----------------+-----------------+-----------------+--------------------= ---------+ +----------------+-----------------+-----------------+--------------------= ---------+ | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585= | +----------------+-----------------+-----------------+--------------------= ---------+ diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 76aa8654fc74..912736cd86b6 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -685,6 +685,12 @@ static const struct mpam_quirk mpam_quirks[] =3D { .iidr_mask =3D MPAM_IIDR_MATCH_ONE, .workaround =3D T241_FORCE_MBW_MIN_TO_ONE, }, + { + /* NVIDIA t241 erratum T241-MPAM-6 */ + .iidr =3D MPAM_IIDR_NVIDIA_T241, + .iidr_mask =3D MPAM_IIDR_MATCH_ONE, + .workaround =3D T241_MBW_COUNTER_SCALE_64, + }, { NULL } /* Sentinel */ }; =20 @@ -1146,7 +1152,7 @@ static void write_msmon_ctl_flt_vals(struct mon_read = *m, u32 ctl_val, } } =20 -static u64 mpam_msmon_overflow_val(enum mpam_device_features type) +static u64 __mpam_msmon_overflow_val(enum mpam_device_features type) { /* TODO: implement scaling counters */ switch (type) { @@ -1161,6 +1167,18 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_= features type) } } =20 +static u64 mpam_msmon_overflow_val(enum mpam_device_features type, + struct mpam_msc *msc) +{ + u64 overflow_val =3D __mpam_msmon_overflow_val(type); + + if (mpam_has_quirk(T241_MBW_COUNTER_SCALE_64, msc) && + type !=3D mpam_feat_msmon_mbwu_63counter) + overflow_val *=3D 64; + + return overflow_val; +} + static void __ris_msmon_read(void *arg) { u64 now; @@ -1251,13 +1269,17 @@ static void __ris_msmon_read(void *arg) now =3D FIELD_GET(MSMON___VALUE, now); } =20 + if (mpam_has_quirk(T241_MBW_COUNTER_SCALE_64, msc) && + m->type !=3D mpam_feat_msmon_mbwu_63counter) + now *=3D 64; + if (nrdy) break; =20 mbwu_state =3D &ris->mbwu_state[ctx->mon]; =20 if (overflow) - mbwu_state->correction +=3D mpam_msmon_overflow_val(m->type); + mbwu_state->correction +=3D mpam_msmon_overflow_val(m->type, msc); =20 /* * Include bandwidth consumed before the last hardware reset and diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index b4f2505519b2..1e7574a9d244 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -221,6 +221,7 @@ struct mpam_props { enum mpam_device_quirks { T241_SCRUB_SHADOW_REGS, T241_FORCE_MBW_MIN_TO_ONE, + T241_MBW_COUNTER_SCALE_64, MPAM_QUIRK_LAST }; =20 --=20 2.43.0