From nobody Mon Feb 9 11:07:06 2026 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 361BDEEB3 for ; Fri, 19 Dec 2025 10:47:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766141226; cv=none; b=Bu1yzEy8RpfrpvMFAcMLE13JkRBMOmTvk0XIYAeBbZWKoRSEMqMKa6NTXZ6IAdISHz7uizfHkYU/jdPMt+z91ZcN3MKVhRiLRKgYxWbkIYNoTfvBXCR1EhwKHyWgUiHCu1fFGQ2yjI8VojR8SjCmZ0Oo2ofTOB+q+UH6WzPk56Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766141226; c=relaxed/simple; bh=u/Z2j17DBr7IuXG72i7Uds2nTv8OCNRhbkhFXvxMv8k=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=Z+yt5QRrQ1EVGiLJ5TCTuh0VweE/t9GIYOPJuUoHyRW+VTFR5iu02Q2l5lq0uaZTz99UILfHGaY1/OCuj+V+RK4kHBU2isg+OVuSraa5krd4jBY2it7hm6DJm/1Aa/g4/nDCB2DFPog4Y/CbV8bLf6fhc6WmqLz9suZfmu+r8xo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=KfCHFKPD; arc=none smtp.client-ip=209.85.208.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KfCHFKPD" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-640ca678745so2746614a12.2 for ; Fri, 19 Dec 2025 02:47:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1766141222; x=1766746022; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=rZuP9fxqbC47wIOaRN1HrOQmWsV0+mnLZdGYsf33OB0=; b=KfCHFKPDVex0gg/tHs3yyKwXpIA9T+AyS2HCmEca91Hc4Jd6FeQdCvjsa6lVr4/vr2 KZMJxnmgTF5hN6yEK9WDyuRTImXez3ZFRuUsNSPKmDU16mjQAPmGkVw2OB//12fuK0Ge U7ydX2yjw8e8k53mnVdWdKwqw8PbXZX3TRaVL5+WXLlujlRo5M9f9xmma5PVMNrzljjE ESIzmKS6UuRse/5B01IRquu2sNqXBKT3NVBt0T/9dx0fd4NwsE5hdb0Sl82xAld4M+nM wfbOIs1rpk08SRTcLpEE8cAATLGbhgaeadP308EM0oLOCFkLXvu6GP/Ie4UnY823NKGA RGEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766141222; x=1766746022; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=rZuP9fxqbC47wIOaRN1HrOQmWsV0+mnLZdGYsf33OB0=; b=haLDOZ96M59+QKO/A5xtYOMhxaFFPAV28bbeC72eANQoc2Kkw3P24SF0NTq++YCEep HQg57AqkbL9XMvNwMW8nrM0x/GH7M9etUmq95QNqzf3R8HOkC2YSjMqhkYAP2P1v4zlh 38UxD3R7mZNftwoYsZiFoo074zbNssPTIpcrSw/gN1zRocFfGjXst9MmZ2+dHzy5vH6e LYakzNbrfDLCfZviaDMxjlW+0d5J4PKY7sN8k2TaVXS4X1OCcyRGpWNwNytQQ/vpZPod Re1Vf/O6uOZtSAaq4hJiICHGesw8+qZqQ9UclF3+CqxOZQl56NUcr7i/GEc6qpuXrn+1 bkAg== X-Forwarded-Encrypted: i=1; AJvYcCVvaZGwwpdX5YyGz0l3CvGZVy2Hkx5M6y3/nUGPoTv/v8jJe+FZB2iqLMcuqiWWK9PVQC1qZJexsHZjQlo=@vger.kernel.org X-Gm-Message-State: AOJu0YwvXC6d+7+T3ASrfDwofalPoZcSaa/axXKrK9hzLHHoa0JJyz26 J16EWhRiMw6XKwMxlWETA7u3pl33xdjVdmG44Vrz2PudJmOa4P0Guz1c X-Gm-Gg: AY/fxX6Mssm2dbyVS1nAgN04EbyjgG9+0AVM57uy83tfgI9zk/+/BK8AlGXof83t4e6 ht/Y4+eyeqhbiQvFpoS8CRxldUNrJI3cWEwp3U3BXUgbARIcKL14BOLQMD5c0Y+dth0aTqqg6Ih RF07TAToDbwhc1ZcZ2602z1K0cV59yk6j7OphPpr6EtDsqZBo0ZvAmmMXsKMCVYouKT5AWYNQN9 cjWv44Vz+cmVWxnV4tbzk4KIFGpv8dxnzf7on02Mz5awkpwJQzAWMuhqQV/zTXtvqRpuHCdVdcY QArzhUpb8qRkR4uUp/JYtoBt3KdpRsI+d4or9LyKTMGqYpRJJ/xoSrk9dmDL+wIgL97EkRaYUWD Fs2IhgRNz8NGY+7bF2cvzVLfZDPwD3bepSduRS9CpapoG/nfD8dpXUQVaSJ448hxKHrQp/Q5WAT fPOYPUw43q8LeIda2CvHBK89NgP86zrnQdf+fXMoYm7b49 X-Google-Smtp-Source: AGHT+IHwuwvzqHzv3YMY8ZAQIYTi19GvZ1+m5b+3UDEb7/afa4beA//voJQ0rhzXT+DjKoSFreo3oQ== X-Received: by 2002:a05:6402:34c5:b0:649:230e:ec52 with SMTP id 4fb4d7f45d1cf-64b8e935a65mr1838951a12.1.1766141222122; Fri, 19 Dec 2025 02:47:02 -0800 (PST) Received: from localhost.localdomain ([2a00:23c4:a758:8a01:bb1:f7ee:1376:35e4]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64b910601c7sm1900781a12.14.2025.12.19.02.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 02:47:01 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Biju Das , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Dmitry Baryshkov , Tommaso Merciai , Andy Yan , Douglas Anderson , Luca Ceresoli , Jesse Van Gavere , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH] drm/bridge: adv7511: Clear HPD IRQ before powering on device during resume() Date: Fri, 19 Dec 2025 10:46:53 +0000 Message-ID: <20251219104659.114032-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das On RZ/G3E SMARC EVK using PSCI, s2ram powers down the SoC. Testing ADV7535 IRQ configured as edge-triggered interrupt on RZ/G3E SMARC EVK shows that it is missing HPD IRQ during system resume, as the status change occurs before the IRQ/pincontrol resume. Once the status bit is set, there won't be any further IRQ unless the status bit is cleared. Clear any pending HPD IRQs before powering on the ADV7535 device to deliver HPD interrupts after resume(). Signed-off-by: Biju Das Reviewed-by: Tommaso Merciai Tested-by: Tommaso Merciai --- drivers/gpu/drm/bridge/adv7511/adv7511.h | 1 + drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 32 ++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bri= dge/adv7511/adv7511.h index 8be7266fd4f4..03aa23836ca4 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511.h +++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h @@ -393,6 +393,7 @@ struct adv7511 { bool cec_enabled_adap; struct clk *cec_clk; u32 cec_clk_freq; + bool suspended; }; =20 static inline struct adv7511 *bridge_to_adv7511(struct drm_bridge *bridge) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm= /bridge/adv7511/adv7511_drv.c index b9be86541307..8d9467187d7c 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -790,6 +790,25 @@ static void adv7511_bridge_atomic_enable(struct drm_br= idge *bridge, struct drm_connector_state *conn_state; struct drm_crtc_state *crtc_state; =20 + if (adv->i2c_main->irq && adv->suspended) { + unsigned int irq; + + /* + * If ADV7511 IRQ is configured as edge triggered interrupt, it + * will miss the IRQ during system resume as the status change + * occurs before IRQ/pincontrol resume. Once the status bit is + * set there won't be any further IRQ unless the status bit is + * cleared. So, clear the IRQ status bit for further delivery + * of HPD IRQ. + */ + regmap_read(adv->regmap, ADV7511_REG_INT(0), &irq); + if (irq & ADV7511_INT0_HPD) + regmap_write(adv->regmap, ADV7511_REG_INT(0), + ADV7511_INT0_HPD); + + adv->suspended =3D false; + } + adv7511_power_on(adv); =20 connector =3D drm_atomic_get_new_connector_for_encoder(state, bridge->enc= oder); @@ -1407,6 +1426,16 @@ static void adv7511_remove(struct i2c_client *i2c) i2c_unregister_device(adv7511->i2c_edid); } =20 +static int adv7511_suspend(struct device *dev) +{ + struct i2c_client *i2c =3D to_i2c_client(dev); + struct adv7511 *adv7511 =3D i2c_get_clientdata(i2c); + + adv7511->suspended =3D true; + + return 0; +} + static const struct adv7511_chip_info adv7511_chip_info =3D { .type =3D ADV7511, .name =3D "ADV7511", @@ -1439,6 +1468,8 @@ static const struct adv7511_chip_info adv7535_chip_in= fo =3D { .hpd_override_enable =3D true, }; =20 +static DEFINE_SIMPLE_DEV_PM_OPS(adv7511_pm_ops, adv7511_suspend, NULL); + static const struct i2c_device_id adv7511_i2c_ids[] =3D { { "adv7511", (kernel_ulong_t)&adv7511_chip_info }, { "adv7511w", (kernel_ulong_t)&adv7511_chip_info }, @@ -1467,6 +1498,7 @@ static struct i2c_driver adv7511_driver =3D { .driver =3D { .name =3D "adv7511", .of_match_table =3D adv7511_of_ids, + .pm =3D pm_sleep_ptr(&adv7511_pm_ops), }, .id_table =3D adv7511_i2c_ids, .probe =3D adv7511_probe, --=20 2.43.0