From nobody Tue Feb 10 19:50:13 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6030C33CEA5 for ; Fri, 19 Dec 2025 19:23:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766172195; cv=none; b=K1KGZwfKtyfpJ3eXOXMbLTdvQQPXguIRFqE0ygnxrJdTgUjUDf+R0k5db7HIejSiKozkNyYT9o5qL6MIicEZySklFvsCc7G1csUh8nxgFJpzhnKEdN4acVymsIqlf6CaEJmoZDMyFmI/doLXz+BfeCzH5oQoI9+sciRjP8KP9eY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766172195; c=relaxed/simple; bh=6bV1SMUpcFVhm9YkKUunGGcPXiGGY1da3bBRqEHtNNE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=irxVZRzU931JlaXfiYT+h/DVoxU020GAvXuEzFyMFAjy8Dw8bwU9+YMyrii0mRNu3aMEv87k/yxa2tP5nV8Z+fK7ky07p63pBoWIO1Y3SuOmFHppOnjR6/P4XvlsTXDRHzp9oQRDoCn51qcuJyQz9S9VjKMW2Ancrv4U9IMryUI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=FuvItLoz; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="FuvItLoz" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id C58F21A22FA; Fri, 19 Dec 2025 19:23:11 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 9A70D6071D; Fri, 19 Dec 2025 19:23:11 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4AD70102F0CDA; Fri, 19 Dec 2025 20:23:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1766172186; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=a7Z+ejC9K/VTb5U+uLkvXhxiuwGhNojSrxEzFC2ijaE=; b=FuvItLozz6Y+blMkmAZCpsCrE4CihpKeHX1fn8T8JJlUGzX9/PMswdwqebHlXR3xmJEovf MecqV4BJ7MdU4ZKmecYrMTDY7mol7bWBKcEHQkJ89W0sAiTm/PvBSU3vK//wWezdfl5HAZ TuUoOvvwU++OAgq5m8RH/1vfI+x0ZXLgKV6x3/6KIljmva6tlPXGl0o1ZgyAWFKeiNl3GR Rnm2fB3CbUbGbNBD3c3VzDVrrqCvA9+gP0f63jKGPMBIthJjS7o45G6M8IBd2pO1qJ7AgK XFxlCDSaf7NDE4yFq+xFJfJtDFSSJP4ogGPl1G1O1dtFJbcOmU3ET84BCUWEog== From: "Miquel Raynal (Schneider Electric)" Date: Fri, 19 Dec 2025 20:22:04 +0100 Subject: [PATCH 02/13] spi: cadence-qspi: Align definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-schneider-6-19-rc1-qspi-v1-2-8ad505173e44@bootlin.com> References: <20251219-schneider-6-19-rc1-qspi-v1-0-8ad505173e44@bootlin.com> In-Reply-To: <20251219-schneider-6-19-rc1-qspi-v1-0-8ad505173e44@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Vaishnav Achath Cc: Thomas Petazzoni , =?utf-8?q?Herv=C3=A9_Codina?= , Wolfram Sang , Vignesh Raghavendra , Santhosh Kumar K , Pratyush Yadav , Pascal Eberhard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, "Miquel Raynal (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Fix alignment on the #defines. Signed-off-by: Miquel Raynal (Schneider Electric) Reviewed-by: Pratyush Yadav --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-qu= adspi.c index af6d050da1c8..e16a591e1f20 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -40,7 +40,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <=3D SPI_DEVICE_CS_CNT= _MAX); #define CQSPI_DISABLE_DAC_MODE BIT(1) #define CQSPI_SUPPORT_EXTERNAL_DMA BIT(2) #define CQSPI_NO_SUPPORT_WR_COMPLETION BIT(3) -#define CQSPI_SLOW_SRAM BIT(4) +#define CQSPI_SLOW_SRAM BIT(4) #define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) #define CQSPI_RD_NO_IRQ BIT(6) #define CQSPI_DMA_SET_MASK BIT(7) --=20 2.51.1