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Fri, 19 Dec 2025 03:42:46 -0800 (PST) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:d857:5c4e:6d25:707c]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d193d4f09sm41134425e9.12.2025.12.19.03.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 03:42:46 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 19 Dec 2025 12:42:16 +0100 Subject: [PATCH v6 1/7] dt-bindings: net: qcom: document the ethqos device for SCMI-based systems Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-qcom-sa8255p-emac-v6-1-487f1082461e@oss.qualcomm.com> References: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> In-Reply-To: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. 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Jaya Kumaran" , Clark Wang , Linux Team , Frank Li , David Wu , Samin Guo , Christophe Roullier , Swathi K S Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Drew Fustini , linux-sunxi@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-mips@vger.kernel.org, imx@lists.linux.dev, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, Bartosz Golaszewski , Bartosz Golaszewski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=16519; i=bartosz.golaszewski@oss.qualcomm.com; h=from:subject:message-id; bh=MfoeJbRZUV/e+3203ZsPIlZWjnxZPrWQhnPB+lEjQPI=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBpRTopvN9FRNS9FNjSd+TjQMbvGsm6d1pD7RYmQ Ao9NUiGZsqJAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCaUU6KQAKCRAFnS7L/zaE w44JD/9ggCHAbU6iJrfMlKkMFD0UXVJTw5t2vM2dDITAqn/7Gc/sKV4w9oy815FvRP1lVhvwcO6 Fh1/E6482oaoqnA9CNfH1QzmfM8NH+OfsHnsDBrHrYcRjcaeAg0ICJ5lCYSU/PCYupzl/fa61Qn 0vF6k6EWhU4gUcVLujrQlZn8QdNe0fe57jjvtsXfZ++8PxTM3jcBxKsAx9S50Skky4xPHppMf3a EWVqYXmSZhA6ypJ1rTA6N2sNHYFPnudn60HTn3eAElUnCYwh1R5Kh/B5OxPA7a+3YoL54k6bumX 0igO5GDDQns5VS+5H31jDCZDD5+rmyAn4zJEvIJsGndskwZpDo8IkbHEAUFbVntD7MZR+2DUAec j97p0etUEb1AZMLuW7V7tC2rnxdNmLTPw9cNH4urydDHPjQ8+0AB2/dxmx9Q1rOBIBJrNihoRnL hJVVMAZobO796c8XNuDJm9olBbn2u7Tmt6p0ZmXE3FxRbtKpLKJQWCg2ZPc7sM1XYVu4O+vt6gX Wor/5tT6lGEesbTzeDOJ/Sq4q24I8IB6P62lxD1OZiU8iCh2ATiFgRyE8YMg6K3bw//mAwxA4cU eDb09ZCIdXLJktNS3Ir9OspZRRtXQstJaW2/nycqxfnNznFkd4QK6iX5mVz15xCdPvB48mJBQbj pSMXmBco/zSJNLg== X-Developer-Key: i=bartosz.golaszewski@oss.qualcomm.com; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 X-Proofpoint-GUID: _hl-dyhNtoNMGa93UMa47eHBqNiS8BcN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE5MDA5NiBTYWx0ZWRfXxNdBcpjaRQnK 3s9+PfS0IN7thYeRa+Lij93IQbyT5Mpm+QDhxy8LqScsvRXGXtBjJ9GDhnRY51tS59/9VRw05WD R4iI3YZlo58gujF+5dt+/ZDOmvpgnG3jgzN4mkNWyG76M4+kq4Yq6NB5FtA6Z205KlF8oJHv2eP j6BDDWwCTztZ+cZVU7RxnEvRe6yWYviAV9mzCK3uj3ElvXFnHeVeWRrZINX6wkuk29aeCRJ6Rfw sbhTesAoxdn7uNyn8hi+KMarZWhtQPs4CulUVtb7kuPx2HICnDs6rreotREWfu0MH0nlokmXaUH jgNwYbyYGKXAEVAte1X3dGLqo8b1sobLP26JXT7K/Mq4EJF2h0yXQ1826TnsdmD6PPUOfOdYTOG DYkevG9efBm96n3i/dkecWjRip0J+n6XcLYLDQDpdHXym6Z998LKdEfdPXb4y6DTzrM3Rrx8GwY Fa65YXamM1s1eWCkSSw== X-Proofpoint-ORIG-GUID: _hl-dyhNtoNMGa93UMa47eHBqNiS8BcN X-Authority-Analysis: v=2.4 cv=EabFgfmC c=1 sm=1 tr=0 ts=69453a39 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=XdlRlktmfSYkeOfF_xMA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 a=sptkURWiP4Gy88Gu7hUp:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-19_03,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 suspectscore=0 priorityscore=1501 adultscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512190096 From: Bartosz Golaszewski Describe the firmware-managed variant of the QCom DesignWare MAC. As the properties here differ a lot from the HLOS-managed variant, lets put it in a separate file. Since we need to update the maximum number of power domains, let's update existing bindings referencing the top-level snps,dwmac.yaml and limit their maxItems for power-domains to 1. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../bindings/net/allwinner,sun7i-a20-gmac.yaml | 3 + .../bindings/net/altr,socfpga-stmmac.yaml | 3 + .../bindings/net/amlogic,meson-dwmac.yaml | 3 + .../devicetree/bindings/net/eswin,eic7700-eth.yaml | 3 + .../devicetree/bindings/net/intel,dwmac-plat.yaml | 3 + .../bindings/net/loongson,ls1b-gmac.yaml | 3 + .../bindings/net/loongson,ls1c-emac.yaml | 3 + .../devicetree/bindings/net/nxp,dwmac-imx.yaml | 3 + .../devicetree/bindings/net/nxp,lpc1850-dwmac.yaml | 3 + .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 3 + .../devicetree/bindings/net/qcom,ethqos.yaml | 3 + .../bindings/net/qcom,sa8255p-ethqos.yaml | 98 ++++++++++++++++++= ++++ .../devicetree/bindings/net/renesas,rzn1-gmac.yaml | 3 + .../bindings/net/renesas,rzv2h-gbeth.yaml | 3 + .../devicetree/bindings/net/rockchip-dwmac.yaml | 3 + .../devicetree/bindings/net/snps,dwmac.yaml | 5 +- .../bindings/net/sophgo,cv1800b-dwmac.yaml | 3 + .../bindings/net/sophgo,sg2044-dwmac.yaml | 3 + .../bindings/net/starfive,jh7110-dwmac.yaml | 3 + .../devicetree/bindings/net/stm32-dwmac.yaml | 3 + .../devicetree/bindings/net/tesla,fsd-ethqos.yaml | 3 + .../devicetree/bindings/net/thead,th1520-gmac.yaml | 3 + .../bindings/net/toshiba,visconti-dwmac.yaml | 3 + MAINTAINERS | 1 + 24 files changed, 166 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac= .yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml index 23e92be33ac8..b12632545673 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml @@ -40,6 +40,9 @@ properties: description: PHY regulator =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml= b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml index fc445ad5a1f1..448e617cddc4 100644 --- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml +++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml @@ -140,6 +140,9 @@ properties: - description: offset of the control register - description: shift within the control register =20 + power-domains: + maxItems: 1 + patternProperties: "^mdio[0-9]$": type: object diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml= b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 5c91716d1f21..9c9cc3ef384d 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -158,6 +158,9 @@ properties: interrupt-names: const: macirq =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b= /Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml index 91e8cd1db67b..c1b67cfa76d0 100644 --- a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml +++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml @@ -83,6 +83,9 @@ properties: register - description: Offset of register controlling TX/RX clock delay =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/= Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml index 62c1da36a2b5..e41851931b94 100644 --- a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml +++ b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml @@ -47,6 +47,9 @@ properties: interrupt-names: const: macirq =20 + power-domains: + maxItems: 1 + required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/net/loongson,ls1b-gmac.yaml = b/Documentation/devicetree/bindings/net/loongson,ls1b-gmac.yaml index c4f3224bad38..c9a131b8d830 100644 --- a/Documentation/devicetree/bindings/net/loongson,ls1b-gmac.yaml +++ b/Documentation/devicetree/bindings/net/loongson,ls1b-gmac.yaml @@ -66,6 +66,9 @@ properties: - mii - rgmii-id =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/loongson,ls1c-emac.yaml = b/Documentation/devicetree/bindings/net/loongson,ls1c-emac.yaml index 99001b940b83..49db18423dd8 100644 --- a/Documentation/devicetree/bindings/net/loongson,ls1c-emac.yaml +++ b/Documentation/devicetree/bindings/net/loongson,ls1c-emac.yaml @@ -65,6 +65,9 @@ properties: - mii - rmii =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Doc= umentation/devicetree/bindings/net/nxp,dwmac-imx.yaml index e5db346beca9..b240c76e7dd5 100644 --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml @@ -83,6 +83,9 @@ properties: description: To select RMII reference clock from external. =20 + power-domains: + maxItems: 1 + required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml b= /Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml index 05acd9bc7616..f61188ab0dbe 100644 --- a/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml @@ -51,6 +51,9 @@ properties: items: - const: stmmaceth =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Doc= umentation/devicetree/bindings/net/nxp,s32-dwmac.yaml index 2b8b74c5feec..716407a75079 100644 --- a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -52,6 +52,9 @@ properties: - const: rx - const: ptp_ref =20 + power-domains: + maxItems: 1 + required: - clocks - clock-names diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Docum= entation/devicetree/bindings/net/qcom,ethqos.yaml index 423959cb928d..ef520f810577 100644 --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml @@ -86,6 +86,9 @@ properties: phy-names: const: serdes =20 + power-domains: + maxItems: 1 + required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml= b/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml new file mode 100644 index 000000000000..72bb764c0ca0 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,sa8255p-ethqos.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Ethernet ETHQOS device (firmware managed) + +maintainers: + - Bjorn Andersson + - Konrad Dybcio + - Bartosz Golaszewski + +description: + dwmmac based Qualcomm ethernet devices which support Gigabit + ethernet (version v2.3.0 and onwards) with clocks, interconnects, etc. + managed by firmware + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + const: qcom,sa8255p-ethqos + + reg: + maxItems: 2 + + reg-names: + items: + - const: stmmaceth + - const: rgmii + + interrupts: + items: + - description: Combined signal for various interrupt events + - description: The interrupt that occurs when HW safety error trigge= red + + interrupt-names: + items: + - const: macirq + - const: sfty + + power-domains: + minItems: 3 + maxItems: 3 + + power-domain-names: + items: + - const: core + - const: mdio + - const: serdes + + iommus: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg-names + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + #include + + ethernet: ethernet@7a80000 { + compatible =3D "qcom,sa8255p-ethqos"; + reg =3D <0x23040000 0x10000>, + <0x23056000 0x100>; + reg-names =3D "stmmaceth", "rgmii"; + + iommus =3D <&apps_smmu 0x120 0x7>; + + interrupts =3D , + ; + interrupt-names =3D "macirq", "sfty"; + + dma-coherent; + + snps,tso; + snps,pbl =3D <32>; + rx-fifo-depth =3D <16384>; + tx-fifo-depth =3D <16384>; + + phy-handle =3D <ðernet_phy>; + phy-mode =3D "2500base-x"; + + snps,mtl-rx-config =3D <&mtl_rx_setup1>; + snps,mtl-tx-config =3D <&mtl_tx_setup1>; + + power-domains =3D <&scmi8_pd 0>, <&scmi8_pd 1>, <&scmi8_dvfs 0>; + power-domain-names =3D "core", "mdio", "serdes"; + }; diff --git a/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml b= /Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml index 16dd7a2631ab..ed0d10a19ca4 100644 --- a/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml +++ b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml @@ -44,6 +44,9 @@ properties: phandle pointing to a PCS sub-node compatible with renesas,rzn1-miic.yaml# =20 + power-domains: + maxItems: 1 + required: - compatible =20 diff --git a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml= b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml index bd53ab300f50..bc5054b05f6d 100644 --- a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml +++ b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml @@ -123,6 +123,9 @@ properties: Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml# (Refer RZ/T2H portion in the DT-binding file) =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Do= cumentation/devicetree/bindings/net/rockchip-dwmac.yaml index d17112527dab..ef82ff2a2884 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -121,6 +121,9 @@ properties: phy-supply: description: PHY regulator =20 + power-domains: + maxItems: 1 + required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index dd3c72e8363e..312d1bbc2ad1 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -71,6 +71,7 @@ properties: - loongson,ls7a-dwmac - nxp,s32g2-dwmac - qcom,qcs404-ethqos + - qcom,sa8255p-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos @@ -180,7 +181,8 @@ properties: - const: ahb =20 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 3 =20 mac-mode: $ref: ethernet-controller.yaml#/properties/phy-connection-type @@ -643,6 +645,7 @@ allOf: - ingenic,x1830-mac - ingenic,x2000-mac - qcom,qcs404-ethqos + - qcom,sa8255p-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos diff --git a/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yam= l b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml index b89456f0ef83..e78cbf594c69 100644 --- a/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml @@ -49,6 +49,9 @@ properties: reset-names: const: stmmaceth =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/sophgo,sg2044-dwmac.yaml= b/Documentation/devicetree/bindings/net/sophgo,sg2044-dwmac.yaml index e8d3814db0e9..845e2c67d200 100644 --- a/Documentation/devicetree/bindings/net/sophgo,sg2044-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/sophgo,sg2044-dwmac.yaml @@ -52,6 +52,9 @@ properties: interrupt-names: maxItems: 1 =20 + power-domains: + maxItems: 1 + resets: maxItems: 1 =20 diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.ya= ml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml index 313a15331661..8a68c6d7b5c6 100644 --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml @@ -71,6 +71,9 @@ properties: The argument one is the offset of phy mode selection, the argument two is the shift of phy mode selection. =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Docum= entation/devicetree/bindings/net/stm32-dwmac.yaml index 987254900d0d..29b878079ff0 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -121,6 +121,9 @@ properties: minItems: 1 maxItems: 2 =20 + power-domains: + maxItems: 1 + required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml b/= Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml index dd7481bb16e5..ad635529d676 100644 --- a/Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml +++ b/Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml @@ -67,6 +67,9 @@ properties: - rgmii-rxid - rgmii-txid =20 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml b= /Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml index b3492a9aa4ef..c859f8bb5d58 100644 --- a/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml +++ b/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml @@ -78,6 +78,9 @@ properties: items: - const: macirq =20 + power-domains: + maxItems: 1 + required: - clocks - clock-names diff --git a/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.y= aml b/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml index f0f32e18fc85..efa39eab0256 100644 --- a/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml +++ 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Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 9 ++++----- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethe= rnet/stmicro/stmmac/Kconfig index 907fe2e927f0..1310312e3e09 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -135,7 +135,7 @@ config DWMAC_MESON config DWMAC_QCOM_ETHQOS tristate "Qualcomm ETHQOS support" default ARCH_QCOM - depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on ARCH_QCOM || COMPILE_TEST help Support for the Qualcomm ETHQOS core. =20 diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 0826a7bd32ff..457748e57812 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018-19, Linaro Limited =20 +#include #include -#include #include #include #include @@ -723,7 +723,6 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_pr= iv *priv) =20 static int qcom_ethqos_probe(struct platform_device *pdev) { - struct device_node *np =3D pdev->dev.of_node; const struct ethqos_emac_driver_data *data; struct plat_stmmacenet_data *plat_dat; struct stmmac_resources stmmac_res; @@ -774,7 +773,7 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) =20 ethqos->mac_base =3D stmmac_res.addr; =20 - data =3D of_device_get_match_data(dev); + data =3D device_get_match_data(dev); ethqos->por =3D data->por; ethqos->num_por =3D data->num_por; ethqos->rgmii_config_loopback_en =3D data->rgmii_config_loopback_en; @@ -811,9 +810,9 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs =3D &data->dwmac4_addrs; plat_dat->pmt =3D 1; - if (of_property_read_bool(np, "snps,tso")) + if (device_property_present(dev, "snps,tso")) plat_dat->flags |=3D STMMAC_FLAG_TSO_EN; - if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) + if (device_is_compatible(dev, "qcom,qcs404-ethqos")) plat_dat->flags |=3D STMMAC_FLAG_RX_CLK_RUNS_IN_LPI; if (data->dma_addr_width) plat_dat->host_dma_width =3D data->dma_addr_width; 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Fri, 19 Dec 2025 03:42:52 -0800 (PST) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:d857:5c4e:6d25:707c]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d193d4f09sm41134425e9.12.2025.12.19.03.42.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 03:42:51 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 19 Dec 2025 12:42:18 +0100 Subject: [PATCH v6 3/7] net: stmmac: qcom-ethqos: wrap emac driver data in additional structure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-qcom-sa8255p-emac-v6-3-487f1082461e@oss.qualcomm.com> References: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> In-Reply-To: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. 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To allow that: first wrap the emac driver data in another layer which will later be expanded. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 51 ++++++++++++++++--= ---- 1 file changed, 37 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 457748e57812..e0f0eca94342 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -97,6 +97,10 @@ struct ethqos_emac_driver_data { bool needs_sgmii_loopback; }; =20 +struct ethqos_emac_match_data { + const struct ethqos_emac_driver_data *drv_data; +}; + struct qcom_ethqos { struct platform_device *pdev; void __iomem *rgmii_base; @@ -225,6 +229,10 @@ static const struct ethqos_emac_driver_data emac_v2_3_= 0_data =3D { .has_emac_ge_3 =3D false, }; =20 +static const struct ethqos_emac_match_data emac_qcs404_data =3D { + .drv_data =3D &emac_v2_3_0_data, +}; + static const struct ethqos_emac_por emac_v2_1_0_por[] =3D { { .offset =3D RGMII_IO_MACRO_CONFIG, .value =3D 0x40C01343 }, { .offset =3D SDCC_HC_REG_DLL_CONFIG, .value =3D 0x2004642C }, @@ -241,6 +249,10 @@ static const struct ethqos_emac_driver_data emac_v2_1_= 0_data =3D { .has_emac_ge_3 =3D false, }; =20 +static const struct ethqos_emac_match_data emac_sm8150_data =3D { + .drv_data =3D &emac_v2_1_0_data, +}; + static const struct ethqos_emac_por emac_v3_0_0_por[] =3D { { .offset =3D RGMII_IO_MACRO_CONFIG, .value =3D 0x40c01343 }, { .offset =3D SDCC_HC_REG_DLL_CONFIG, .value =3D 0x2004642c }, @@ -273,6 +285,10 @@ static const struct ethqos_emac_driver_data emac_v3_0_= 0_data =3D { }, }; =20 +static const struct ethqos_emac_match_data emac_sc8280xp_data =3D { + .drv_data =3D &emac_v3_0_0_data, +}; + static const struct ethqos_emac_por emac_v4_0_0_por[] =3D { { .offset =3D RGMII_IO_MACRO_CONFIG, .value =3D 0x40c01343 }, { .offset =3D SDCC_HC_REG_DLL_CONFIG, .value =3D 0x2004642c }, @@ -308,6 +324,10 @@ static const struct ethqos_emac_driver_data emac_v4_0_= 0_data =3D { }, }; =20 +static const struct ethqos_emac_match_data emac_sa8775p_data =3D { + .drv_data =3D &emac_v4_0_0_data, +}; + static int ethqos_dll_configure(struct qcom_ethqos *ethqos) { struct device *dev =3D ðqos->pdev->dev; @@ -723,7 +743,8 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_pr= iv *priv) =20 static int qcom_ethqos_probe(struct platform_device *pdev) { - const struct ethqos_emac_driver_data *data; + const struct ethqos_emac_driver_data *drv_data; + const struct ethqos_emac_match_data *data; struct plat_stmmacenet_data *plat_dat; struct stmmac_resources stmmac_res; struct device *dev =3D &pdev->dev; @@ -774,13 +795,15 @@ static int qcom_ethqos_probe(struct platform_device *= pdev) ethqos->mac_base =3D stmmac_res.addr; =20 data =3D device_get_match_data(dev); - ethqos->por =3D data->por; - ethqos->num_por =3D data->num_por; - ethqos->rgmii_config_loopback_en =3D data->rgmii_config_loopback_en; - ethqos->has_emac_ge_3 =3D data->has_emac_ge_3; - ethqos->needs_sgmii_loopback =3D data->needs_sgmii_loopback; + drv_data =3D data->drv_data; + + ethqos->por =3D drv_data->por; + ethqos->num_por =3D drv_data->num_por; + ethqos->rgmii_config_loopback_en =3D drv_data->rgmii_config_loopback_en; + ethqos->has_emac_ge_3 =3D drv_data->has_emac_ge_3; + ethqos->needs_sgmii_loopback =3D drv_data->needs_sgmii_loopback; =20 - ethqos->link_clk =3D devm_clk_get(dev, data->link_clk_name ?: "rgmii"); + ethqos->link_clk =3D devm_clk_get(dev, drv_data->link_clk_name ?: "rgmii"= ); if (IS_ERR(ethqos->link_clk)) return dev_err_probe(dev, PTR_ERR(ethqos->link_clk), "Failed to get link_clk\n"); @@ -808,14 +831,14 @@ static int qcom_ethqos_probe(struct platform_device *= pdev) plat_dat->ptp_clk_freq_config =3D ethqos_ptp_clk_freq_config; plat_dat->core_type =3D DWMAC_CORE_GMAC4; if (ethqos->has_emac_ge_3) - plat_dat->dwmac4_addrs =3D &data->dwmac4_addrs; + plat_dat->dwmac4_addrs =3D &drv_data->dwmac4_addrs; plat_dat->pmt =3D 1; if (device_property_present(dev, "snps,tso")) plat_dat->flags |=3D STMMAC_FLAG_TSO_EN; if (device_is_compatible(dev, "qcom,qcs404-ethqos")) plat_dat->flags |=3D STMMAC_FLAG_RX_CLK_RUNS_IN_LPI; - if (data->dma_addr_width) - plat_dat->host_dma_width =3D data->dma_addr_width; + if (drv_data->dma_addr_width) + plat_dat->host_dma_width =3D drv_data->dma_addr_width; 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Fri, 19 Dec 2025 03:42:54 -0800 (PST) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:d857:5c4e:6d25:707c]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d193d4f09sm41134425e9.12.2025.12.19.03.42.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 03:42:54 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 19 Dec 2025 12:42:19 +0100 Subject: [PATCH v6 4/7] net: stmmac: qcom-ethqos: split power management fields into a separate structure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-qcom-sa8255p-emac-v6-4-487f1082461e@oss.qualcomm.com> References: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> In-Reply-To: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. 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This is done because a device may have the same device settings but different power management mode (e.g.: firmware vs manual). Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 19 +++++++++++++++= +--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index e0f0eca94342..54458ff5c910 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -91,14 +91,18 @@ struct ethqos_emac_driver_data { unsigned int num_por; bool rgmii_config_loopback_en; bool has_emac_ge_3; - const char *link_clk_name; u32 dma_addr_width; struct dwmac4_addrs dwmac4_addrs; bool needs_sgmii_loopback; }; =20 +struct ethqos_emac_pm_data { + const char *link_clk_name; +}; + struct ethqos_emac_match_data { const struct ethqos_emac_driver_data *drv_data; + const struct ethqos_emac_pm_data *pm_data; }; =20 struct qcom_ethqos { @@ -303,7 +307,6 @@ static const struct ethqos_emac_driver_data emac_v4_0_0= _data =3D { .num_por =3D ARRAY_SIZE(emac_v4_0_0_por), .rgmii_config_loopback_en =3D false, .has_emac_ge_3 =3D true, - .link_clk_name =3D "phyaux", .needs_sgmii_loopback =3D true, .dma_addr_width =3D 36, .dwmac4_addrs =3D { @@ -324,8 +327,13 @@ static const struct ethqos_emac_driver_data emac_v4_0_= 0_data =3D { }, }; =20 +static const struct ethqos_emac_pm_data emac_sa8775p_pm_data =3D { + .link_clk_name =3D "phyaux", +}; + static const struct ethqos_emac_match_data emac_sa8775p_data =3D { .drv_data =3D &emac_v4_0_0_data, + .pm_data =3D &emac_sa8775p_pm_data, }; =20 static int ethqos_dll_configure(struct qcom_ethqos *ethqos) @@ -744,11 +752,13 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_= priv *priv) static int qcom_ethqos_probe(struct platform_device *pdev) { const struct ethqos_emac_driver_data *drv_data; + const struct ethqos_emac_pm_data *pm_data; const struct ethqos_emac_match_data *data; struct plat_stmmacenet_data *plat_dat; struct stmmac_resources stmmac_res; struct device *dev =3D &pdev->dev; struct qcom_ethqos *ethqos; + const char *clk_name; int ret, i; =20 ret =3D stmmac_get_platform_resources(pdev, &stmmac_res); @@ -796,6 +806,9 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) =20 data =3D device_get_match_data(dev); drv_data =3D data->drv_data; + pm_data =3D data->pm_data; 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Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 46 ++++++++++++------= ---- 1 file changed, 25 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 54458ff5c910..856fa2c7c896 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -105,17 +105,21 @@ struct ethqos_emac_match_data { const struct ethqos_emac_pm_data *pm_data; }; =20 +struct ethqos_emac_pm_ctx { + struct clk *link_clk; + unsigned int link_clk_rate; + struct phy *serdes_phy; +}; + struct qcom_ethqos { struct platform_device *pdev; void __iomem *rgmii_base; void __iomem *mac_base; int (*configure_func)(struct qcom_ethqos *ethqos, int speed); =20 - unsigned int link_clk_rate; - struct clk *link_clk; - struct phy *serdes_phy; - int serdes_speed; + struct ethqos_emac_pm_ctx pm; phy_interface_t phy_mode; + int serdes_speed; =20 const struct ethqos_emac_por *por; unsigned int num_por; @@ -193,9 +197,9 @@ ethqos_update_link_clk(struct qcom_ethqos *ethqos, int = speed) =20 rate =3D rgmii_clock(speed); if (rate > 0) - ethqos->link_clk_rate =3D rate * 2; + ethqos->pm.link_clk_rate =3D rate * 2; =20 - clk_set_rate(ethqos->link_clk, ethqos->link_clk_rate); + clk_set_rate(ethqos->pm.link_clk, ethqos->pm.link_clk_rate); } =20 static void @@ -616,7 +620,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *e= thqos, int speed) static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed) { if (ethqos->serdes_speed !=3D speed) { - phy_set_speed(ethqos->serdes_phy, speed); + phy_set_speed(ethqos->pm.serdes_phy, speed); ethqos->serdes_speed =3D speed; } } @@ -683,23 +687,23 @@ static int qcom_ethqos_serdes_powerup(struct net_devi= ce *ndev, void *priv) struct qcom_ethqos *ethqos =3D priv; int ret; =20 - ret =3D phy_init(ethqos->serdes_phy); + ret =3D phy_init(ethqos->pm.serdes_phy); if (ret) return ret; =20 - ret =3D phy_power_on(ethqos->serdes_phy); + ret =3D phy_power_on(ethqos->pm.serdes_phy); if (ret) return ret; =20 - return phy_set_speed(ethqos->serdes_phy, ethqos->serdes_speed); + return phy_set_speed(ethqos->pm.serdes_phy, ethqos->serdes_speed); } =20 static void qcom_ethqos_serdes_powerdown(struct net_device *ndev, void *pr= iv) { struct qcom_ethqos *ethqos =3D priv; =20 - phy_power_off(ethqos->serdes_phy); - phy_exit(ethqos->serdes_phy); + phy_power_off(ethqos->pm.serdes_phy); + phy_exit(ethqos->pm.serdes_phy); } =20 static int ethqos_clks_config(void *priv, bool enabled) @@ -708,7 +712,7 @@ static int ethqos_clks_config(void *priv, bool enabled) int ret =3D 0; =20 if (enabled) { - ret =3D clk_prepare_enable(ethqos->link_clk); + ret =3D clk_prepare_enable(ethqos->pm.link_clk); if (ret) { dev_err(ðqos->pdev->dev, "link_clk enable failed\n"); return ret; @@ -721,7 +725,7 @@ static int ethqos_clks_config(void *priv, bool enabled) */ ethqos_set_func_clk_en(ethqos); } else { - clk_disable_unprepare(ethqos->link_clk); + clk_disable_unprepare(ethqos->pm.link_clk); } =20 return ret; @@ -816,9 +820,9 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) ethqos->has_emac_ge_3 =3D drv_data->has_emac_ge_3; ethqos->needs_sgmii_loopback =3D drv_data->needs_sgmii_loopback; =20 - ethqos->link_clk =3D devm_clk_get(dev, clk_name); - if (IS_ERR(ethqos->link_clk)) - return dev_err_probe(dev, PTR_ERR(ethqos->link_clk), + ethqos->pm.link_clk =3D devm_clk_get(dev, clk_name); + if (IS_ERR(ethqos->pm.link_clk)) + return dev_err_probe(dev, PTR_ERR(ethqos->pm.link_clk), "Failed to get link_clk\n"); =20 ret =3D ethqos_clks_config(ethqos, true); @@ -829,9 +833,9 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) if (ret) return ret; =20 - ethqos->serdes_phy =3D devm_phy_optional_get(dev, "serdes"); - if (IS_ERR(ethqos->serdes_phy)) - return dev_err_probe(dev, PTR_ERR(ethqos->serdes_phy), + ethqos->pm.serdes_phy =3D devm_phy_optional_get(dev, "serdes"); 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To that end create a callback with a single implementation for now, that will be extended later. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 856fa2c7c896..8ba57bba3f2e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -120,6 +120,7 @@ struct qcom_ethqos { struct ethqos_emac_pm_ctx pm; phy_interface_t phy_mode; int serdes_speed; + int (*set_serdes_speed)(struct qcom_ethqos *ethqos); =20 const struct ethqos_emac_por *por; unsigned int num_por; @@ -617,11 +618,16 @@ static int ethqos_configure_rgmii(struct qcom_ethqos = *ethqos, int speed) return 0; } =20 +static int ethqos_set_serdes_speed_phy(struct qcom_ethqos *ethqos) +{ + return phy_set_speed(ethqos->pm.serdes_phy, ethqos->serdes_speed); +} + static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed) { if (ethqos->serdes_speed !=3D speed) { - phy_set_speed(ethqos->pm.serdes_phy, speed); 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Fri, 19 Dec 2025 03:43:03 -0800 (PST) X-Google-Smtp-Source: AGHT+IGCUeryxEuhslnEMUgRLQ538+mugwQpyqKxhABdKsq18zRMJQYzzEDch02GfgdLzQT6oGGhLg== X-Received: by 2002:a05:622a:178b:b0:4ed:2ff9:b325 with SMTP id d75a77b69052e-4f4abd9da0cmr29498401cf.59.1766144583291; Fri, 19 Dec 2025 03:43:03 -0800 (PST) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:d857:5c4e:6d25:707c]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d193d4f09sm41134425e9.12.2025.12.19.03.43.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 03:43:02 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 19 Dec 2025 12:42:22 +0100 Subject: [PATCH v6 7/7] net: stmmac: qcom-ethqos: add support for sa8255p Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-qcom-sa8255p-emac-v6-7-487f1082461e@oss.qualcomm.com> References: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> In-Reply-To: <20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. 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Unlike the previously supported variants, this one's power management is done in the firmware using SCMI. This is modeled in linux using power domains so add support for them. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 234 +++++++++++++++++= +--- 1 file changed, 209 insertions(+), 25 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 8ba57bba3f2e..54f8ef3cfd7d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include =20 #include "stmmac.h" #include "stmmac_platform.h" @@ -81,6 +83,13 @@ =20 #define SGMII_10M_RX_CLK_DVDR 0x31 =20 +enum ethqos_pd_selector { + ETHQOS_PD_CORE =3D 0, + ETHQOS_PD_MDIO, + ETHQOS_PD_SERDES, + ETHQOS_NUM_PDS, +}; + struct ethqos_emac_por { unsigned int offset; unsigned int value; @@ -98,6 +107,9 @@ struct ethqos_emac_driver_data { =20 struct ethqos_emac_pm_data { const char *link_clk_name; + bool use_domains; + struct dev_pm_domain_attach_data pd; + unsigned int clk_ptp_rate; }; =20 struct ethqos_emac_match_data { @@ -111,13 +123,20 @@ struct ethqos_emac_pm_ctx { struct phy *serdes_phy; }; =20 +struct ethqos_emac_pd_ctx { + struct dev_pm_domain_list *pd_list; +}; + struct qcom_ethqos { struct platform_device *pdev; void __iomem *rgmii_base; void __iomem *mac_base; int (*configure_func)(struct qcom_ethqos *ethqos, int speed); =20 - struct ethqos_emac_pm_ctx pm; + union { + struct ethqos_emac_pm_ctx pm; + struct ethqos_emac_pd_ctx pd; + }; phy_interface_t phy_mode; int serdes_speed; int (*set_serdes_speed)(struct qcom_ethqos *ethqos); @@ -341,6 +360,25 @@ static const struct ethqos_emac_match_data emac_sa8775= p_data =3D { .pm_data =3D &emac_sa8775p_pm_data, }; =20 +static const char * const emac_sa8255p_pd_names[] =3D { + "core", "mdio", "serdes" +}; + +static const struct ethqos_emac_pm_data emac_sa8255p_pm_data =3D { + .pd =3D { + .pd_flags =3D PD_FLAG_NO_DEV_LINK, + .pd_names =3D emac_sa8255p_pd_names, + .num_pd_names =3D ETHQOS_NUM_PDS, + }, + .use_domains =3D true, + .clk_ptp_rate =3D 230400000, +}; + +static const struct ethqos_emac_match_data emac_sa8255p_data =3D { + .drv_data =3D &emac_v4_0_0_data, + .pm_data =3D &emac_sa8255p_pm_data, +}; + static int ethqos_dll_configure(struct qcom_ethqos *ethqos) { struct device *dev =3D ðqos->pdev->dev; @@ -407,6 +445,28 @@ static int ethqos_dll_configure(struct qcom_ethqos *et= hqos) return 0; } =20 +static int qcom_ethqos_domain_on(struct qcom_ethqos *ethqos, + enum ethqos_pd_selector sel) +{ + struct device *dev =3D ethqos->pd.pd_list->pd_devs[sel]; + int ret; + + ret =3D pm_runtime_resume_and_get(dev); + if (ret < 0) + dev_err(ðqos->pdev->dev, + "Failed to enable the power domain for %s\n", + dev_name(dev)); + return ret; +} + +static void qcom_ethqos_domain_off(struct qcom_ethqos *ethqos, + enum ethqos_pd_selector sel) +{ + struct device *dev =3D ethqos->pd.pd_list->pd_devs[sel]; + + pm_runtime_put_sync(dev); +} + static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed) { struct device *dev =3D ðqos->pdev->dev; @@ -623,6 +683,13 @@ static int ethqos_set_serdes_speed_phy(struct qcom_eth= qos *ethqos) return phy_set_speed(ethqos->pm.serdes_phy, ethqos->serdes_speed); } =20 +static int ethqos_set_serdes_speed_pd(struct qcom_ethqos *ethqos) +{ + struct device *dev =3D ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + + return dev_pm_opp_set_level(dev, ethqos->serdes_speed); +} + static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed) { if (ethqos->serdes_speed !=3D speed) { @@ -712,6 +779,28 @@ static void qcom_ethqos_serdes_powerdown(struct net_de= vice *ndev, void *priv) phy_exit(ethqos->pm.serdes_phy); } =20 +static int qcom_ethqos_pd_serdes_powerup(struct net_device *ndev, void *pr= iv) +{ + struct qcom_ethqos *ethqos =3D priv; + struct device *dev =3D ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + int ret; + + ret =3D qcom_ethqos_domain_on(ethqos, ETHQOS_PD_SERDES); + if (ret < 0) + return ret; + + return dev_pm_opp_set_level(dev, ethqos->serdes_speed); +} + +static void qcom_ethqos_pd_serdes_powerdown(struct net_device *ndev, void = *priv) +{ + struct qcom_ethqos *ethqos =3D priv; + struct device *dev =3D ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + + dev_pm_opp_set_level(dev, 0); + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_SERDES); +} + static int ethqos_clks_config(void *priv, bool enabled) { struct qcom_ethqos *ethqos =3D priv; @@ -742,6 +831,68 @@ static void ethqos_clks_disable(void *data) ethqos_clks_config(data, false); } =20 +static void ethqos_disable_serdes(void *data) +{ + struct qcom_ethqos *ethqos =3D data; + + qcom_ethqos_domain_on(ethqos, ETHQOS_PD_SERDES); +} + +static int ethqos_pd_clks_config(void *priv, bool enabled) +{ + struct qcom_ethqos *ethqos =3D priv; + int ret =3D 0; + + if (enabled) { + ret =3D qcom_ethqos_domain_on(ethqos, ETHQOS_PD_MDIO); + if (ret < 0) { + dev_err(ðqos->pdev->dev, + "Failed to enable the MDIO power domain\n"); + return ret; + } + + ethqos_set_func_clk_en(ethqos); + } else { + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_MDIO); + } + + return ret; +} + +static int qcom_ethqos_pd_init(struct device *dev, void *priv) +{ + struct qcom_ethqos *ethqos =3D priv; + int ret; + + /* + * Enable functional clock to prevent DMA reset after timeout due + * to no PHY clock being enabled after the hardware block has been + * power cycled. The actual configuration will be adjusted once + * ethqos_fix_mac_speed() is called. + */ + ethqos_set_func_clk_en(ethqos); + + ret =3D qcom_ethqos_domain_on(ethqos, ETHQOS_PD_CORE); + if (ret) + return ret; + + ret =3D qcom_ethqos_domain_on(ethqos, ETHQOS_PD_MDIO); + if (ret) { + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_CORE); + return ret; + } + + return 0; +} + +static void qcom_ethqos_pd_exit(struct device *dev, void *data) +{ + struct qcom_ethqos *ethqos =3D data; + + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_MDIO); + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_CORE); +} + static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv) { struct plat_stmmacenet_data *plat_dat =3D priv->plat; @@ -782,8 +933,6 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) "dt configuration failed\n"); } =20 - plat_dat->clks_config =3D ethqos_clks_config; - ethqos =3D devm_kzalloc(dev, sizeof(*ethqos), GFP_KERNEL); if (!ethqos) return -ENOMEM; @@ -825,28 +974,67 @@ static int qcom_ethqos_probe(struct platform_device *= pdev) ethqos->rgmii_config_loopback_en =3D drv_data->rgmii_config_loopback_en; ethqos->has_emac_ge_3 =3D drv_data->has_emac_ge_3; ethqos->needs_sgmii_loopback =3D drv_data->needs_sgmii_loopback; + ethqos->serdes_speed =3D SPEED_1000; =20 - ethqos->pm.link_clk =3D devm_clk_get(dev, clk_name); - if (IS_ERR(ethqos->pm.link_clk)) - return dev_err_probe(dev, PTR_ERR(ethqos->pm.link_clk), - "Failed to get link_clk\n"); + if (pm_data && pm_data->use_domains) { + ethqos->set_serdes_speed =3D ethqos_set_serdes_speed_pd; =20 - ret =3D ethqos_clks_config(ethqos, true); - if (ret) - return ret; + ret =3D devm_pm_domain_attach_list(dev, &pm_data->pd, + ðqos->pd.pd_list); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to attach power domains\n"); =20 - ret =3D devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); - if (ret) - return ret; + plat_dat->clks_config =3D ethqos_pd_clks_config; + plat_dat->serdes_powerup =3D qcom_ethqos_pd_serdes_powerup; + plat_dat->serdes_powerdown =3D qcom_ethqos_pd_serdes_powerdown; + plat_dat->exit =3D qcom_ethqos_pd_exit; + plat_dat->init =3D qcom_ethqos_pd_init; + plat_dat->clk_ptp_rate =3D pm_data->clk_ptp_rate; =20 - ethqos->pm.serdes_phy =3D devm_phy_optional_get(dev, "serdes"); - if (IS_ERR(ethqos->pm.serdes_phy)) - return dev_err_probe(dev, PTR_ERR(ethqos->pm.serdes_phy), - "Failed to get serdes phy\n"); + ret =3D qcom_ethqos_pd_init(dev, ethqos); + if (ret) + return ret; + + ret =3D qcom_ethqos_domain_on(ethqos, ETHQOS_PD_SERDES); + if (ret) + return dev_err_probe(dev, ret, + "Failed to enable the serdes power domain\n"); + + ret =3D devm_add_action_or_reset(dev, ethqos_disable_serdes, ethqos); + if (ret) + return ret; + } else { + ethqos->set_serdes_speed =3D ethqos_set_serdes_speed_phy; + + ethqos->pm.link_clk =3D devm_clk_get(dev, clk_name); + if (IS_ERR(ethqos->pm.link_clk)) + return dev_err_probe(dev, PTR_ERR(ethqos->pm.link_clk), + "Failed to get link_clk\n"); + + ret =3D ethqos_clks_config(ethqos, true); + if (ret) + return ret; + + ret =3D devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); + if (ret) + return ret; + + ethqos->pm.serdes_phy =3D devm_phy_optional_get(dev, "serdes"); + if (IS_ERR(ethqos->pm.serdes_phy)) + return dev_err_probe(dev, PTR_ERR(ethqos->pm.serdes_phy), + "Failed to get serdes phy\n"); + + ethqos_update_link_clk(ethqos, SPEED_1000); + + plat_dat->clks_config =3D ethqos_clks_config; + plat_dat->ptp_clk_freq_config =3D ethqos_ptp_clk_freq_config; + + if (ethqos->pm.serdes_phy) { + plat_dat->serdes_powerup =3D qcom_ethqos_serdes_powerup; + plat_dat->serdes_powerdown =3D qcom_ethqos_serdes_powerdown; + } + } =20 - ethqos->set_serdes_speed =3D ethqos_set_serdes_speed_phy; - ethqos->serdes_speed =3D SPEED_1000; - ethqos_update_link_clk(ethqos, SPEED_1000); ethqos_set_func_clk_en(ethqos); =20 plat_dat->bsp_priv =3D ethqos; @@ -864,11 +1052,6 @@ static int qcom_ethqos_probe(struct platform_device *= pdev) if (drv_data->dma_addr_width) plat_dat->host_dma_width =3D drv_data->dma_addr_width; =20 - if (ethqos->pm.serdes_phy) { - plat_dat->serdes_powerup =3D qcom_ethqos_serdes_powerup; - plat_dat->serdes_powerdown =3D qcom_ethqos_serdes_powerdown; - } - /* Enable TSO on queue0 and enable TBS on rest of the queues */ for (i =3D 1; i < plat_dat->tx_queues_to_use; i++) plat_dat->tx_queues_cfg[i].tbs_en =3D 1; @@ -878,6 +1061,7 @@ static int qcom_ethqos_probe(struct platform_device *p= dev) =20 static const struct of_device_id qcom_ethqos_match[] =3D { { .compatible =3D "qcom,qcs404-ethqos", .data =3D &emac_qcs404_data}, + { .compatible =3D "qcom,sa8255p-ethqos", .data =3D &emac_sa8255p_data}, { .compatible =3D "qcom,sa8775p-ethqos", .data =3D &emac_sa8775p_data}, { .compatible =3D "qcom,sc8280xp-ethqos", .data =3D &emac_sc8280xp_data}, { .compatible =3D "qcom,sm8150-ethqos", .data =3D &emac_sm8150_data}, --=20 2.47.3