From nobody Sun Feb 8 21:42:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25FA225A655; Fri, 19 Dec 2025 19:28:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766172534; cv=none; b=nP3Vh9+Br4uDHlXf4UA2DdLxNkYjRgqYmL7UXavC8r3yOlfwZoNgO4RgICwfDG/MOCYO4eWeQQjSEyPtKT9SU+2VNKWkkLjqHhFI84LFLts+chaPmArcMBAy4XzzKZ4v+dKQnMuD+JanQ6VhRE0b1I8xYjoN6NzaLho1PXwJqTs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766172534; c=relaxed/simple; bh=SaPZPOIho/DNNXy8lUHHqnW23Nrz/VpzQ3D/fLJ4Iqw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lel6ivdKHK+Wcl4wAVBY1R/KLy/OgWPlOFwAy1Hzyg0UNgg1X0qGlNTge5slkc6AE+zqHkty4mHs+/CLDQc80Hl5AJF3QSlZ1m62+lXLqa+5UE6djPFFxTHe4eLn4hsXb7CuGd/yajfedZB3MNHOaN5kU4CyxXDjlB9TbEw3fCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tSkjkIYA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tSkjkIYA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 59B6EC16AAE; Fri, 19 Dec 2025 19:28:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766172533; bh=SaPZPOIho/DNNXy8lUHHqnW23Nrz/VpzQ3D/fLJ4Iqw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=tSkjkIYAtkIso4fBWa46CFRhL8jSm4p5h0RIOcNLopCfHImYngKa2ohM/BP8wepq4 8OOrexX8w49NXsGMKl8yRc1NSxJ6C2/alvYuiJ9OLlGGhp/bbrFSpmBfVFkR6q/7jg UNTCOPxvmRBhMNY82vbZl+hUJ1VNphiXOJNieNft0xrvetjkHRKgjMemiaHcCM1F0x 2VmFqIKqJv6Cvtv1y6GT5u3cQ26oaWF53pVZze8Ew4jxh2BWlMvFvrr0cImtWc8HnB FIiWlvZqUae5l7cDfHtaQmA/vBIONTEYLtUPeD2QaSidDk+mbQf5ZrpcRrAdXs1jIi lTuYQTkzaJIAw== From: Mark Brown Date: Fri, 19 Dec 2025 19:28:07 +0000 Subject: [PATCH v3 1/4] KVM: selftests: arm64: Report set_id_reg reads of test registers as tests Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-kvm-arm64-set-id-regs-aarch64-v3-1-bfa474ec3218@kernel.org> References: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> In-Reply-To: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=4838; i=broonie@kernel.org; h=from:subject:message-id; bh=SaPZPOIho/DNNXy8lUHHqnW23Nrz/VpzQ3D/fLJ4Iqw=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpRadtwYsuoz4nmH/iJ5tCts/hvKpqU4VNOFY4l kX/WAgh6MyJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaUWnbQAKCRAk1otyXVSH 0OmlB/9g+nq00OGZ9vxahUOt5/PqvgxvUaKy8Bkr6xrPYFoiw2w2gaNrF/hTm0QWiBZ8fActnR9 j5wCWxZ3IvFwlyXMVfY98cxMfmMhnsf8Cctfg7d0Vei/9FN14iFfB0IDtCHL2L9D0j4gdSFwf7V kvB39G60sH2M2+P2qz1BngwPJulI94/be/QaBfoAVejyI+RW+1AMNspOJC9BBp7nKTY0C8P06hW x1VjshMlX0Iaz+m0eiie+/Cr6qmgRzcVg8CqPx1kTYZqhGQwXXQcQy4FYa3AlNiPcTITfsDwGSK B9p+NCFPYlIUgQxlnszD6rbUolQwdL0jVPSi9YfNjrioejht X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when we run guest code to validate that the values we wrote to the registers are seen by the guest we assert that these values match using a KVM selftests level assert, resulting in unclear diagnostics if the test fails. Replace this assert with reporting a kselftest test per register. In order to support getting the names of the registers we repaint the array of ID_ registers to store the names and open code the rest. Signed-off-by: Mark Brown Reviewed-by: Ben Horgan --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 74 +++++++++++++++++++--= ---- 1 file changed, 57 insertions(+), 17 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index c4815d365816..84e9484a4899 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -40,6 +40,7 @@ struct reg_ftr_bits { }; =20 struct test_feature_reg { + const char *name; uint32_t reg; const struct reg_ftr_bits *ftr_bits; }; @@ -218,24 +219,25 @@ static const struct reg_ftr_bits ftr_id_aa64zfr0_el1[= ] =3D { =20 #define TEST_REG(id, table) \ { \ - .reg =3D id, \ + .name =3D #id, \ + .reg =3D SYS_ ## id, \ .ftr_bits =3D &((table)[0]), \ } =20 static struct test_feature_reg test_regs[] =3D { - TEST_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), - TEST_REG(SYS_ID_DFR0_EL1, ftr_id_dfr0_el1), - TEST_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), - TEST_REG(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), - TEST_REG(SYS_ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), - TEST_REG(SYS_ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), - TEST_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), - TEST_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), - TEST_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), - TEST_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), - TEST_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), - TEST_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), - TEST_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), + TEST_REG(ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), + TEST_REG(ID_DFR0_EL1, ftr_id_dfr0_el1), + TEST_REG(ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), + TEST_REG(ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), + TEST_REG(ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), + TEST_REG(ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), + TEST_REG(ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), + TEST_REG(ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), + TEST_REG(ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), + TEST_REG(ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), + TEST_REG(ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), + TEST_REG(ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), + TEST_REG(ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), }; =20 #define GUEST_REG_SYNC(id) GUEST_SYNC_ARGS(0, id, read_sysreg_s(id), 0, 0); @@ -265,6 +267,34 @@ static void guest_code(void) GUEST_DONE(); } =20 +#define GUEST_READ_TEST (ARRAY_SIZE(test_regs) + 6) + +static const char *get_reg_name(u64 id) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) + if (test_regs[i].reg =3D=3D id) + return test_regs[i].name; + + switch (id) { + case SYS_MPIDR_EL1: + return "MPIDR_EL1"; + case SYS_CLIDR_EL1: + return "CLIDR_EL1"; + case SYS_CTR_EL0: + return "CTR_EL0"; + case SYS_MIDR_EL1: + return "MIDR_EL1"; + case SYS_REVIDR_EL1: + return "REVIDR_EL1"; + case SYS_AIDR_EL1: + return "AIDR_EL1"; + default: + TEST_FAIL("Unknown register"); + } +} + /* Return a safe value to a given ftr_bits an ftr value */ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) { @@ -639,6 +669,8 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) { bool done =3D false; struct ucall uc; + uint64_t reg_id, expected_val, guest_val; + bool match; =20 while (!done) { vcpu_run(vcpu); @@ -649,8 +681,16 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) break; case UCALL_SYNC: /* Make sure the written values are seen by guest */ - TEST_ASSERT_EQ(test_reg_vals[encoding_to_range_idx(uc.args[2])], - uc.args[3]); + reg_id =3D uc.args[2]; + guest_val =3D uc.args[3]; + expected_val =3D test_reg_vals[encoding_to_range_idx(reg_id)]; + match =3D expected_val =3D=3D guest_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", + expected_val, guest_val); + ksft_test_result(match, + "%s value seen in guest\n", + get_reg_name(reg_id)); break; case UCALL_DONE: done =3D true; @@ -790,7 +830,7 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST; + test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.3 From nobody Sun Feb 8 21:42:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90D4A2D29C7; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nRS+LcaY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 01AD4C4CEF1; Fri, 19 Dec 2025 19:28:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766172536; bh=SdYdUswJJiZaW0PkSaAFAoCdE/2lYRbBCPt0U91wSxc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nRS+LcaYKl/DMoBzXvuyOtROXvyzMXADsK6tPR1ihh0inlbly03MOGmPAxryDND5u WIPuI5ER2sMzDFk+mdDuAkZ9jym+DxdyS4mgz+CEOARNGAgHqiMIgxVl99AXmpHr1g O7btdXtKsB81g5n38iu6xKleTVB4MynnykbmdBhADd/474I+XWTr1DQleYpvL7vfEZ WnqgMzgSWKrCjhHLsjRJhys/w6O81JX3sXYhZCe+pl/OUqN3xuflsIfQ2iIZneaKps L3NXKUAyciHrtoU+Yi88uyej4+98LK/sMFea40E5p0XUH8yTJ5h5r5syxTBv+WTfX+ bbJzIL2khMf9w== From: Mark Brown Date: Fri, 19 Dec 2025 19:28:08 +0000 Subject: [PATCH v3 2/4] KVM: selftests: arm64: Report register reset tests individually Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-kvm-arm64-set-id-regs-aarch64-v3-2-bfa474ec3218@kernel.org> References: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> In-Reply-To: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=2202; i=broonie@kernel.org; h=from:subject:message-id; bh=SdYdUswJJiZaW0PkSaAFAoCdE/2lYRbBCPt0U91wSxc=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpRaduyXOPQ7ybAubYxY5U6OC4+AhX+gS6mGJas FH+FffP8s2JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaUWnbgAKCRAk1otyXVSH 0MCHB/9Qlhp2TdS0PikTLxu+Wv7EjxCICvVDUjybZ889JVmaaYKh1rQkTc696oeHE9Q4rESyyKk 0agfINuguF0+oLxSxfEjbjwNGPotuosJLXWv6o7paIXtkuXTWHsAnHM4IcKW19FmCQz1AKIXrLy o64vKFk3kUvDaL4EvSB8OPmje/jvtqeZsXV8+WZ7Ka1BCFsnCVyMUjsuPUo8OAzfu2icqa2saLZ 11UUJ4hHbWJAzniuL4yIat5ZaefYZSqErypFaSsjewSMmit5t16MwfHmyoM7ObzZK4PK1ks3Yeu LukLDeBzk/fijANyoqfhLTjsRwQ1Pl30UO51NiDPjPUPOEYR X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB set_id_regs tests that registers have their values preserved over reset. Currently it reports all registers in a single test with an instantly fatal assert which isn't great for diagnostics, it's hard to tell which register failed or if it's just one register. Change this to report each register as a separate test so that it's clear from the program output which registers have problems. Signed-off-by: Mark Brown Reviewed-by: Ben Horgan --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 84e9484a4899..b61942895808 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -779,11 +779,18 @@ static void test_assert_id_reg_unchanged(struct kvm_v= cpu *vcpu, uint32_t encodin { size_t idx =3D encoding_to_range_idx(encoding); uint64_t observed; + bool pass; =20 observed =3D vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); - TEST_ASSERT_EQ(test_reg_vals[idx], observed); + pass =3D test_reg_vals[idx] =3D=3D observed; + if (!pass) + ksft_print_msg("%lx !=3D %lx\n", test_reg_vals[idx], observed); + ksft_test_result(pass, "%s unchanged by reset\n", + get_reg_name(encoding)); } =20 +#define ID_REG_RESET_UNCHANGED_TEST (ARRAY_SIZE(test_regs) + 6) + static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu) { /* @@ -801,8 +808,6 @@ static void test_reset_preserves_id_regs(struct kvm_vcp= u *vcpu) test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1); - - ksft_test_result_pass("%s\n", __func__); } =20 int main(void) @@ -830,7 +835,8 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; + test_cnt =3D 2 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST + + ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.3 From nobody Sun Feb 8 21:42:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65344242D79; Fri, 19 Dec 2025 19:28:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 19 Dec 2025 19:28:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766172538; bh=R1XVjsx+s/KecSNN14H7GIfYrgADmWPCYDfI6Vk/UQY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sitanXwIdTD/Dug9t4KURCJ5jl85QmRf1lcW0mjgnpj61+mUgkrPqtnFo5jtjc9zY I8iyCBlegKZpyel92aOisIJMtdp5UDQOa6iKFOdDYfyUZpQtBoQ9pWC2fCSKQq9GP1 SW4CLpgKMKumMNynSxHBE8Z/fduyTLy0o/jMjTXmKx4fKkwJ+qXUvB3TrJiLRHaMtB J24rJPO5GRJZLeZkPR6a3t2GujnFkYOZcPEJvDitn6bKlR8ElqF3HQw07FHVBpTIoC /FEz0QIwElaQhfwFYd5WrBLa1fldiszxdiZZs+amO/D84cqeppd7AEvMCyhX049Ejt 4dnQp+/trUS6w== From: Mark Brown Date: Fri, 19 Dec 2025 19:28:09 +0000 Subject: [PATCH v3 3/4] KVM: selftests: arm64: Make set_id_regs bitfield validatity checks non-fatal Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-kvm-arm64-set-id-regs-aarch64-v3-3-bfa474ec3218@kernel.org> References: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> In-Reply-To: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=3523; i=broonie@kernel.org; h=from:subject:message-id; bh=R1XVjsx+s/KecSNN14H7GIfYrgADmWPCYDfI6Vk/UQY=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpRadu7NYbE7SpZdFkNyj36p+IgIXd65kXL032t AAq8N3LpZCJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaUWnbgAKCRAk1otyXVSH 0MeFB/9XIf8ZqxWuzQp2vtHgFYSDQNCB+eFJxCnC40RRKQcjkPb8MfFX/B+FuOlGb5V6H2AwkGp HSkwuelsnfm1k44kOheMrcIT7ZvVQ4k7HQi1Pwq3J9OlvtY/7avFIK1hxoDxsQIIvjEyT4wt5ed KLTv+ifLkKQodIwiQ6NIUrybfNEMNN6rHWLs9T9/SZfS257JJdG9F9ydXDpH8dji7A3tCbvp2D8 rc4vcSwEBERKbxMYSzwuNyv0uruaLtbH9o3Q+HNFmK6ewmHa1RsMvfGuZvSASQn+zhJW2yc+6YL KjA/uZ+++lKyKTXu1BqPC4xHeO8RgiRCcnK2BBjHYvc1xxnA X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when set_id_regs encounters a problem checking validation of writes to feature registers it uses an immediately fatal assert to report the problem. This is not idiomatic for kselftest, and it is also not great for usability. The affected bitfield is not clearly reported and further tests do not have their results reported. Switch to using standard kselftest result reporting for the two asserts we do, these are non-fatal asserts so allow the program to continue and the test names include the affected field. Signed-off-by: Mark Brown Reviewed-by: Ben Horgan --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index b61942895808..5837da63e9b9 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -409,6 +409,7 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *v= cpu, uint64_t reg, uint8_t shift =3D ftr_bits->shift; uint64_t mask =3D ftr_bits->mask; uint64_t val, new_val, ftr; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -421,7 +422,10 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *= vcpu, uint64_t reg, =20 vcpu_set_reg(vcpu, reg, val); new_val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(new_val, val); + match =3D new_val =3D=3D val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", new_val, val); + ksft_test_result(match, "%s valid write succeeded\n", ftr_bits->name); =20 return new_val; } @@ -433,6 +437,7 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, ui= nt64_t reg, uint64_t mask =3D ftr_bits->mask; uint64_t val, old_val, ftr; int r; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -449,7 +454,10 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, u= int64_t reg, "Unexpected KVM_SET_ONE_REG error: r=3D%d, errno=3D%d", r, errno); =20 val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(val, old_val); + match =3D val =3D=3D old_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", val, old_val); + ksft_test_result(match, "%s invalid write rejected\n", ftr_bits->name); } =20 static uint64_t test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE]; @@ -489,7 +497,11 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu,= bool aarch64_only) for (int j =3D 0; ftr_bits[j].type !=3D FTR_END; j++) { /* Skip aarch32 reg on aarch64 only system, since they are RAZ/WI. */ if (aarch64_only && sys_reg_CRm(reg_id) < 4) { - ksft_test_result_skip("%s on AARCH64 only system\n", + ksft_print_msg("%s on AARCH64 only system\n", + ftr_bits[j].name); + ksft_test_result_skip("%s invalid write rejected\n", + ftr_bits[j].name); + ksft_test_result_skip("%s valid write succeeded\n", ftr_bits[j].name); continue; } @@ -501,8 +513,6 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, = bool aarch64_only) =20 test_reg_vals[idx] =3D test_reg_set_success(vcpu, reg, &ftr_bits[j]); - - ksft_test_result_pass("%s\n", ftr_bits[j].name); } } } @@ -839,7 +849,7 @@ int main(void) ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) - test_cnt++; + test_cnt +=3D 2; =20 ksft_set_plan(test_cnt); =20 --=20 2.47.3 From nobody Sun Feb 8 21:42:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F15033F8C2; Fri, 19 Dec 2025 19:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 19 Dec 2025 19:28:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766172541; bh=ePyIOcLw3qUF6qAyJngOGuOfqRNYRlISmZ1orSZP0mk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XfxsieM3KG2nemYgQZrRsqd2l9fZxnvc5TOZERMw7b+8ex5T6qtxVYRB+erKJWDI6 vpHXNGStP3jVV7ZDNKCPe3xQLbrMUxgjdagn7sDh3RUs2wQJ0d5BVwgTMBOOaQqeLP fPKuO5hO8wE4+qTI/YdLKSjRKvG64a5Z5K+QV07i4Uex27/QL1kyQYbBF6HvuM5OaU /tMt0+isLP3ieW59RXavIzA5tttN9xjTWYbknYXI0WNnmgv59tLSJcWVh19QGTYwPU 5bHalpaN97kMHjo+/dAY7lQFfpOYiYsyVN4kuhLk3vua/fxje63/sHW+xWlLLOFES/ Bg6Kb+CR/S5kA== From: Mark Brown Date: Fri, 19 Dec 2025 19:28:10 +0000 Subject: [PATCH v3 4/4] KVM: selftests: arm64: Skip all 32 bit IDs when set_id_regs is aarch64 only Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251219-kvm-arm64-set-id-regs-aarch64-v3-4-bfa474ec3218@kernel.org> References: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> In-Reply-To: <20251219-kvm-arm64-set-id-regs-aarch64-v3-0-bfa474ec3218@kernel.org> To: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan , Oliver Upton Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=openpgp-sha256; l=4530; i=broonie@kernel.org; h=from:subject:message-id; bh=ePyIOcLw3qUF6qAyJngOGuOfqRNYRlISmZ1orSZP0mk=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpRadv2AkLNtWtMjbY/XUUsUHGKaC7S3EPyHEjy ctjsXQSieWJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaUWnbwAKCRAk1otyXVSH 0HErB/0UKCEgiBTrpFERnJ4P/ggQezbnaMjbAqIfCY4o9cf3hDHlm637ZGRBLslfyNwMWhaD+Qf TktFtQtkhOIuO7JuGYgW/yoCkm+2s1KSkH6UFNgqlaF60Sc1TyiN5IMLj89+ekC84Yqm0NC1hmt z9+GkBKXHsiIdjYrnghmkSbNRmyh+WvHgPkugUJQb8lh9bjG/Arorb4fL44WK6pPIdv7MscI4c0 6si7NnhyeWXs1/9Drq2jI+jMQlOVSrRpoQw73tS1GUj8BQHVvHnpm/Q+3tZqZvFg1O7k9peoagp MVx42cpsr8NFNmpgL6KKfTL9Xfe25XJRsnIRlzLGiT2StMPq X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB On an aarch64 only system the 32 bit ID registers have UNDEFINED values. As a result set_id_regs skips tests for setting fields in these registers when testing an aarch64 only guest. This has the side effect of meaning that we don't record an expected value for these registers, meaning that when the subsequent tests for values being visible in guests and preserved over reset check the value they can spuriously fail. This can be seen by running on an emulated system with both NV and 32 bit enabled, NV will result in the guests created by the test program being 64 bit only but the 32 bit ID registers will have values. Also skip those tests that use the values set in the field setting tests for aarch64 only guests in order to avoid these spurious failures. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 42 +++++++++++++++++----= ---- 1 file changed, 29 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 5837da63e9b9..f19ba949aa18 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -675,7 +675,7 @@ static void test_user_set_mte_reg(struct kvm_vcpu *vcpu) ksft_test_result_pass("ID_AA64PFR1_EL1.MTE_frac no longer 0xF\n"); } =20 -static void test_guest_reg_read(struct kvm_vcpu *vcpu) +static void test_guest_reg_read(struct kvm_vcpu *vcpu, bool aarch64_only) { bool done =3D false; struct ucall uc; @@ -694,6 +694,13 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) reg_id =3D uc.args[2]; guest_val =3D uc.args[3]; expected_val =3D test_reg_vals[encoding_to_range_idx(reg_id)]; + + if (aarch64_only && sys_reg_CRm(reg_id) < 4) { + ksft_test_result_skip("%s value seen in guest\n", + get_reg_name(reg_id)); + break; + } + match =3D expected_val =3D=3D guest_val; if (!match) ksft_print_msg("%lx !=3D %lx\n", @@ -785,12 +792,19 @@ static void test_vcpu_non_ftr_id_regs(struct kvm_vcpu= *vcpu) ksft_test_result_pass("%s\n", __func__); } =20 -static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t e= ncoding) +static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t e= ncoding, + bool aarch64_only) { size_t idx =3D encoding_to_range_idx(encoding); uint64_t observed; bool pass; =20 + if (aarch64_only && sys_reg_CRm(encoding) < 4) { + ksft_test_result_skip("%s unchanged by reset\n", + get_reg_name(encoding)); + return; + } + observed =3D vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); pass =3D test_reg_vals[idx] =3D=3D observed; if (!pass) @@ -801,7 +815,8 @@ static void test_assert_id_reg_unchanged(struct kvm_vcp= u *vcpu, uint32_t encodin =20 #define ID_REG_RESET_UNCHANGED_TEST (ARRAY_SIZE(test_regs) + 6) =20 -static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu) +static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu, + bool aarch64_only) { /* * Calls KVM_ARM_VCPU_INIT behind the scenes, which will do an @@ -810,14 +825,15 @@ static void test_reset_preserves_id_regs(struct kvm_v= cpu *vcpu) aarch64_vcpu_setup(vcpu, NULL); =20 for (int i =3D 0; i < ARRAY_SIZE(test_regs); i++) - test_assert_id_reg_unchanged(vcpu, test_regs[i].reg); - - test_assert_id_reg_unchanged(vcpu, SYS_MPIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_CLIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_CTR_EL0); - test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1); - test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1); + test_assert_id_reg_unchanged(vcpu, test_regs[i].reg, + aarch64_only); + + test_assert_id_reg_unchanged(vcpu, SYS_MPIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_CLIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_CTR_EL0, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1, aarch64_only); + test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1, aarch64_only); } =20 int main(void) @@ -859,9 +875,9 @@ int main(void) test_user_set_mpam_reg(vcpu); test_user_set_mte_reg(vcpu); =20 - test_guest_reg_read(vcpu); + test_guest_reg_read(vcpu, aarch64_only); =20 - test_reset_preserves_id_regs(vcpu); + test_reset_preserves_id_regs(vcpu, aarch64_only); =20 kvm_vm_free(vm); =20 --=20 2.47.3