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Thu, 18 Dec 2025 09:48:16 -0800 (PST) From: chengkaitao To: davem@davemloft.net, andreas@gaisler.com, akpm@linux-foundation.org, david@kernel.org, lorenzo.stoakes@oracle.com, Liam.Howlett@oracle.com, vbabka@suse.cz, rppt@kernel.org, surenb@google.com, mhocko@suse.com Cc: kevin.brodsky@arm.com, dave.hansen@linux.intel.com, ziy@nvidia.com, chengkaitao@kylinos.cn, willy@infradead.org, zhengqi.arch@bytedance.com, sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH v3 3/3] sparc: Remove unnecessary whitespace Date: Fri, 19 Dec 2025 01:47:49 +0800 Message-ID: <20251218174749.45965-4-pilgrimtao@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251218174749.45965-1-pilgrimtao@gmail.com> References: <20251218174749.45965-1-pilgrimtao@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chengkaitao This is purely a code formatting change with no functional impact. Signed-off-by: Chengkaitao --- arch/sparc/mm/fault_64.c | 4 ++-- arch/sparc/mm/hypersparc.S | 4 ++-- arch/sparc/mm/init_64.c | 6 +++--- arch/sparc/mm/io-unit.c | 12 ++++++------ arch/sparc/mm/iommu.c | 2 +- arch/sparc/mm/swift.S | 2 +- arch/sparc/mm/ultra.S | 4 ++-- 7 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c index e326caf708c6..963b2c4c87e2 100644 --- a/arch/sparc/mm/fault_64.c +++ b/arch/sparc/mm/fault_64.c @@ -201,7 +201,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *r= egs, int si_code, unsigned long address) { unsigned char asi =3D ASI_P; -=20 + if ((!insn) && (regs->tstate & TSTATE_PRIV)) goto cannot_handle; =20 @@ -229,7 +229,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *r= egs, int si_code, return; } } - =09 + /* Is this in ex_table? */ if (regs->tstate & TSTATE_PRIV) { const struct exception_table_entry *entry; diff --git a/arch/sparc/mm/hypersparc.S b/arch/sparc/mm/hypersparc.S index 6c2521e85a42..bac194982498 100644 --- a/arch/sparc/mm/hypersparc.S +++ b/arch/sparc/mm/hypersparc.S @@ -30,7 +30,7 @@ hypersparc_flush_cache_all: ld [%g4 + %lo(vac_cache_size)], %g5 sethi %hi(vac_line_size), %g1 ld [%g1 + %lo(vac_line_size)], %g2 -1:=09 +1: subcc %g5, %g2, %g5 ! hyper_flush_unconditional_combined bne 1b sta %g0, [%g5] ASI_M_FLUSH_CTX @@ -325,7 +325,7 @@ hypersparc_flush_tlb_page_out: sta %g5, [%g1] ASI_M_MMUREGS =20 __INIT -=09 + /* High speed page clear/copy. */ hypersparc_bzero_1page: /* NOTE: This routine has to be shorter than 40insns --jj */ diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index f477ab1b4f08..1c36448b95eb 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c @@ -5,7 +5,7 @@ * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu) * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ -=20 + #include #include #include @@ -2397,11 +2397,11 @@ void __init paging_init(void) * work. */ init_mm.pgd +=3D ((shift) / (sizeof(pgd_t))); -=09 + memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir)); =20 inherit_prom_mappings(); -=09 + /* Ok, we can use our TLB miss and window trap handlers safely. */ setup_tba(); =20 diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c index d409cb450de4..15f83e6d21e2 100644 --- a/arch/sparc/mm/io-unit.c +++ b/arch/sparc/mm/io-unit.c @@ -4,7 +4,7 @@ * * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ -=20 + #include #include #include @@ -62,7 +62,7 @@ static void __init iounit_iommu_init(struct platform_devi= ce *op) prom_printf("SUN4D: Cannot map External Page Table."); prom_halt(); } -=09 + op->dev.archdata.iommu =3D iounit; iounit->page_table =3D xpt; spin_lock_init(&iounit->lock); @@ -109,9 +109,9 @@ static dma_addr_t iounit_get_area(struct iounit_struct = *iounit, case 2: i =3D 0x0132; break; default: i =3D 0x0213; break; } -=09 + IOD(("%s(%pa,%d[%d])=3D", __func__, &phys, size, npages)); -=09 + next: j =3D (i & 15); rotor =3D iounit->rotor[j - 1]; limit =3D iounit->limit[j]; @@ -150,7 +150,7 @@ static dma_addr_t iounit_map_phys(struct device *dev, p= hys_addr_t phys, struct iounit_struct *iounit =3D dev->archdata.iommu; unsigned long flags; dma_addr_t ret; -=09 + /* XXX So what is maxphys for us and how do drivers know it? */ if (!len || len > 256 * 1024) return DMA_MAPPING_ERROR; @@ -185,7 +185,7 @@ static void iounit_unmap_phys(struct device *dev, dma_a= ddr_t vaddr, size_t len, { struct iounit_struct *iounit =3D dev->archdata.iommu; unsigned long flags; -=09 + spin_lock_irqsave(&iounit->lock, flags); len =3D ((vaddr & ~PAGE_MASK) + len + (PAGE_SIZE-1)) >> PAGE_SHIFT; vaddr =3D (vaddr - IOUNIT_DMA_BASE) >> PAGE_SHIFT; diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c index f48adf62724a..f43163a9a812 100644 --- a/arch/sparc/mm/iommu.c +++ b/arch/sparc/mm/iommu.c @@ -89,7 +89,7 @@ static void __init sbus_iommu_init(struct platform_device= *op) iommu->end =3D 0xffffffff; =20 /* Allocate IOMMU page table */ - /* Stupid alignment constraints give me a headache.=20 + /* Stupid alignment constraints give me a headache. We need 256K or 512K or 1M or 2M area aligned to its size and current gfp will fortunately give it to us. */ diff --git a/arch/sparc/mm/swift.S b/arch/sparc/mm/swift.S index f414bfd8d899..cfcc48b6c5c7 100644 --- a/arch/sparc/mm/swift.S +++ b/arch/sparc/mm/swift.S @@ -243,7 +243,7 @@ swift_flush_tlb_page: nop #if 1 mov 0x400, %o1 - sta %g0, [%o1] ASI_M_FLUSH_PROBE=09 + sta %g0, [%o1] ASI_M_FLUSH_PROBE #else lda [%g1] ASI_M_MMUREGS, %g5 sta %o3, [%g1] ASI_M_MMUREGS diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S index 70e658d107e0..66cbfbb1d3cd 100644 --- a/arch/sparc/mm/ultra.S +++ b/arch/sparc/mm/ultra.S @@ -284,7 +284,7 @@ __cheetah_flush_tlb_page: /* 22 insns */ be,pn %icc, 1f andn %o1, 1, %o3 stxa %g0, [%o3] ASI_IMMU_DEMAP -1: stxa %g0, [%o3] ASI_DMMU_DEMAP=09 +1: stxa %g0, [%o3] ASI_DMMU_DEMAP membar #Sync stxa %g2, [%o4] ASI_DMMU sethi %hi(KERNBASE), %o4 @@ -312,7 +312,7 @@ __cheetah_flush_tlb_pending: /* 27 insns */ be,pn %icc, 2f andn %o3, 1, %o3 stxa %g0, [%o3] ASI_IMMU_DEMAP -2: stxa %g0, [%o3] ASI_DMMU_DEMAP=09 +2: stxa %g0, [%o3] ASI_DMMU_DEMAP membar #Sync brnz,pt %o1, 1b nop --=20 2.50.1 (Apple Git-155)