From nobody Mon Feb 9 20:30:22 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37F2B2F0C74 for ; Thu, 18 Dec 2025 08:11:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766045514; cv=none; b=Q9tXfkVsHExL2Wi+5JEmRtMUMxLHCzzQ8waWCKmidcR/x/LW432N2pCLxFtlPzti1ESEK85hH9ffu/0cSJUDiQkwMiOT06HkptIGqHvXoxhWVUZn8UqmoaBnCvV2yfq9rYBcqg4OJfv0/zd6KbWfxaFI9kGWKYOZVAXPfxIbgbs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766045514; c=relaxed/simple; bh=q8/rrai7tK3QlHxXd2ntywANdfyHZd40ISRvDbztkyU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tJur43VfppFos+mgjmy8NPgNq1DxlmHlWMmD3rmFxa2SvK5IAUHfg8AYa0j+h9O65jcXKBwmjeuY1wUjwcN3uBJkfpam+vB1b4JUDzgsuHg8x2CzaPdH2zUQH87AkIKpEC0uReNxTCvmbcqeGrArem61mfIjT7q2Rac21IZVRas= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Bg/3SOYG; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Bg/3SOYG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1766045497; x=1797581497; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=q8/rrai7tK3QlHxXd2ntywANdfyHZd40ISRvDbztkyU=; b=Bg/3SOYGLyp4q2+sevV9Gtx5zuuSFliTeDBu97O+A8FBtLeDxts9IquS 3OjQJXKwvl2697hqGuaePMz54GVZEXzogqd7JBhFLw/W1vk8gxjTkokNx Rl2QGEHjGFK91AIwHSjc0eimis9st88jv2q2ozTB3NFPu1NSjkyAzz8qx NCs3ouC4/jOLmjuXbhkx5MD/NCfNaVuRTfiD1CcR6U+MeBrpEMMJq2+kK sSxHf12hfNKPPDvIZ47+eJXrEFxpTXuqeoeXhaiRNPQNPAE4Cmz4OtCH0 7oNfENQoS7FSQmPdOmnJ66hf0W0WpdBFL3ZXiWeCCDk4F68khSTpMBD99 Q==; X-CSE-ConnectionGUID: YhYvNUFdQEqcmp7LiC8awQ== X-CSE-MsgGUID: kU8J7NwzQH+/LAq6cej2bQ== X-IronPort-AV: E=McAfee;i="6800,10657,11645"; a="67873799" X-IronPort-AV: E=Sophos;i="6.21,156,1763452800"; d="scan'208";a="67873799" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2025 00:11:36 -0800 X-CSE-ConnectionGUID: bnxyHpnOTG+xJ6Mm31MCvg== X-CSE-MsgGUID: vF6Gkf0dTbq9IMq4sGISYw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,156,1763452800"; d="scan'208";a="198779792" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.22]) by fmviesa008.fm.intel.com with ESMTP; 18 Dec 2025 00:11:34 -0800 From: Xiaoyao Li To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , Tony Luck , linux-kernel@vger.kernel.org, xiaoyao.li@intel.com Subject: [PATCH 1/2] x86/split_lock: Fix handling in split_lock_init() Date: Thu, 18 Dec 2025 16:00:43 +0800 Message-ID: <20251218080044.2615106-2-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251218080044.2615106-1-xiaoyao.li@intel.com> References: <20251218080044.2615106-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Per commit 009bce1df0bb ("x86/split_lock: Don't write MSR_TEST_CTRL on CPUs that aren't whitelisted"), cpu_model_supports_sld was introduced to guard writes on MSR_TEST_CTRL in split_lock_init(). However, the sld_ratelimit case handling added later was not covered by the cpu_model_supports_sld check. Fix this by checking cpu_model_supports_sld at the beginning of split_lock_init(). Fixes: ef4ae6e44131 ("x86/bus_lock: Set rate limit for bus lock") Signed-off-by: Xiaoyao Li --- arch/x86/kernel/cpu/bus_lock.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/bus_lock.c b/arch/x86/kernel/cpu/bus_lock.c index dbc99a47be45..28bf208b92cb 100644 --- a/arch/x86/kernel/cpu/bus_lock.c +++ b/arch/x86/kernel/cpu/bus_lock.c @@ -169,6 +169,9 @@ static void sld_update_msr(bool on) =20 void split_lock_init(void) { + if (!cpu_model_supports_sld) + return; + /* * #DB for bus lock handles ratelimit and #AC for split lock is * disabled. @@ -178,8 +181,7 @@ void split_lock_init(void) return; } =20 - if (cpu_model_supports_sld) - split_lock_verify_msr(sld_state !=3D sld_off); + split_lock_verify_msr(sld_state !=3D sld_off); } =20 static void __split_lock_reenable_unlock(struct work_struct *work) --=20 2.43.0