From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 155672D97B7; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; cv=none; b=Lz+JWXeLNw4B4IeHtaurdwTCgzdgg6kGC02rbqb6ld/r8cQPmSoN8mvcJEjEiUYKRXaELNnz2z3KLVGndJBtcGlI82jkkXzlhIcNgkUDSAavyb6WMYBqoX8IMJSb90Q6+hDXWK6SqdLCUx4/qTtvEwt3uSud6qyyjjw8RMJ68/o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; c=relaxed/simple; bh=XhLZIJ1aGNsOa6zR/7FJFBDE32GVcpBkjhLN7XTCseA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V9znfLeuJMOL1GWFDKhwZ3ObSzCSlGoOsVwXqReO9m+pAJnvdPtOIYSYvWlwZN1W692r1pVPoG+Jl+e4bnzPK81MR6lhHYWXepLlzkIqBr5ZK36nBFML1zgR/6kL5IJ20O5YTNB0PEKzu7IiFSPQN29QGFFAWu0lAc10nW4CtuU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NNGmKXMv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NNGmKXMv" Received: by smtp.kernel.org (Postfix) with ESMTPS id AE3CBC113D0; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766096533; bh=XhLZIJ1aGNsOa6zR/7FJFBDE32GVcpBkjhLN7XTCseA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NNGmKXMvkK97gBmx6jjXbDK/gHvSeNyOk1vzCaOv6KgA6Mfb3SKvbvgFI5qiOYMIu bFBzsOnE7DPNKwGZ/G0jeE/6/6OtplaPHC8SoOEG4oOxVZd6xFhn/uto+gOsiXSRhY hgiUMbysQXpFAnboY96/1MzdACYgZVRb+TBR1zQCKU07ekFIY8mC7796eVHcJNrOA6 LZdfpL7qs/yxcN+liN9jOfUslencR0hm/zVSrtL/tjgscheV9CTORTmDLQZX9piEtf b7f/lVvvU2nl+lwu9eDhiwMu98VUh2GyFc9nSjD1xLZwlEXflQAu+E/5j/4wCSoEoR 0g3rfvUerc8Dg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D91CD6E2AE; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Thu, 18 Dec 2025 23:22:07 +0100 Subject: [PATCH v4 1/6] dt-bindings: arm: qcom: Document Microsoft Surface Pro 11 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-1-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=1443; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=ODLaLlEkMG2kK+0djUMjgpeCyxYtB1rpe7QmWVeQ38w=; b=eapOBwWELgT98JYZhKAFUjAKdIgtUMS8sccAXttnQQdPnFEJhY7bwjbBpP1t0DnYlJLBkb5mt 89OUwlWY6lLDb0zxIoJUrrX6sG3qYmmn9OgQTwsON0kwgm/HN5nvwIl X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Add the compatibles for the Qualcomm-based Microsoft Surface Pro 11, using its Denali codename. The LCD models are using the Qualcomm Snapdragon X1 Plus (X1P64100), the OLED ones are using the Qualcomm Snapdragon X1 Elite (X1E80100). Due to the difference in how the built-in panel is being handled between the OLED variant and LCD one, it is required to have two separate DTBs, so document the compatible string for both variants. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- Documentation/devicetree/bindings/arm/qcom.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index d84bd3bca2010508a8225b9549d8c634efa06531..3685330344c0bf621125fc3d2f9= c04082d6de144 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1067,6 +1067,17 @@ properties: - const: qcom,x1e78100 - const: qcom,x1e80100 =20 + - items: + - const: microsoft,denali-lcd + - const: microsoft,denali + - const: qcom,x1p64100 + - const: qcom,x1e80100 + + - items: + - const: microsoft,denali-oled + - const: microsoft,denali + - const: qcom,x1e80100 + - items: - enum: - asus,vivobook-s15 --=20 2.47.3 From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B97A2E9EDA; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; cv=none; b=tybAfq66o128XdvksTjj/VPxhzJR5twyj8+COoU8mdYjLKNrA00WGgT/G1DjgvV3IqjHum7b5Gn0XG8OnRJsekeFakzi64hcsOEy8MVwuDD+zwgm5ScDiAxz5Qx/3jDSwO9Anh+MoYtouIVIvE5MmDFXY4Nca3I7IQWNH7twqXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; c=relaxed/simple; bh=vYWy4tIF0oImarVkvgA+J57CDTRRyXKFwzAaZ9x3bZk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MBC5+4FI9HOxK7kilQHHuNxf6+zkpAZVzvXpMZYskibOYDcJV+JkvDbbEUKOWtFmo10XKetp75Vxn10OmzrjLo1NV5wx3itGj3tWQpUfQAosX7IRVZ2Vt7Gg4GNs4xvgQf1ww1SN8AqhHM90RYSTLtD1Dbj0TMoRYkGTOBe13Zc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vJXMw3Yk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vJXMw3Yk" Received: by smtp.kernel.org (Postfix) with ESMTPS id BD22DC116D0; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766096533; bh=vYWy4tIF0oImarVkvgA+J57CDTRRyXKFwzAaZ9x3bZk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=vJXMw3YkJWHpdoYkFJ5No892fKm8XxyKGPxZyg9ZWS0XRwDwMtz+Pe7zKPlKe60/s B2utiwVLPmqQkAX5i0PROrn4OaUxLNuZQE3i0YGYy2ioUq/J/YOAsXHFEYRIsIgci1 mNjbsekyb82ov+JaoKc34vMeVpr8xXx4FewxID9mKBrMNv6UMMu/EF1D7W1vyGHJUP eYQICCh/71WuAZEY3NEP2PXN7/9Zal7bLiNitBmlNhxNNqizcSLgS/b77DWyz65PmK tjnHibCEsvggiFfx0WskUR1NAY0FcIKQ7BDdZeigk5Cq5oFCb/dpLwMKXTTscbINZd nZYfi2NK2/Ctw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADA8DD711C8; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Thu, 18 Dec 2025 23:22:08 +0100 Subject: [PATCH v4 2/6] dt-bindings: wireless: ieee80211: Add disable-rfkill property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-2-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=1478; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=B9SXON9447NJlyUwxvW/LOflPUSy2K70Poc9F3eFNw8=; b=6xy4ZN2Bjipgy1VaHvOCUKuf+yH/Mwv9z9bRIvBwuHX4VgyxuYeIgU+DmyJ8ZLuMxdFi2O8Zg FBtzIHdvDsiCQLpPSCJJ2htZ+OBPAS780TQyhpkZ5MAspDpo8dsPINC X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne For some devices, Wi-Fi is entirely hard blocked by default making the Wi-Fi radio unusable, except if rfkill is disabled as expected on those models. Commit c6a7c0b09d5f ("wifi: ath12k: Add Support for enabling or disabling specific features based on ACPI bitflag") added a way to support features set via ACPI, including the DISABLE_RFKILL bit. Add a disable-rfkill property to expose the DISABLE_RFKILL bit equivalent for devices described by a Devicetree instead of ACPI. Tested-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- Documentation/devicetree/bindings/net/wireless/ieee80211.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml = b/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml index d89f7a3f88a71d45d6f4ab2ae909eae09cbcaf9a..c10a4675640be947cd0b5eaec2c= 7ff367fd93945 100644 --- a/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml +++ b/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml @@ -29,6 +29,12 @@ properties: different 5 GHz subbands. Using them incorrectly could not work or decrease performance noticeably =20 + disable-rfkill: + type: boolean + description: + Disable rfkill for some devices on which Wi-Fi would be entirely hard + blocked by default otherwise + additionalProperties: true =20 examples: --=20 2.47.3 From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5496C2F4A10; Thu, 18 Dec 2025 22:22:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; cv=none; b=D0ge6wuYTmXN9yfufO14khZET14dedJJL0PJHXamJUMjE/qRkuOiT/Sw6kC6jl0l98oP8YtFGpssZPaEAJ56B5oKWjcD2rhA3ijEeVsA6x7NSL3fBPA0UhmRnU7T+ZqA7twhj2159QBSpsrag1pewXXc3pDVIuoTjIv6ltBMvKM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; c=relaxed/simple; bh=rlWIfYfoikdm2g+ig1MLpFeBTAhiwN72iY5iv6kr7aY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OWUEPoAxHHR1qjZPPpaYrJVowMq+lgnbTyEVVcZAe4UTcQRXVqptONhU+2Xa8lVc85ydz/uaAf1YKKF+rr4qO0WrsTAzLwABHT2cAaS9Y884fIBA53ZI8RvJVQTCl8tepYbpbDQOea+AG9Db0Cm5gyJTIJRsGjObJVrfpyzONK4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EYyDU3e1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EYyDU3e1" Received: by smtp.kernel.org (Postfix) with ESMTPS id CB60BC19421; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766096533; bh=rlWIfYfoikdm2g+ig1MLpFeBTAhiwN72iY5iv6kr7aY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=EYyDU3e1s5fMDoSRZhdb16hxOf1br0W5bzTPAxyYjZbNIyKioyKZV5ar+5jDIPTWp XIfCiZFbT2OxbmpnbMza/DZdj/xyA1GbMfJQFoSJyEC+ETLm3px/W+j8vmAZ9CV0Jw AdBK94WsfL7pqpbJwQP+23EEToCE3L6y6WWr/IAtBjdISECyGNWbcu4RiOektrNgQC +cM0nsadnIcLt42RvVA/m70DadaiBCE62kJQtINu0xWj1FKz0DBuW/Ij5bApdQOEl1 RCOWeXNOzZpPDX2iBX/gDKhrrpeRhSgqdf85nHRjbxk8ODFTGbCnqyVqOBTDWRS5OH gZRHuTnl9adbw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD17CD711C7; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Thu, 18 Dec 2025 23:22:09 +0100 Subject: [PATCH v4 3/6] firmware: qcom: scm: allow QSEECOM on Surface Pro 11 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-3-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=997; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=CNbXWtuQ7AggDKzwaLKJE5TiiiPe100NQahuSnOowsU=; b=ukGSOm6Yhnzn4fVlQUSYSDNAlfu0Q+iv4RNSF77UjwOzEthoR+JuEYZ+9OWzsL5JAfT4hmL8E cANL6zf/U/rBAIzcrET958KJkgBiaisDANcffxgLhEsPf25tggBysUY X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham Enables access to EFI variables on this machine. Signed-off-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Dmitry Baryshkov --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 1a6f85e463e06a12814614cea20719c90a371b69..3dabb04094f91811a430e84998d= 3c6c759b5c747 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2007,6 +2007,7 @@ static const struct of_device_id qcom_scm_qseecom_all= owlist[] __maybe_unused =3D { { .compatible =3D "lenovo,yoga-slim7x" }, { .compatible =3D "microsoft,arcata", }, { .compatible =3D "microsoft,blackrock" }, + { .compatible =3D "microsoft,denali", }, { .compatible =3D "microsoft,romulus13", }, { .compatible =3D "microsoft,romulus15", }, { .compatible =3D "qcom,hamoa-iot-evk" }, --=20 2.47.3 From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54A002F6560; Thu, 18 Dec 2025 22:22:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; cv=none; b=tJmKaJy9JfvUBfgoOxDJxDuco2AuCsAp7dzjru73EOwX3pbP9xtj+hAnCzslvIY99n8/lwqbMxvlFwjowryCCXx6otSGDs86dCTeN2e4mH5TzpON3qoUh1xomgHU2ULFUKc1gSkCJHJ9doJhMvKUxo/kbNnfPxcHQa6YmKwB/c8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; c=relaxed/simple; bh=ecT55mQ5jQmLe4fJOJS5l3F4aXRDMocOV0oybZ4c0f4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CYOti/FNQomcUTTW5CfmhSrBOyFPXlK5QZPYglthSo3YCxRpgghIIAc5wYC/acLIM1s+64Zu0c0sTvaY6cE2paRQoAijt3yBTyS2qcjq6WBEgDvqXiWRossviVRhNwGwpArcKVo2I7OOEISXlSGrM/azRIy+Ycn2YM72xiJlNt8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vHkAvMRn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vHkAvMRn" Received: by smtp.kernel.org (Postfix) with ESMTPS id D3FB1C19424; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766096533; bh=ecT55mQ5jQmLe4fJOJS5l3F4aXRDMocOV0oybZ4c0f4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=vHkAvMRnQEcFvHLz+s/EFtzHw7xknpnY6wxYZdL+VRDfmSAIdjK8pCwdBi8KPE4Nj 9G8q8+vv9SE2YZH6uGpwDN3tc/ijj9nhLjnK914KhtSFmtSRAWC0WL+mNmMkDhWFno BKGp0TKZueSrYFCgOrBRhguyVAeSQEKVwd3TLrQkHYLZ1WQRJsSImldZIJ0I4GYGX6 pTxIO2UFW/MVgO9JAvd84ACwCEQY9PYxFNcZ2euetqELNqwALCgDp5Y5mOZl2f3N5C PfHIDZ3gaGaF7fiLsKNCbuf2zaXWO7d5uSMZhFSud6ugFh7VlIKFu4w3XXKkTlIrFE Z00ygPjqeQC2A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC8D5D711CC; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Thu, 18 Dec 2025 23:22:10 +0100 Subject: [PATCH v4 4/6] platform/surface: aggregator_registry: Add Surface Pro 11 (QCOM) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-4-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=1960; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=FteUVMAtphVq5N5dkiQ2DoFR0a2YpxFiVZJ5hRoKyAA=; b=oIkktteIQegddQqC+po2fGnJ5mS9LHU3QtetinS9rUK5SIBxwWC96p69L0TcV2FhqNvRyAF84 9yL2elYAD4oCqFoAG84AyGYVFVuwSFkCbmdFfehmvGLV7guITNju975 X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham This enables support for the Qualcomm-based Surface Pro 11. Signed-off-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Maximilian Luz Reviewed-by: Dmitry Baryshkov --- drivers/platform/surface/surface_aggregator_registry.c | 18 ++++++++++++++= ++++ 1 file changed, 18 insertions(+) diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drive= rs/platform/surface/surface_aggregator_registry.c index 78ac3a8fbb736384f7e50f1888a71297a892a7c3..0599d5adf02e61583cf3e1fc110= 00070f51f7be3 100644 --- a/drivers/platform/surface/surface_aggregator_registry.c +++ b/drivers/platform/surface/surface_aggregator_registry.c @@ -406,6 +406,22 @@ static const struct software_node *ssam_node_group_sp9= _5g[] =3D { NULL, }; =20 +/* Devices for Surface Pro 11 (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp11[] =3D { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_bat_ac, + &ssam_node_bat_main, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_kip_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_hid_sam_sensors, + &ssam_node_kip_tablet_switch, + NULL, +}; + /* -- SSAM platform/meta-hub driver. -------------------------------------= --- */ =20 static const struct acpi_device_id ssam_platform_hub_acpi_match[] =3D { @@ -482,6 +498,8 @@ MODULE_DEVICE_TABLE(acpi, ssam_platform_hub_acpi_match); static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unus= ed =3D { /* Surface Pro 9 5G (ARM/QCOM) */ { .compatible =3D "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, + /* Surface Pro 11 (ARM/QCOM) */ + { .compatible =3D "microsoft,denali", (void *)ssam_node_group_sp11 }, /* Surface Laptop 7 */ { .compatible =3D "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible =3D "microsoft,romulus15", (void *)ssam_node_group_sl7 }, --=20 2.47.3 From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CD9A2FAC0E; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-5-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=34349; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=S2VEufbOam3ODSdzdnx6W2V3AA/rVgV1xZ/dxgjBwj0=; b=wfFTPrIud+v7gTigjKQGpar15ucPETeRk6rfimT9VkQJG0KWPkvB2QoK1M7DtaCesEJnDgc9m ZlNyMOXDBVTC7njQkcRg/H3B66TsSADcoRzcH2z409HoQXYEy19/EKL X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham Add device trees for the Qualcomm X1E and X1P-based Microsoft Surface Pro 11 machines (codenamed 'Denali'). This device is very similar to the Surface Laptop 7 ('Romulus'). Use a similar strategy to x1-asus-zenbook-a14.dtsi so that we can create x1e and x1p-specific flavors of the device tree without too much code duplication. Hardware support is similar to other X1 machines. The most notable missing features are: - Touchscreen and pen - Cameras (and status LEDs) Signed-off-by: Dale Whinham Tested-by: Dale Whinham Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 4 + arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi | 1324 ++++++++++++++++= ++++ .../dts/qcom/x1e80100-microsoft-denali-oled.dts | 20 + .../boot/dts/qcom/x1p64100-microsoft-denali.dts | 16 + 4 files changed, 1364 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6f34d5ed331c4cc5ec01de7a0ecbc45f64c3ee15..3641f9371aae0f856e9f2050b48= 027a998b0c2c2 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -346,6 +346,8 @@ x1e80100-hp-omnibook-x14-el2-dtbs :=3D x1e80100-hp-omni= book-x14.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-hp-omnibook-x14.dtb x1e80100-hp-omni= book-x14-el2.dtb x1e80100-lenovo-yoga-slim7x-el2-dtbs :=3D x1e80100-lenovo-yoga-slim7x.dtb = x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-lenovo-yoga-slim7x.dtb x1e80100-leno= vo-yoga-slim7x-el2.dtb +x1e80100-microsoft-denali-oled-el2-dtbs :=3D x1e80100-microsoft-denali-ole= d.dtb x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-microsoft-denali-oled.dtb x1e80100-m= icrosoft-denali-oled-el2.dtb x1e80100-microsoft-romulus13-el2-dtbs :=3D x1e80100-microsoft-romulus13.dt= b x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-microsoft-romulus13.dtb x1e80100-mic= rosoft-romulus13-el2.dtb x1e80100-microsoft-romulus15-el2-dtbs :=3D x1e80100-microsoft-romulus15.dt= b x1-el2.dtbo @@ -362,3 +364,5 @@ x1p42100-hp-omnibook-x14-el2-dtbs :=3D x1p42100-hp-omni= book-x14.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-hp-omnibook-x14.dtb x1p42100-hp-omni= book-x14-el2.dtb x1p42100-lenovo-thinkbook-16-el2-dtbs :=3D x1p42100-lenovo-thinkbook-16.dt= b x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-lenovo-thinkbook-16.dtb x1p42100-len= ovo-thinkbook-16-el2.dtb +x1p64100-microsoft-denali-el2-dtbs :=3D x1p64100-microsoft-denali.dtb x1-e= l2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1p64100-microsoft-denali.dtb x1p64100-micros= oft-denali-el2.dtb diff --git a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi b/arch/arm64= /boot/dts/qcom/x1-microsoft-denali.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..072b7618e1976261b7d0fdf0d87= 098cc89babcf7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi @@ -0,0 +1,1324 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Dale Whinham + */ + +#include +#include +#include +#include + +#include "hamoa-pmics.dtsi" + +/ { + aliases { + serial0 =3D &uart2; + serial1 =3D &uart14; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_int_n_default>; + pinctrl-names =3D "default"; + + switch-lid { + gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>; + + /* Left-side bottom port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss0_con_sbu_out>; + }; + }; + }; + }; + + /* Left-side top port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + }; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&rtmr1_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + sound { + compatible =3D "qcom,x1e80100-sndcard"; + model =3D "X1E80100-Microsoft-Surface-Pro-11"; + audio-routing =3D "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb"; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_spkr>, <&right_spkr>, + <&swr0 0>, <&lpass_wsamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_wlan_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&gpu { + status =3D "okay"; + + zap-shader { + memory-region =3D <&gpu_microcode_mem>; + firmware-name =3D "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn"; + }; +}; + +&i2c0 { + clock-frequency =3D <100000>; + + status =3D "okay"; + + /* Something @39, @3e, @44 */ +}; + +&i2c3 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Left-side bottom port */ + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + reset-gpios =3D <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; + + clocks =3D <&rpmhcc RPMH_RF_CLK3>; + + vdd-supply =3D <&vreg_rtmr0_1p15>; + vdd33-supply =3D <&vreg_rtmr0_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr0_3p3>; + vddar-supply =3D <&vreg_rtmr0_1p15>; + vddat-supply =3D <&vreg_rtmr0_1p15>; + vddio-supply =3D <&vreg_rtmr0_1p8>; + + pinctrl-0 =3D <&rtmr0_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c4 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Something @12, @14, @16, @18, @1a */ +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Left-side top port */ + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&lpass_tlmm { + spkr_01_sd_n_active: spkr-01-sd-n-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&vreg_l1b_1p8>; + qcom,dmic-sample-rate =3D <4800000>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + compatible =3D "qcom,x1e80100-dp"; + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel: panel { + compatible =3D "edp-panel"; + enable-gpios =3D <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; + power-supply =3D <&vreg_edp_3p3>; + + pinctrl-0 =3D <&edp_bl_en>; + pinctrl-names =3D "default"; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; + + ports { + port@1 { + reg =3D <1>; + + mdss_dp3_out: endpoint { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000= 00000>; + + remote-endpoint =3D <&edp_panel_in>; + }; + }; + }; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie4 { + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie4_port0 { + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + + disable-rfkill; + }; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_nvme>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; + + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&pm8550ve_9_gpios { + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&pmc8380_3_gpios { + edp_bl_en: edp-bl-en-state { + pins =3D "gpio4"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + }; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/microsoft/Denali/qcadsp8380.mbn", + "qcom/x1e80100/microsoft/Denali/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/microsoft/Denali/qccdsp8380.mbn", + "qcom/x1e80100/microsoft/Denali/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&swr0 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Left Speaker */ + left_spkr: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Right Speaker */ + right_spkr: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + gpio-reserved-ranges =3D <44 4>, /* SPI (TPM) */ + <238 1>; /* UFS Reset */ + + hall_int_n_default: hall-int-n-state { + pins =3D "gpio2"; + function =3D "gpio"; + bias-disable; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + ssam_state: ssam-state-state { + pins =3D "gpio91"; + function =3D "gpio"; + bias-disable; + }; + + wcn_wlan_bt_en: wcn-wlan-bt-en-state { + pins =3D "gpio116", "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + cam_indicator_en: cam-indicator-en-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; + +&uart2 { + status =3D "okay"; + + embedded-controller { + compatible =3D "microsoft,surface-sam"; + + interrupts-extended =3D <&tlmm 91 IRQ_TYPE_EDGE_RISING>; + + current-speed =3D <4000000>; + + pinctrl-0 =3D <&ssam_state>; + pinctrl-names =3D "default"; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_0_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&retimer_ss0_ss_in>; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_1_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts b/= arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts new file mode 100644 index 0000000000000000000000000000000000000000..9347d246af10cc6aadbca1a0d9e= a37828cd1b9b3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Dale Whinham + */ + +/dts-v1/; + +#include "hamoa.dtsi" +#include "x1-microsoft-denali.dtsi" + +/ { + model =3D "Microsoft Surface Pro 11th Edition (OLED)"; + compatible =3D "microsoft,denali-oled", "microsoft,denali", + "qcom,x1e80100"; +}; + +&panel { + compatible =3D "samsung,atna30dw01", "samsung,atna33xc20"; +}; diff --git a/arch/arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts b/arch/= arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts new file mode 100644 index 0000000000000000000000000000000000000000..93f1620ad8c71c6cf36ba3ec34b= 9eebc47bf3f18 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2025 Dale Whinham + */ + +/dts-v1/; + +#include "hamoa.dtsi" +#include "x1-microsoft-denali.dtsi" + +/ { + model =3D "Microsoft Surface Pro 11th Edition (LCD)"; + compatible =3D "microsoft,denali-lcd", "microsoft,denali", + "qcom,x1p64100", "qcom,x1e80100"; +}; --=20 2.47.3 From nobody Sun Feb 8 03:58:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CD152F9D85; Thu, 18 Dec 2025 22:22:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; cv=none; b=ckUCK+1ebjaO2FAje2yNDmQNolSkjsDlWANaSSjJ9RQbCWibmfcicwndvJZoNzylzvhLwpG2l9e/tEnMHnjxb/l+fQAAo8KESxhVVlbTatvqzJG/qXsBO/nSVLf77vqICdrbb68jT/mbdINTpoVEW71vTk7RSd5p5QP2MTNVdlg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766096534; c=relaxed/simple; bh=C/ueUWFjCyD/VD4TdJXJVaQRqT2VnOEHgebnD6XjxSI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qZwnkoQlfBB79JYA85pwk6QN9lMnGaT1OVsIqQLaBnHtHcXt303m66/5Qc2Mpypf+mJ0X4raCVBB7LiATMcRrC1gwGQ/57QZwIr/FNmsi6BQgmBEHJ+1FtieOnKjpkFHmInQ/okYutOTEAVhV71Qatm59USfMnoR8qKEuGqzZjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KTRj7JIp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KTRj7JIp" Received: by smtp.kernel.org (Postfix) with ESMTPS id 01625C2BCB1; Thu, 18 Dec 2025 22:22:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766096534; bh=C/ueUWFjCyD/VD4TdJXJVaQRqT2VnOEHgebnD6XjxSI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KTRj7JIpKmE1PPDUUHXPOPSMVHucq1I9S79x1nSEY6RP8VzTez7yHmgQ1/5HzUuqQ FMnkSmosCbPi2Cq14zuZBETeXjzKV1PjSqpLxIBFtwPpb2AvTE5Vzgz1tUwdQHkMwf uRohtnw6MB9lVixxc/JEFtrcIw6nNsowoR/6a/31BOGcoqrG2LVLoJKRKLa3fo4cfX ZPL9DMD0bXmISjryX46ktSVHjxEcL+VibuaG1UxfTKl8dNdHb9eJBXp20mw8ij1Lan B+zunLaS6Xj9vdlNC+GGXH8bGQkZGMrpi1n9Yl3AEi7/Gt/hblWuNINexgxuxZ/YoV GuvYFYM40r/+A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDCAAD711C8; Thu, 18 Dec 2025 22:22:13 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Thu, 18 Dec 2025 23:22:12 +0100 Subject: [PATCH v4 6/6] wifi: ath12k: Add support for disabling rfkill via devicetree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-surface-sp11-for-next-v4-6-7bcf83c1504a@gmail.com> References: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> In-Reply-To: <20251218-surface-sp11-for-next-v4-0-7bcf83c1504a@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johannes Berg , Lorenzo Bianconi , Maximilian Luz , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Jeff Johnson Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-wireless@vger.kernel.org, platform-driver-x86@vger.kernel.org, ath12k@lists.infradead.org, Dale Whinham , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766096532; l=1265; i=jerome.debretagne@gmail.com; s=20251217; h=from:subject:message-id; bh=mcMjGRXAT6QkIO3PWrqFYRB9BASEzAi+bYp6SS6IoLc=; b=RvVTMjLt69VKME0qck0aSGBZHhTiJB7g5TGhGTiFfRV1Zn3JKB+k59xK71oilLW17JqRP2nS9 GCFTHv10WNTBsGRyxaoG6hYwUDYgJbLXd3qhZL5/WIDKtTeFprXBY0t X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=DcPD9n3oDMsPkt+12tU96swmGb5H86cxt+yiEVcUEGk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20251217 with auth_id=580 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: Dale Whinham Some devices (e.g. Microsoft Surface Pro 11) indicate that the rfkill feature should be disabled by means of an ACPI bitflag. If ACPI is not being used (i.e. booting using a devicetree) then this property will not be read and therefore rfkill may be enabled and the ath12k will be hard-blocked with no way to disable it. Add a devicetree property that allows us to disable the rfkill feature. Signed-off-by: Dale Whinham Tested-by: J=C3=A9r=C3=B4me de Bretagne Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- drivers/net/wireless/ath/ath12k/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/wireless/ath/ath12k/core.c b/drivers/net/wireless/= ath/ath12k/core.c index cc352eef1939937ce902bee2fbd9737ca3ab5993..e10073bb975cfd2e9ee418edcc4= 9d0d51cf93de1 100644 --- a/drivers/net/wireless/ath/ath12k/core.c +++ b/drivers/net/wireless/ath/ath12k/core.c @@ -77,6 +77,9 @@ static int ath12k_core_rfkill_config(struct ath12k_base *= ab) if (ath12k_acpi_get_disable_rfkill(ab)) return 0; =20 + if (of_property_read_bool(ab->dev->of_node, "disable-rfkill")) + return 0; + for (i =3D 0; i < ab->num_radios; i++) { ar =3D ab->pdevs[i].ar; =20 --=20 2.47.3