From nobody Tue Dec 23 08:47:33 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33D89334372; Thu, 18 Dec 2025 12:56:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766062616; cv=pass; b=SHm/6z+8BZSsXJUdxnNCVR25QyLMm1DDcctRUuzd3kHN1xo0Lg7TELD+b/PNLwAueXmAuyqfd2Moc4dzeYPpcrjRabyOQmF8bGIQohYqeeKg2HIjv3o9ECJ8A98ZLbR7WRu5LgxSJe9AHhq3dbY97C1zmyeDij8tLjNY5D8XhDs= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766062616; c=relaxed/simple; bh=2wdbwHZOhPmv+rAtky84LPqZQGtR4cBTy/PDN/oa9ek=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MRMhSG2FnccG9fO3X9h3e/qOp5ZX8fVhI4LNEu0JNspL55rXkv+J0u4edPs7eaHyC0v1MJghSyfz1gW38lWxGPGrlmqazzYnZhBfY+Rno370+YQBzwJo2IgJ7eO6FmHygfdOC0YAe5iIXhNo/tb5r3R/2FAUVVPbPO18cAHhfS4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=BgIq1IV+; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="BgIq1IV+" ARC-Seal: i=1; a=rsa-sha256; t=1766062590; cv=none; d=zohomail.com; s=zohoarc; b=VkZspcdBB8CC+tZvlfS6DHLQLLgwNzLgceFUA/BbASESctKc0+lXH87sKe24wTQjbtV0VN926EqYzApEc9deMCo+CIRwdViRDoyzaFxhimTzBAjIrLgC2lFLFVGMw83v/nxpDx9RFQkfXC0xRy+U3CIMN2dO63OuwFdKt9zTSFo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1766062590; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=DCodZ65ripcarw6609Dpnt3dZb7SVi5h2TJ87Z7JA4M=; b=S3/9UY932Lq6NaOhYNVsfZp9UBP2RFQhLSPNaYz+Eg+oTCACwHwLLCbJ5cYflChS/0gIQr6XlgdWXY/vitPxZkwEYS9bfWyXEuWdwSHBz4kK0H7QB4Q3kRdwUgnNPpbXHQt9WyfX30oPNn2Eup5Ul+JTkQAriM8iWhtZaF/d0vg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1766062590; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=DCodZ65ripcarw6609Dpnt3dZb7SVi5h2TJ87Z7JA4M=; b=BgIq1IV+0jku6sdH/hbA6ptzf6ygSImZhdhGoGb2j/mcDXtz8HWuCT4Pq9t+Aqeb 8ZYbaM4seb2YAnuXzE669LvsRuGPzBZfn06t8/fDKmoN/a6uoWpiUiHieReK2X8XUw4 lLCiHn/1vZX9sZlmSsiXiyV3O2kTfuYCOcbvzlE4= Received: by mx.zohomail.com with SMTPS id 1766062588541902.244686873399; Thu, 18 Dec 2025 04:56:28 -0800 (PST) From: Nicolas Frattaroli Date: Thu, 18 Dec 2025 13:54:59 +0100 Subject: [PATCH v4 09/25] scsi: ufs: mediatek: Rework the crypt-boost stuff Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-mt8196-ufs-v4-9-ddec7a369dd2@collabora.com> References: <20251218-mt8196-ufs-v4-0-ddec7a369dd2@collabora.com> In-Reply-To: <20251218-mt8196-ufs-v4-0-ddec7a369dd2@collabora.com> To: Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Peter Wang , Stanley Jhu , "James E.J. Bottomley" , "Martin K. Petersen" , Philipp Zabel , Liam Girdwood , Mark Brown , Chaotian Jing , Neil Armstrong Cc: Louis-Alexis Eyraud , kernel@collabora.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 I don't know whether the crypt-boost functionality as it is currently implemented is even appropriate for mainline. It might be better done in some generic way. But what I do know is that I can rework the code to make it less obtuse. Prefix the boost stuff with the appropriate vendor prefix, remove the pointless clock wrappers, and rework the function. Signed-off-by: Nicolas Frattaroli --- drivers/ufs/host/ufs-mediatek.c | 91 +++++++++++++++----------------------= ---- 1 file changed, 32 insertions(+), 59 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediate= k.c index 131f71145a12..9c0ac72d6e43 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -562,21 +562,6 @@ static int ufs_mtk_mphy_power_on(struct ufs_hba *hba, = bool on) return 0; } =20 -static int ufs_mtk_get_host_clk(struct device *dev, const char *name, - struct clk **clk_out) -{ - struct clk *clk; - int err =3D 0; - - clk =3D devm_clk_get(dev, name); - if (IS_ERR(clk)) - err =3D PTR_ERR(clk); - else - *clk_out =3D clk; - - return err; -} - static void ufs_mtk_boost_crypt(struct ufs_hba *hba, bool boost) { struct ufs_mtk_host *host =3D ufshcd_get_variant(hba); @@ -633,65 +618,53 @@ static void ufs_mtk_boost_crypt(struct ufs_hba *hba, = bool boost) clk_disable_unprepare(cfg->clk_crypt_mux); } =20 -static int ufs_mtk_init_host_clk(struct ufs_hba *hba, const char *name, - struct clk **clk) -{ - int ret; - - ret =3D ufs_mtk_get_host_clk(hba->dev, name, clk); - if (ret) { - dev_info(hba->dev, "%s: failed to get %s: %d", __func__, - name, ret); - } - - return ret; -} - -static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba) +static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba) { struct ufs_mtk_host *host =3D ufshcd_get_variant(hba); struct ufs_mtk_crypt_cfg *cfg; struct device *dev =3D hba->dev; - struct regulator *reg; - u32 volt; + int ret; =20 - host->crypt =3D devm_kzalloc(dev, sizeof(*(host->crypt)), - GFP_KERNEL); - if (!host->crypt) - goto disable_caps; + cfg =3D devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL); + if (!cfg) + return -ENOMEM; =20 - reg =3D devm_regulator_get_optional(dev, "dvfsrc-vcore"); - if (IS_ERR(reg)) { - dev_info(dev, "failed to get dvfsrc-vcore: %ld", - PTR_ERR(reg)); - goto disable_caps; + cfg->reg_vcore =3D devm_regulator_get_optional(dev, "dvfsrc-vcore"); + if (IS_ERR(cfg->reg_vcore)) { + dev_err(dev, "Failed to get dvfsrc-vcore: %pe", cfg->reg_vcore); + return PTR_ERR(cfg->reg_vcore); } =20 - if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min", - &volt)) { - dev_info(dev, "failed to get boost-crypt-vcore-min"); - goto disable_caps; + ret =3D of_property_read_u32(dev->of_node, "mediatek,boost-crypt-vcore-mi= n", + &cfg->vcore_volt); + if (ret) { + dev_err(dev, "Failed to get mediatek,boost-crypt-vcore-min: %pe\n", + ERR_PTR(ret)); + return ret; } =20 - cfg =3D host->crypt; - if (ufs_mtk_init_host_clk(hba, "crypt_mux", - &cfg->clk_crypt_mux)) - goto disable_caps; + cfg->clk_crypt_mux =3D devm_clk_get(dev, "crypt_mux"); + if (IS_ERR(cfg->clk_crypt_mux)) { + dev_err(dev, "Failed to get clock crypt_mux: %pe\n", cfg->clk_crypt_mux); + return PTR_ERR(cfg->clk_crypt_mux); + } =20 - if (ufs_mtk_init_host_clk(hba, "crypt_lp", - &cfg->clk_crypt_lp)) - goto disable_caps; + cfg->clk_crypt_lp =3D devm_clk_get(dev, "crypt_lp"); + if (IS_ERR(cfg->clk_crypt_lp)) { + dev_err(dev, "Failed to get clock crypt_lp: %pe\n", cfg->clk_crypt_lp); + return PTR_ERR(cfg->clk_crypt_lp); + } =20 - if (ufs_mtk_init_host_clk(hba, "crypt_perf", - &cfg->clk_crypt_perf)) - goto disable_caps; + cfg->clk_crypt_perf =3D devm_clk_get(dev, "crypt_perf"); + if (IS_ERR(cfg->clk_crypt_perf)) { + dev_err(dev, "Failed to get clock crypt_perf: %pe\n", cfg->clk_crypt_per= f); + return PTR_ERR(cfg->clk_crypt_perf); + } =20 - cfg->reg_vcore =3D reg; - cfg->vcore_volt =3D volt; + host->crypt =3D cfg; host->caps |=3D UFS_MTK_CAP_BOOST_CRYPT_ENGINE; =20 -disable_caps: - return; + return 0; } =20 static void ufs_mtk_init_host_caps(struct ufs_hba *hba) --=20 2.52.0