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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2b04e58d423sm2564824eec.6.2025.12.18.00.10.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Dec 2025 00:10:43 -0800 (PST) From: Yuanfang Zhang Date: Thu, 18 Dec 2025 00:09:44 -0800 Subject: [PATCH v2 04/12] coresight-replicator: Support CPU cluster replicator initialization Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251218-cpu_cluster_component_pm-v2-4-2335a6ae62a0@oss.qualcomm.com> References: <20251218-cpu_cluster_component_pm-v2-0-2335a6ae62a0@oss.qualcomm.com> In-Reply-To: <20251218-cpu_cluster_component_pm-v2-0-2335a6ae62a0@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Leo Yan , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio Cc: kernel@oss.qualcomm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Yuanfang Zhang , maulik.shah@oss.qualcomm.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766045439; l=9933; i=yuanfang.zhang@oss.qualcomm.com; s=20250814; h=from:subject:message-id; bh=zad/+HKvgqcPRsu64plFTKJAgpaj4lRh7Ypv4wC8mi4=; b=OxEMcFDqCRURYR2alE9C+qytbvWhgSWbsRUFrDfHwwuMaF1z3EtogAhvMR2S9BtRQMmz0t2Hd JGRF9VSAJPVAGqkrNLKWa2i3wDL6eSSDWffrwWGD1JSmqtVJS3Igms8 X-Developer-Key: i=yuanfang.zhang@oss.qualcomm.com; a=ed25519; pk=9oS/FoPW5k0CsqSDDrPlnV+kVIOUaAe0O5pr4M1wHgY= X-Proofpoint-ORIG-GUID: wIjJuoCPi3-dG3EQoIZKm0vU7-_m6dSP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE4MDA2NiBTYWx0ZWRfX0u4RS9DNvB7b s9TGmPetvhbl0Bm6nQ5R2Gcvs9dVkLpC30QEC+aDJYB0jwd+ghltgowLwDgOj0gYluXDV9Yof5Y m7kMgHWe85Vhc56qh/WN99A6F3ah3F4lbctOPS5pu8EKSsY1kWvsKfDn860Yc6GfdoD5bBe6kDV 4FxAH1ytP28UTEIWdcba+CPvh9xyLoxGbDErL1IQ0xnPI7agg4fMAIYP4eFUcxxtgksirxQnDm7 wBRvAMP3fuFzrXLXyukwxR/qssouel6zqBFbvtZxDzhC+cI7gRkYqqouKtcHglzjXzR2OsrnfCB mvVF4m5WyfDXl020HijEk7VncadA7n8foSNZSnH1McMKPO//mWK+gvDiAuLkVW2yPYG6ITTvotS 5gKKyrfoqbLO3ssh4lHu6YyAmT7irg== X-Authority-Analysis: v=2.4 cv=NPHYOk6g c=1 sm=1 tr=0 ts=6943b706 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=iEGaxejzB682sgr3lzYA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-GUID: wIjJuoCPi3-dG3EQoIZKm0vU7-_m6dSP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-18_01,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180066 Replicators associated with CPU clusters reside in the cluster's power domain. Unlike system-wide replicators, their registers are only accessible when the cluster is powered on. Standard runtime PM may not suffice to wake up a cluster from low-power states, making direct register access unreliable during initialization or operation. Enhance the replicator driver to support these per-cluster devices: 1. Safe Initialization: - Identify per-cluster replicators via device properties. - Use smp_call_function_single() to perform hardware initialization (reset and claim tag clearing) on a CPU within the cluster. - Refactor the probe flow to encapsulate device registration in replicator_add_coresight_dev(). 2. Cross-CPU Enablement: - Update replicator_enable() to use smp_call_function_single() when enabling the hardware on a cluster-bound replicator. 3. Claim/Disclaim Handling: - Introduce replicator_claim/disclaim_device_unlocked() to manage device access safely before full framework registration. This ensures that replicator operations remain robust even when the associated CPU cluster is in low-power states, while maintaining compatibility with existing system-level replicators. Signed-off-by: Yuanfang Zhang --- drivers/hwtracing/coresight/coresight-replicator.c | 200 +++++++++++++++++= ---- 1 file changed, 167 insertions(+), 33 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index e6472658235dc479cec91ac18f3737f76f8c74f0..c11da452559c73af6709b39d03b= 646cb4779736f 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,7 @@ DEFINE_CORESIGHT_DEVLIST(replicator_devs, "replicator"); * @csdev: component vitals needed by the framework * @spinlock: serialize enable/disable operations. * @check_idfilter_val: check if the context is lost upon clock removal. + * @supported_cpus: Represent the CPUs related to this funnel. */ struct replicator_drvdata { void __iomem *base; @@ -43,18 +45,61 @@ struct replicator_drvdata { struct coresight_device *csdev; raw_spinlock_t spinlock; bool check_idfilter_val; + struct cpumask *supported_cpus; }; =20 -static void dynamic_replicator_reset(struct replicator_drvdata *drvdata) +struct replicator_smp_arg { + struct replicator_drvdata *drvdata; + int outport; + int rc; +}; + +static void replicator_clear_self_claim_tag(struct replicator_drvdata *drv= data) +{ + struct csdev_access access =3D CSDEV_ACCESS_IOMEM(drvdata->base); + + coresight_clear_self_claim_tag(&access); +} + +static int replicator_claim_device_unlocked(struct replicator_drvdata *drv= data) +{ + struct coresight_device *csdev =3D drvdata->csdev; + struct csdev_access access =3D CSDEV_ACCESS_IOMEM(drvdata->base); + u32 claim_tag; + + if (csdev) + return coresight_claim_device_unlocked(csdev); + + writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, drvdata->base + CORESIGHT_CLA= IMSET); + + claim_tag =3D readl_relaxed(drvdata->base + CORESIGHT_CLAIMCLR); + if (claim_tag !=3D CORESIGHT_CLAIM_SELF_HOSTED) { + coresight_clear_self_claim_tag_unlocked(&access); + return -EBUSY; + } + + return 0; +} + +static void replicator_disclaim_device_unlocked(struct replicator_drvdata = *drvdata) { struct coresight_device *csdev =3D drvdata->csdev; + struct csdev_access access =3D CSDEV_ACCESS_IOMEM(drvdata->base); + + if (csdev) + return coresight_disclaim_device_unlocked(csdev); =20 + coresight_clear_self_claim_tag_unlocked(&access); +} + +static void dynamic_replicator_reset(struct replicator_drvdata *drvdata) +{ CS_UNLOCK(drvdata->base); =20 - if (!coresight_claim_device_unlocked(csdev)) { + if (!replicator_claim_device_unlocked(drvdata)) { writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0); writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1); - coresight_disclaim_device_unlocked(csdev); + replicator_disclaim_device_unlocked(drvdata); } =20 CS_LOCK(drvdata->base); @@ -116,6 +161,34 @@ static int dynamic_replicator_enable(struct replicator= _drvdata *drvdata, return rc; } =20 +static void replicator_enable_hw_smp_call(void *info) +{ + struct replicator_smp_arg *arg =3D info; + + arg->rc =3D dynamic_replicator_enable(arg->drvdata, 0, arg->outport); +} + +static int replicator_enable_hw(struct replicator_drvdata *drvdata, + int inport, int outport) +{ + int cpu, ret; + struct replicator_smp_arg arg =3D { 0 }; + + if (!drvdata->supported_cpus) + return dynamic_replicator_enable(drvdata, 0, outport); + + arg.drvdata =3D drvdata; + arg.outport =3D outport; + + for_each_cpu(cpu, drvdata->supported_cpus) { + ret =3D smp_call_function_single(cpu, replicator_enable_hw_smp_call, &ar= g, 1); + if (!ret) + return arg.rc; + } + + return ret; +} + static int replicator_enable(struct coresight_device *csdev, struct coresight_connection *in, struct coresight_connection *out) @@ -126,19 +199,24 @@ static int replicator_enable(struct coresight_device = *csdev, bool first_enable =3D false; =20 raw_spin_lock_irqsave(&drvdata->spinlock, flags); - if (out->src_refcnt =3D=3D 0) { - if (drvdata->base) - rc =3D dynamic_replicator_enable(drvdata, in->dest_port, - out->src_port); - if (!rc) - first_enable =3D true; - } - if (!rc) + + if (out->src_refcnt =3D=3D 0) + first_enable =3D true; + else out->src_refcnt++; raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 - if (first_enable) - dev_dbg(&csdev->dev, "REPLICATOR enabled\n"); + if (first_enable) { + if (drvdata->base) + rc =3D replicator_enable_hw(drvdata, in->dest_port, + out->src_port); + if (!rc) { + out->src_refcnt++; + dev_dbg(&csdev->dev, "REPLICATOR enabled\n"); + return rc; + } + } + return rc; } =20 @@ -217,23 +295,69 @@ static const struct attribute_group *replicator_group= s[] =3D { NULL, }; =20 +static int replicator_add_coresight_dev(struct device *dev) +{ + struct coresight_desc desc =3D { 0 }; + struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); + + if (drvdata->base) { + desc.groups =3D replicator_groups; + desc.access =3D CSDEV_ACCESS_IOMEM(drvdata->base); + } + + desc.name =3D coresight_alloc_device_name(&replicator_devs, dev); + if (!desc.name) + return -ENOMEM; + + desc.type =3D CORESIGHT_DEV_TYPE_LINK; + desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; + desc.ops =3D &replicator_cs_ops; + desc.pdata =3D dev->platform_data; + desc.dev =3D dev; + + drvdata->csdev =3D coresight_register(&desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + return 0; +} + +static void replicator_init_hw(struct replicator_drvdata *drvdata) +{ + replicator_clear_self_claim_tag(drvdata); + replicator_reset(drvdata); +} + +static void replicator_init_on_cpu(void *info) +{ + struct replicator_drvdata *drvdata =3D info; + + replicator_init_hw(drvdata); +} + +static struct cpumask *replicator_get_supported_cpus(struct device *dev) +{ + struct generic_pm_domain *pd; + + pd =3D pd_to_genpd(dev->pm_domain); + if (pd) + return pd->cpus; + + return NULL; +} + static int replicator_probe(struct device *dev, struct resource *res) { struct coresight_platform_data *pdata =3D NULL; struct replicator_drvdata *drvdata; - struct coresight_desc desc =3D { 0 }; void __iomem *base; - int ret; + int cpu, ret; =20 if (is_of_node(dev_fwnode(dev)) && of_device_is_compatible(dev->of_node, "arm,coresight-replicator")) dev_warn_once(dev, "Uses OBSOLETE CoreSight replicator binding\n"); =20 - desc.name =3D coresight_alloc_device_name(&replicator_devs, dev); - if (!desc.name) - return -ENOMEM; - drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; @@ -251,9 +375,6 @@ static int replicator_probe(struct device *dev, struct = resource *res) if (IS_ERR(base)) return PTR_ERR(base); drvdata->base =3D base; - desc.groups =3D replicator_groups; - desc.access =3D CSDEV_ACCESS_IOMEM(base); - coresight_clear_self_claim_tag(&desc.access); } =20 if (fwnode_property_present(dev_fwnode(dev), @@ -268,25 +389,38 @@ static int replicator_probe(struct device *dev, struc= t resource *res) dev->platform_data =3D pdata; =20 raw_spin_lock_init(&drvdata->spinlock); - desc.type =3D CORESIGHT_DEV_TYPE_LINK; - desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; - desc.ops =3D &replicator_cs_ops; - desc.pdata =3D dev->platform_data; - desc.dev =3D dev; =20 - drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); + if (fwnode_property_present(dev_fwnode(dev), "qcom,cpu-bound-components")= ) { + drvdata->supported_cpus =3D replicator_get_supported_cpus(dev); + if (!drvdata->supported_cpus) + return -EINVAL; + + cpus_read_lock(); + for_each_cpu(cpu, drvdata->supported_cpus) { + ret =3D smp_call_function_single(cpu, + replicator_init_on_cpu, drvdata, 1); + if (!ret) + break; + } + cpus_read_unlock(); =20 - replicator_reset(drvdata); - return 0; + if (ret) + return 0; + } else if (res) { + replicator_init_hw(drvdata); + } + + ret =3D replicator_add_coresight_dev(dev); + + return ret; } =20 static int replicator_remove(struct device *dev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - coresight_unregister(drvdata->csdev); + if (drvdata->csdev) + coresight_unregister(drvdata->csdev); return 0; } =20 --=20 2.34.1