From nobody Fri Dec 19 21:51:44 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 104AC36BCDB; Wed, 17 Dec 2025 10:19:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765966782; cv=none; b=ADm6T2hKaxvR5h0L2NBKNmQ7SbVqUvBB9MK4/AezEP/PgExaOk520gNQEGBwR0cN85GULJiG7uyITE9tbB5BPmqu2vyD6mbZrEDNZO6ELFNGxiMjkV2yiJnQekW0JIC8AqmTnBcz+k5HICOXZS7ovJ43Ina4pwmVOwyBMaT1vEY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765966782; c=relaxed/simple; bh=jC5+KdoqdVFQgOtEPuJi4tXUBsXqvexvaZVlr3SvnWo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mmSyPo3YKYZxsb6anV1eLMbi1yUsLCvvxWES8pvC7CZf7N1b1Yf2nW/wJggbnklJPY0IJhrDdixp9ysgQZOT3d6jJK6H2X4M1Zfdh9eP6Wl9rZk8OY+34nx8PRIzYtNN/v13YAXaM5KSYWuE1ioWVTMMrc9NuQ4V2vMV8JShZg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Ex1cl9zt; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Ex1cl9zt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1765966777; bh=jC5+KdoqdVFQgOtEPuJi4tXUBsXqvexvaZVlr3SvnWo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Ex1cl9zt4oNB1mZRj71tqKXBm5P6l4YZBNlQFq++F5h+dSdYv64BisGlDZdUgfrg4 lmqEKxzzT3jtuS+eCr3GMJ8aqzmIp2N/l6HkmfmFUVtRC7D56j7hCyxUZM3nQrKXu/ KUopx29a8BN9IP5awepcrcINOar/XLveipnVP1YdToMjuA78a3Uida0nDe4tgH3jrl a78ANREO9FuU7c7X/X76SZz2ct5UntR4PGr5yjzbNeOFTl/HEipzrnWuymbEHmCrbX dimDKyfYRVQRmg9CCVNL261tfNB4X6XMxlHnRUmlxyBKZweL/4uQ8POqzxMoxBgRZm Yb3SsifrLu71g== Received: from yukiji.home (amontpellier-657-1-116-247.w83-113.abo.wanadoo.fr [83.113.51.247]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id D081617E0C87; Wed, 17 Dec 2025 11:19:36 +0100 (CET) From: Louis-Alexis Eyraud Date: Wed, 17 Dec 2025 11:19:00 +0100 Subject: [PATCH v2 01/12] dt-bindings: phy: mediatek,hdmi-phy: Fix clock output names for MT8195 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251217-mtk-genio-evk-hdmi-support-v2-1-a994976bb39a@collabora.com> References: <20251217-mtk-genio-evk-hdmi-support-v2-0-a994976bb39a@collabora.com> In-Reply-To: <20251217-mtk-genio-evk-hdmi-support-v2-0-a994976bb39a@collabora.com> To: Chunfeng Yun , Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu , Philipp Zabel , Guillaume Ranquet Cc: kernel@collabora.com, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1765966775; l=1504; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=5dxyFZEQPilPUnhA9Vm4qAcH//F/AqE/9KWYhCVl0Bk=; b=wS0uVYdevYYtQ8TODoFfPoPGRP5o7SOOEkQHWpg1mS2iAd6rda4UuotYnJ4+CwPRRIcfZVGJX ZFM2kG2w3tJCKjYEgxxibCz1gfseUEqSqQE/fT5/r5uo1sqeryX/plD X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= From: AngeloGioacchino Del Regno For all of the HDMI PHYs compatible with the one found on MT8195 the output clock has a different datasheet name and specifically it is called "hdmi_txpll", differently from the older HDMI PHYs which output block is called "hdmitx_dig_cts". Replace clock output name string check by max item number one to allow the new name on all of the HDMI PHY IPs that are perfectly compatible with MT8195. [Louis-Alexis Eyraud: split patch, addressed previous feedback from mailing list, and reworded description] Fixes: c78fe548b062 ("dt-bindings: phy: mediatek: hdmi-phy: Add mt8195 comp= atible") Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Louis-Alexis Eyraud --- Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b= /Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml index f3a8b0b745d13ffc55d391570bff20830d925ed3..10f1d9326f18dba85b92b4c88f4= c0f6cdddc4c25 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml @@ -42,8 +42,7 @@ properties: - const: pll_ref =20 clock-output-names: - items: - - const: hdmitx_dig_cts + maxItems: 1 =20 "#phy-cells": const: 0 --=20 2.52.0