From nobody Fri Dec 19 07:24:09 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E56FF34BA5B for ; Tue, 16 Dec 2025 14:46:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765896381; cv=none; b=hq8aRHk3kpzZyK4uuQbGDNhl3bCMDQbxlzNNtt3kHc0hh2+Qm2iKCXffi+etDq+GnJVyQBiPZRq7axmyJkQymMKsr04LthKgrMcelKOinbmw2bJW9mphYvk92JL65WEBMSEPihNfEk1PUSXZFm5hOxAslyAUbTHrQUt06bWCiQw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765896381; c=relaxed/simple; bh=jmVPGmZ+90L9/D0w3QtNrGVf6f6Iwf0zgkxhMHOXNAY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mK2dWI9cytr+rWmTIPckX1iWDSjmcajoAWa9B6lnw4kZx5HHKpfclqXvHiKZzde+wcMCP2TizG2653OC0OV54ucee4tENlJYi8qvUQNf6/j+U5ZkmQwlmPmuzKE/IE1wocBsgXETDiFZGBCe2zPXh1PU6x0xDaVf6bUbgVtErVY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 811D61684; Tue, 16 Dec 2025 06:46:12 -0800 (PST) Received: from e125769.cambridge.arm.com (e125769.cambridge.arm.com [10.1.196.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 30D133F73F; Tue, 16 Dec 2025 06:46:18 -0800 (PST) From: Ryan Roberts To: Will Deacon , Ard Biesheuvel , Catalin Marinas , Mark Rutland , Linus Torvalds , Oliver Upton , Marc Zyngier , Dev Jain , Linu Cherian Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 05/13] arm64: mm: Inline __TLBI_VADDR_RANGE() into __tlbi_range() Date: Tue, 16 Dec 2025 14:45:50 +0000 Message-ID: <20251216144601.2106412-6-ryan.roberts@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251216144601.2106412-1-ryan.roberts@arm.com> References: <20251216144601.2106412-1-ryan.roberts@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Will Deacon The __TLBI_VADDR_RANGE() macro is only used in one place and isn't something that's generally useful outside of the low-level range invalidation gubbins. Inline __TLBI_VADDR_RANGE() into the __tlbi_range() function so that the macro can be removed entirely. Signed-off-by: Will Deacon Signed-off-by: Ryan Roberts --- arch/arm64/include/asm/tlbflush.h | 32 +++++++++++++------------------ 1 file changed, 13 insertions(+), 19 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlb= flush.h index 39717f98c31e..887dd1f05a89 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -195,19 +195,6 @@ static inline void __tlbi_level(tlbi_op op, u64 addr, = u32 level) #define TLBIR_TTL_MASK GENMASK_ULL(38, 37) #define TLBIR_BADDR_MASK GENMASK_ULL(36, 0) =20 -#define __TLBI_VADDR_RANGE(baddr, asid, scale, num, ttl) \ - ({ \ - unsigned long __ta =3D 0; \ - unsigned long __ttl =3D (ttl >=3D 1 && ttl <=3D 3) ? ttl : 0; \ - __ta |=3D FIELD_PREP(TLBIR_BADDR_MASK, baddr); \ - __ta |=3D FIELD_PREP(TLBIR_TTL_MASK, __ttl); \ - __ta |=3D FIELD_PREP(TLBIR_NUM_MASK, num); \ - __ta |=3D FIELD_PREP(TLBIR_SCALE_MASK, scale); \ - __ta |=3D FIELD_PREP(TLBIR_TG_MASK, get_trans_granule()); \ - __ta |=3D FIELD_PREP(TLBIR_ASID_MASK, asid); \ - __ta; \ - }) - /* These macros are used by the TLBI RANGE feature. */ #define __TLBI_RANGE_PAGES(num, scale) \ ((unsigned long)((num) + 1) << (5 * (scale) + 1)) @@ -488,8 +475,19 @@ static __always_inline void ripas2e1is(u64 arg) __tlbi(ripas2e1is, arg); } =20 -static __always_inline void __tlbi_range(tlbi_op op, u64 arg) +static __always_inline void __tlbi_range(tlbi_op op, u64 addr, + u16 asid, int scale, int num, + u32 level, bool lpa2) { + u64 arg =3D 0; + + arg |=3D FIELD_PREP(TLBIR_BADDR_MASK, addr >> (lpa2 ? 16 : PAGE_SHIFT)); + arg |=3D FIELD_PREP(TLBIR_TTL_MASK, level > 3 ? 0 : level); + arg |=3D FIELD_PREP(TLBIR_NUM_MASK, num); + arg |=3D FIELD_PREP(TLBIR_SCALE_MASK, scale); + arg |=3D FIELD_PREP(TLBIR_TG_MASK, get_trans_granule()); + arg |=3D FIELD_PREP(TLBIR_ASID_MASK, asid); + op(arg); } =20 @@ -500,8 +498,6 @@ do { \ typeof(pages) __flush_pages =3D pages; \ int num =3D 0; \ int scale =3D 3; \ - int shift =3D lpa2 ? 16 : PAGE_SHIFT; \ - unsigned long addr; \ \ while (__flush_pages > 0) { \ if (!system_supports_tlb_range() || \ @@ -515,9 +511,7 @@ do { \ \ num =3D __TLBI_RANGE_NUM(__flush_pages, scale); \ if (num >=3D 0) { \ - addr =3D __TLBI_VADDR_RANGE(__flush_start >> shift, asid, \ - scale, num, tlb_level); \ - __tlbi_range(r##op, addr); \ + __tlbi_range(r##op, __flush_start, asid, scale, num, tlb_level, lpa2); \ __flush_start +=3D __TLBI_RANGE_PAGES(num, scale) << PAGE_SHIFT; \ __flush_pages -=3D __TLBI_RANGE_PAGES(num, scale);\ } \ --=20 2.43.0